diff --git a/Source/Core/Core/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/PowerPC/Jit64/Jit.cpp index 4afb935bd8..f1051a2454 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit.cpp @@ -873,20 +873,8 @@ u8* Jit64::DoJit(u32 em_address, JitBlock* b, u32 nextPC) // output, which needs to be bound in the actual instruction compilation. // TODO: make this smarter in the case that we're actually register-starved, i.e. // prioritize the more important registers. - for (int reg : op.regsIn) - { - if (gpr.NumFreeRegisters() < 2) - break; - if (op.gprInReg[reg] && !gpr.R(reg).IsImm()) - gpr.BindToRegister(reg, true, false); - } - for (int reg : op.fregsIn) - { - if (fpr.NumFreeRegisters() < 2) - break; - if (op.fprInXmm[reg]) - fpr.BindToRegister(reg, true, false); - } + gpr.PreloadRegisters(op.regsIn & op.gprInReg); + fpr.PreloadRegisters(op.fregsIn & op.fprInXmm); CompileInstruction(op); diff --git a/Source/Core/Core/PowerPC/Jit64/RegCache/JitRegCache.cpp b/Source/Core/Core/PowerPC/Jit64/RegCache/JitRegCache.cpp index 1608c37a8d..690bb93444 100644 --- a/Source/Core/Core/PowerPC/Jit64/RegCache/JitRegCache.cpp +++ b/Source/Core/Core/PowerPC/Jit64/RegCache/JitRegCache.cpp @@ -666,6 +666,17 @@ bool RegCache::IsAllUnlocked() const !IsAnyConstraintActive(); } +void RegCache::PreloadRegisters(BitSet32 to_preload) +{ + for (preg_t preg : to_preload) + { + if (NumFreeRegisters() < 2) + return; + if (!R(preg).IsImm()) + BindToRegister(preg, true, false); + } +} + void RegCache::NewLock(preg_t preg) { m_regs[preg].Lock(); diff --git a/Source/Core/Core/PowerPC/Jit64/RegCache/JitRegCache.h b/Source/Core/Core/PowerPC/Jit64/RegCache/JitRegCache.h index d767073cc8..dc189aa553 100644 --- a/Source/Core/Core/PowerPC/Jit64/RegCache/JitRegCache.h +++ b/Source/Core/Core/PowerPC/Jit64/RegCache/JitRegCache.h @@ -246,6 +246,8 @@ public: bool IsAllUnlocked() const; + void PreloadRegisters(BitSet32 regs); + protected: friend class RCOpArg; friend class RCX64Reg;