small cleanup
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2978 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -83,19 +83,20 @@ void Update_SR_LZ(s64 value) {
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// If this always returns 1, Hermes' demo sounds better.
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// If this always returns 1, Hermes' demo sounds better.
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// However, most AX games are negatively affected.
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// However, most AX games are negatively affected.
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// nakee: It seems to be enough to start the bit with 1 to fix Hermes' demo without breaking
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// anything. I also can't seem to find what sets that bit, sbset is called with 0/2/3/5/6
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// and sbclr with 0/2-6 (14 requires 8). Also trying to print when the register is set to 1
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// didn't seem to give any result.
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int GetMultiplyModifier()
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int GetMultiplyModifier()
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{
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{
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if (g_dsp.r[DSP_REG_SR] & (1 << 13))
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if (g_dsp.r[DSP_REG_SR] & SR_MUL_MODIFY)
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return 1;
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return 1;
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else
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else
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return 2;
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return 2;
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}
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}
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// 0x02 - overflow????
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//see gdsp_registers.h for flags
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// 0x04 - Zero bit
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// 0x08 - Sign bit
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// 0x40 - Logical Zero bit
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bool CheckCondition(u8 _Condition)
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bool CheckCondition(u8 _Condition)
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{
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{
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bool taken = false;
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bool taken = false;
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@ -31,15 +31,6 @@ namespace DSPInterpreter {
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// SR flag defines.
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// SR flag defines.
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#define SR_CMP_MASK 0x3f // Shouldn't this include 0x40?
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#define SR_CMP_MASK 0x3f // Shouldn't this include 0x40?
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// These are probably not accurate. Do not use yet.
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#define SR_UNKNOWN 0x0002 // ????????
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#define SR_ARITH_ZERO 0x0004
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#define SR_SIGN 0x0008
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#define SR_TOP2BITS 0x0020 // this is an odd one.
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#define SR_LOGIC_ZERO 0x0040 // ?? duddie's doc sometimes say & 1<<6 (0x40), sometimes 1<<14 (0x4000), while we have 0x20 .. eh
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#define SR_INT_ENABLE 0x0200 // Not 100% sure but duddie says so. This should replace the hack, if so.
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#define SR_MUL_MODIFY 0x2000 // 1 = normal. 0 = x2
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bool CheckCondition(u8 _Condition);
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bool CheckCondition(u8 _Condition);
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int GetMultiplyModifier();
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int GetMultiplyModifier();
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@ -92,6 +92,15 @@
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#define DSP_STACK_C 0
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#define DSP_STACK_C 0
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#define DSP_STACK_D 1
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#define DSP_STACK_D 1
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// These are probably not accurate. Do not use yet.
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#define SR_UNKNOWN 0x0002 // ????????
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#define SR_ARITH_ZERO 0x0004
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#define SR_SIGN 0x0008
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#define SR_TOP2BITS 0x0020 // this is an odd one.
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#define SR_LOGIC_ZERO 0x0040 // ?? duddie's doc sometimes say & 1<<6 (0x40), sometimes 1<<14 (0x4000), while we have 0x20 .. eh
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#define SR_INT_ENABLE 0x0200 // Not 100% sure but duddie says so. This should replace the hack, if so.
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#define SR_MUL_MODIFY 0x2000 // 1 = normal. 0 = x2
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void dsp_reg_store_stack(u8 stack_reg, u16 val);
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void dsp_reg_store_stack(u8 stack_reg, u16 val);
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u16 dsp_reg_load_stack(u8 stack_reg);
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u16 dsp_reg_load_stack(u8 stack_reg);
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