diff --git a/Source/Core/Core/Src/HW/BBA-TAP/TAP_Unix.cpp b/Source/Core/Core/Src/HW/BBA-TAP/TAP_Unix.cpp
index 711501d678..12ed697359 100644
--- a/Source/Core/Core/Src/HW/BBA-TAP/TAP_Unix.cpp
+++ b/Source/Core/Core/Src/HW/BBA-TAP/TAP_Unix.cpp
@@ -312,7 +312,7 @@ bool CEXIETHERNET::cbwriteDescriptor(u32 size)
 	//DWORD swapped = swapw(descr.word);
 	//next_packet_ptr:12, packet_len:12, status:8;
 	INFO_LOG(SP1, "Writing descriptor 0x%08X @ 0x%04lX: next 0x%03X len 0x%03X status 0x%02X\n",
-		descr.word, mCbw.p_write() + CB_OFFSET, descr.next_packet_ptr,
+		descr.word, (unsigned long)mCbw.p_write() + CB_OFFSET, descr.next_packet_ptr,
 		descr.packet_len, descr.status);
 	mCbw.write(&descr.word, SIZEOF_RECV_DESCRIPTOR);
 
diff --git a/Source/Core/Core/Src/HW/EXI_DeviceEthernet.cpp b/Source/Core/Core/Src/HW/EXI_DeviceEthernet.cpp
index 639cc0ade4..f7212a50e9 100644
--- a/Source/Core/Core/Src/HW/EXI_DeviceEthernet.cpp
+++ b/Source/Core/Core/Src/HW/EXI_DeviceEthernet.cpp
@@ -213,7 +213,8 @@ void CEXIETHERNET::ImmWrite(u32 data, u32 size)
 			//_dbg_assert_(SP1, data == (u32)((u16)mCbw.p_write() + CB_OFFSET) >> 8);
 			if (data != (u32)((u16)mCbw.p_write() + CB_OFFSET) >> 8)
 			{
-				ERROR_LOG(SP1, "BBA RWP ASSERT data %x p_write %lx", data, mCbw.p_write());
+				ERROR_LOG(SP1, "BBA RWP ASSERT data %x p_write %lx",
+					data, (unsigned long)mCbw.p_write());
 			}
 			break;
 		case BBA_RRP:	// RRP - Receive Buffer Read Page Pointer