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UnitTests: Fix misplaced braces in the x64Emitter tests

This commit is contained in:
Lioncash 2014-09-13 20:45:17 -04:00
parent 84a564a304
commit 068799ff73
1 changed files with 6 additions and 6 deletions
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12
Source/UnitTests/Common/x64EmitterTest.cpp
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@ -471,7 +471,7 @@ SHIFT_TEST(SAR)
}; \ }; \
for (const auto& regset : regsets) \ for (const auto& regset : regsets) \
for (const auto& r : regset.regs) \ for (const auto& r : regset.regs) \
{ \ { \
emitter->Name(regset.bits, R(r.reg), R(RAX)); \ emitter->Name(regset.bits, R(r.reg), R(RAX)); \
emitter->Name(regset.bits, R(RAX), R(r.reg)); \ emitter->Name(regset.bits, R(RAX), R(r.reg)); \
emitter->Name(regset.bits, R(r.reg), Imm8(0x42)); \ emitter->Name(regset.bits, R(r.reg), Imm8(0x42)); \
@ -480,7 +480,7 @@ SHIFT_TEST(SAR)
#Name " " + regset.out_name + ", " + r.name + " " \ #Name " " + regset.out_name + ", " + r.name + " " \
#Name " " + r.name + ", 0x42 " \ #Name " " + r.name + ", 0x42 " \
#Name " " + regset.size + " ptr ds:[r12], " + r.name); \ #Name " " + regset.size + " ptr ds:[r12], " + r.name); \
} \ } \
} }
BT_TEST(BT) BT_TEST(BT)
@ -506,14 +506,14 @@ BT_TEST(BTC)
}; \ }; \
for (const auto& regset : regsets) \ for (const auto& regset : regsets) \
for (const auto& r : regset.regs) \ for (const auto& r : regset.regs) \
{ \ { \
emitter->Name(regset.bits, R(r.reg)); \ emitter->Name(regset.bits, R(r.reg)); \
emitter->Name(regset.bits, MatR(RAX)); \ emitter->Name(regset.bits, MatR(RAX)); \
emitter->Name(regset.bits, MatR(R12)); \ emitter->Name(regset.bits, MatR(R12)); \
ExpectDisassembly(#Name " " + r.name + " " \ ExpectDisassembly(#Name " " + r.name + " " \
#Name " " + regset.size + " ptr ds:[rax] " \ #Name " " + regset.size + " ptr ds:[rax] " \
#Name " " + regset.size + " ptr ds:[r12]"); \ #Name " " + regset.size + " ptr ds:[r12]"); \
} \ } \
} }
ONE_OP_ARITH_TEST(NOT) ONE_OP_ARITH_TEST(NOT)
@ -942,14 +942,14 @@ VEX_RM_TEST(BLSI)
}; \ }; \
for (const auto& regset : regsets) \ for (const auto& regset : regsets) \
for (const auto& r : regset.regs) \ for (const auto& r : regset.regs) \
{ \ { \
emitter->Name(regset.bits, r.reg, R(RAX), 4); \ emitter->Name(regset.bits, r.reg, R(RAX), 4); \
emitter->Name(regset.bits, RAX, R(r.reg), 4); \ emitter->Name(regset.bits, RAX, R(r.reg), 4); \
emitter->Name(regset.bits, r.reg, MatR(R12), 4); \ emitter->Name(regset.bits, r.reg, MatR(R12), 4); \
ExpectDisassembly(#Name " " + r.name+ ", " + regset.out_name + ", 0x04 " \ ExpectDisassembly(#Name " " + r.name+ ", " + regset.out_name + ", 0x04 " \
#Name " " + regset.out_name + ", " + r.name + ", 0x04 " \ #Name " " + regset.out_name + ", " + r.name + ", 0x04 " \
#Name " " + r.name + ", " + regset.size + " ptr ds:[r12], 0x04 "); \ #Name " " + r.name + ", " + regset.size + " ptr ds:[r12], 0x04 "); \
} \ } \
} }
VEX_RMI_TEST(RORX) VEX_RMI_TEST(RORX)