Sped up to the Dolphin debugger by not checking for breakpoints when stepping.
Fixed the JIT cache, invalidating one instruction length at a time. Fixed a bug where the JIT cache did not get invalidated when stepping. Disabled fused instructions in the debugger.
This commit is contained in:
parent
8ed6ea3b07
commit
05692b1e7e
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@ -601,8 +601,8 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
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MOV(32, M(&PC), Imm32(ops[i].address));
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MOV(32, M(&PC), Imm32(ops[i].address));
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ABI_CallFunction(reinterpret_cast<void *>(&PowerPC::CheckBreakPoints));
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ABI_CallFunction(reinterpret_cast<void *>(&PowerPC::CheckBreakPoints));
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TEST(32, M((void*)PowerPC::GetStatePtr()), Imm32(0xFFFFFFFF));
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TEST(32, M((void*)PowerPC::GetStatePtr()), Imm32(0xFFFFFFFF));
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FixupBranch noBreakpoint = J_CC(CC_Z);
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FixupBranch noBreakpoint = J_CC(CC_Z);
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gpr.Flush(FLUSH_ALL);
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gpr.Flush(FLUSH_ALL);
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fpr.Flush(FLUSH_ALL);
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fpr.Flush(FLUSH_ALL);
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@ -81,12 +81,15 @@ void Jit64AsmRoutineManager::Generate()
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if (Core::g_CoreStartupParameter.bEnableDebugging)
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if (Core::g_CoreStartupParameter.bEnableDebugging)
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{
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{
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TEST(32, M((void*)PowerPC::GetStatePtr()), Imm32(PowerPC::CPU_STEPPING));
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FixupBranch notStepping = J_CC(CC_Z);
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ABI_CallFunction(reinterpret_cast<void *>(&PowerPC::CheckBreakPoints));
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ABI_CallFunction(reinterpret_cast<void *>(&PowerPC::CheckBreakPoints));
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TEST(32, M((void*)PowerPC::GetStatePtr()), Imm32(0xFFFFFFFF));
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TEST(32, M((void*)PowerPC::GetStatePtr()), Imm32(0xFFFFFFFF));
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FixupBranch noBreakpoint = J_CC(CC_Z);
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FixupBranch noBreakpoint = J_CC(CC_Z);
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ABI_PopAllCalleeSavedRegsAndAdjustStack();
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ABI_PopAllCalleeSavedRegsAndAdjustStack();
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RET();
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RET();
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SetJumpTarget(noBreakpoint);
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SetJumpTarget(noBreakpoint);
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SetJumpTarget(notStepping);
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}
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}
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SetJumpTarget(skipToRealDispatch);
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SetJumpTarget(skipToRealDispatch);
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@ -266,7 +266,7 @@ void Jit64::reg_imm(UGeckoInstruction inst)
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case 15:
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case 15:
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if (a == 0) { // lis
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if (a == 0) { // lis
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// Merge with next instruction if loading a 32-bits immediate value (lis + addi, lis + ori)
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// Merge with next instruction if loading a 32-bits immediate value (lis + addi, lis + ori)
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if (!js.isLastInstruction) {
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if (!js.isLastInstruction && !Core::g_CoreStartupParameter.bEnableDebugging) {
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if ((js.next_inst.OPCD == 14) && (js.next_inst.RD == d) && (js.next_inst.RA == d)) { // addi
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if ((js.next_inst.OPCD == 14) && (js.next_inst.RD == d) && (js.next_inst.RA == d)) { // addi
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gpr.SetImmediate32(d, ((u32)inst.SIMM_16 << 16) + (u32)(s32)js.next_inst.SIMM_16);
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gpr.SetImmediate32(d, ((u32)inst.SIMM_16 << 16) + (u32)(s32)js.next_inst.SIMM_16);
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js.downcountAmount++;
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js.downcountAmount++;
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@ -83,12 +83,15 @@ void JitILAsmRoutineManager::Generate()
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if (Core::g_CoreStartupParameter.bEnableDebugging)
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if (Core::g_CoreStartupParameter.bEnableDebugging)
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{
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{
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TEST(32, M((void*)PowerPC::GetStatePtr()), Imm32(PowerPC::CPU_STEPPING));
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FixupBranch notStepping = J_CC(CC_Z);
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ABI_CallFunction(reinterpret_cast<void *>(&PowerPC::CheckBreakPoints));
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ABI_CallFunction(reinterpret_cast<void *>(&PowerPC::CheckBreakPoints));
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TEST(32, M((void*)PowerPC::GetStatePtr()), Imm32(0xFFFFFFFF));
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TEST(32, M((void*)PowerPC::GetStatePtr()), Imm32(0xFFFFFFFF));
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FixupBranch noBreakpoint = J_CC(CC_Z);
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FixupBranch noBreakpoint = J_CC(CC_Z);
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ABI_PopAllCalleeSavedRegsAndAdjustStack();
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ABI_PopAllCalleeSavedRegsAndAdjustStack();
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RET();
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RET();
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SetJumpTarget(noBreakpoint);
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SetJumpTarget(noBreakpoint);
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SetJumpTarget(notStepping);
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}
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}
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SetJumpTarget(skipToRealDispatch);
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SetJumpTarget(skipToRealDispatch);
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@ -422,17 +422,17 @@ bool JitBlock::ContainsAddress(u32 em_address)
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if (b.originalAddress & JIT_ICACHE_VMEM_BIT)
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if (b.originalAddress & JIT_ICACHE_VMEM_BIT)
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{
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{
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u32 cacheaddr = b.originalAddress & JIT_ICACHE_MASK;
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u32 cacheaddr = b.originalAddress & JIT_ICACHE_MASK;
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memset(iCacheVMEM + cacheaddr, JIT_ICACHE_INVALID_BYTE, length);
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memset(iCacheVMEM + cacheaddr, JIT_ICACHE_INVALID_BYTE, 4);
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}
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}
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else if (b.originalAddress & JIT_ICACHE_EXRAM_BIT)
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else if (b.originalAddress & JIT_ICACHE_EXRAM_BIT)
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{
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{
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u32 cacheaddr = b.originalAddress & JIT_ICACHEEX_MASK;
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u32 cacheaddr = b.originalAddress & JIT_ICACHEEX_MASK;
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memset(iCacheEx + cacheaddr, JIT_ICACHE_INVALID_BYTE, length);
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memset(iCacheEx + cacheaddr, JIT_ICACHE_INVALID_BYTE, 4);
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}
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}
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else
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else
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{
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{
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u32 cacheaddr = b.originalAddress & JIT_ICACHE_MASK;
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u32 cacheaddr = b.originalAddress & JIT_ICACHE_MASK;
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memset(iCache + cacheaddr, JIT_ICACHE_INVALID_BYTE, length);
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memset(iCache + cacheaddr, JIT_ICACHE_INVALID_BYTE, 4);
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}
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}
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#endif
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#endif
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DestroyBlock(it2->second, true);
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DestroyBlock(it2->second, true);
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@ -263,6 +263,8 @@ void CCodeWindow::SingleStep()
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{
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{
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if (CCPU::IsStepping())
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if (CCPU::IsStepping())
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{
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{
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if (jit)
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jit->GetBlockCache()->InvalidateICache(PC, 4);
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CCPU::StepOpcode(&sync_event);
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CCPU::StepOpcode(&sync_event);
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wxThread::Sleep(20);
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wxThread::Sleep(20);
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// need a short wait here
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// need a short wait here
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