JitArm64: Implement mcrxr.
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@ -99,6 +99,7 @@ public:
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void mtmsr(UGeckoInstruction inst);
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void mfmsr(UGeckoInstruction inst);
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void mcrf(UGeckoInstruction inst);
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void mcrxr(UGeckoInstruction inst);
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void mfsr(UGeckoInstruction inst);
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void mtsr(UGeckoInstruction inst);
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void mfsrin(UGeckoInstruction inst);
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@ -84,6 +84,36 @@ void JitArm64::mcrf(UGeckoInstruction inst)
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}
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}
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void JitArm64::mcrxr(UGeckoInstruction inst)
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{
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INSTRUCTION_START
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JITDISABLE(bJITSystemRegistersOff);
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ARM64Reg WA = gpr.GetReg();
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ARM64Reg XA = EncodeRegTo64(WA);
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ARM64Reg WB = gpr.GetReg();
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ARM64Reg XB = EncodeRegTo64(WB);
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// Copy XER[0-3] into CR[inst.CRFD]
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LDRB(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(xer_ca));
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LDRB(INDEX_UNSIGNED, WB, PPC_REG, PPCSTATE_OFF(xer_so_ov));
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// [0 SO OV CA]
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ADD(WA, WA, WB, ArithOption(WB, ST_LSL, 2));
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// [SO OV CA 0] << 3
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LSL(WA, WA, 4);
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MOVP2R(XB, m_crTable);
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LDR(XB, XB, XA);
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STR(INDEX_UNSIGNED, XB, PPC_REG, PPCSTATE_OFF(cr_val[inst.CRFD]));
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// Clear XER[0-3]
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STRB(INDEX_UNSIGNED, WZR, PPC_REG, PPCSTATE_OFF(xer_ca));
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STRB(INDEX_UNSIGNED, WZR, PPC_REG, PPCSTATE_OFF(xer_so_ov));
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gpr.Unlock(WA, WB);
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}
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void JitArm64::mfsr(UGeckoInstruction inst)
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{
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INSTRUCTION_START
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@ -294,18 +294,18 @@ static GekkoOPTemplate table31[] = {
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{759, &JitArm64::stfXX}, // stfdux
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{983, &JitArm64::stfXX}, // stfiwx
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{19, &JitArm64::mfcr}, // mfcr
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{83, &JitArm64::mfmsr}, // mfmsr
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{144, &JitArm64::mtcrf}, // mtcrf
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{146, &JitArm64::mtmsr}, // mtmsr
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{210, &JitArm64::mtsr}, // mtsr
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{242, &JitArm64::mtsrin}, // mtsrin
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{339, &JitArm64::mfspr}, // mfspr
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{467, &JitArm64::mtspr}, // mtspr
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{371, &JitArm64::mftb}, // mftb
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{512, &JitArm64::FallBackToInterpreter}, // mcrxr
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{595, &JitArm64::mfsr}, // mfsr
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{659, &JitArm64::mfsrin}, // mfsrin
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{19, &JitArm64::mfcr}, // mfcr
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{83, &JitArm64::mfmsr}, // mfmsr
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{144, &JitArm64::mtcrf}, // mtcrf
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{146, &JitArm64::mtmsr}, // mtmsr
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{210, &JitArm64::mtsr}, // mtsr
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{242, &JitArm64::mtsrin}, // mtsrin
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{339, &JitArm64::mfspr}, // mfspr
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{467, &JitArm64::mtspr}, // mtspr
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{371, &JitArm64::mftb}, // mftb
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{512, &JitArm64::mcrxr}, // mcrxr
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{595, &JitArm64::mfsr}, // mfsr
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{659, &JitArm64::mfsrin}, // mfsrin
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{4, &JitArm64::twx}, // tw
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{598, &JitArm64::DoNothing}, // sync
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