DSPLLE: sort of semi-working breakpoints and stepping, if you flip an #ifdef. more work to do, for some reason it gets very slow when you enable it atm
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3573 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
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04105baf4e
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@ -24,7 +24,9 @@
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====================================================================*/
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====================================================================*/
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#include "Common.h"
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#include "Common.h"
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#include "Thread.h"
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#include "DSPCore.h"
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#include "DSPCore.h"
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#include "DSPHost.h"
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#include "DSPAnalyzer.h"
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#include "DSPAnalyzer.h"
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#include "MemoryUtil.h"
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#include "MemoryUtil.h"
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@ -33,6 +35,8 @@
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SDSP g_dsp;
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SDSP g_dsp;
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BreakPoints dsp_breakpoints;
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BreakPoints dsp_breakpoints;
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DSPCoreState core_state = DSPCORE_RUNNING;
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Common::Event step_event;
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static bool LoadRom(const char *fname, int size_in_words, u16 *rom)
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static bool LoadRom(const char *fname, int size_in_words, u16 *rom)
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{
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{
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@ -118,11 +122,13 @@ bool DSPCore_Init(const char *irom_filename, const char *coef_filename)
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WriteProtectMemory(g_dsp.iram, DSP_IRAM_BYTE_SIZE, false);
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WriteProtectMemory(g_dsp.iram, DSP_IRAM_BYTE_SIZE, false);
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DSPAnalyzer::Analyze();
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DSPAnalyzer::Analyze();
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step_event.Init();
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return true;
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return true;
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}
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}
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void DSPCore_Shutdown()
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void DSPCore_Shutdown()
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{
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{
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step_event.Shutdown();
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FreeMemoryPages(g_dsp.irom, DSP_IROM_BYTE_SIZE);
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FreeMemoryPages(g_dsp.irom, DSP_IROM_BYTE_SIZE);
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FreeMemoryPages(g_dsp.iram, DSP_IRAM_BYTE_SIZE);
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FreeMemoryPages(g_dsp.iram, DSP_IRAM_BYTE_SIZE);
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FreeMemoryPages(g_dsp.dram, DSP_DRAM_BYTE_SIZE);
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FreeMemoryPages(g_dsp.dram, DSP_DRAM_BYTE_SIZE);
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@ -184,3 +190,57 @@ void DSPCore_CheckExceptions()
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}
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}
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}
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}
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}
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}
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// Delegate to JIT (when it is written) or interpreter as appropriate.
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// Handle state changes and stepping.
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int DSPCore_RunCycles(int cycles)
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{
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while (cycles > 0) {
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reswitch:
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switch (core_state)
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{
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case DSPCORE_RUNNING:
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#if 0 // Set to 1 to enable stepping
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// Enable breakpoints
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cycles = DSPInterpreter::RunCyclesDebug(cycles);
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#else
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//1: enter a fast runloop
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cycles = DSPInterpreter::RunCycles(cycles);
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#endif
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break;
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case DSPCORE_STEPPING:
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step_event.Wait();
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if (core_state != DSPCORE_STEPPING)
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goto reswitch;
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DSPInterpreter::Step();
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cycles--;
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DSPHost_UpdateDebugger();
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break;
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}
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}
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return cycles;
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}
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void DSPCore_SetState(DSPCoreState new_state)
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{
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core_state = new_state;
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// kick the event, in case we are waiting
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if (new_state == DSPCORE_RUNNING)
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step_event.Set();
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// Sleep(10);
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DSPHost_UpdateDebugger();
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}
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DSPCoreState DSPCore_GetState()
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{
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return core_state;
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}
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void DSPCore_Step()
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{
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if (core_state == DSPCORE_STEPPING)
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step_event.Set();
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}
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@ -101,17 +101,35 @@
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// Hardware registers address
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// Hardware registers address
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#define DSP_REG_DSCR 0xffc9 // DSP DMA Control Reg
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#define DSP_COEF_A1_0 0xa0
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#define DSP_REG_DSBL 0xffcb // DSP DMA Block Length
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#define DSP_REG_DSPA 0xffcd // DSP DMA DMEM Address
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#define DSP_REG_DSMAH 0xffce // DSP DMA Mem Address H
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#define DSP_REG_DSMAL 0xffcf // DSP DMA Mem Address L
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#define DSP_REG_DIRQ 0xfffb // DSP Irq Rest
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#define DSP_DSMAH 0xce
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#define DSP_REG_DMBH 0xfffc // DSP Mailbox H
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#define DSP_DSMAL 0xcf
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#define DSP_REG_DMBL 0xfffd // DSP Mailbox L
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#define DSP_DSCR 0xc9 // DSP DMA Control Reg
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#define DSP_REG_CMBH 0xfffe // CPU Mailbox H
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#define DSP_DSPA 0xcd // DSP DMA Block Length
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#define DSP_REG_CMBL 0xffff // CPU Mailbox L
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#define DSP_DSBL 0xcb // DSP DMA DMEM Address
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#define DSP_DSMAH 0xce // DSP DMA Mem Address H
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#define DSP_DSMAL 0xcf // DSP DMA Mem Address L
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#define DSP_FORMAT 0xd1
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#define DSP_ACDATA1 0xd3 // used only by Zelda ucodes
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#define DSP_ACSAH 0xd4
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#define DSP_ACSAL 0xd5
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#define DSP_ACEAH 0xd6
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#define DSP_ACEAL 0xd7
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#define DSP_ACCAH 0xd8
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#define DSP_ACCAL 0xd9
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#define DSP_PRED_SCALE 0xda
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#define DSP_YN1 0xdb
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#define DSP_YN2 0xdc
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#define DSP_ACCELERATOR 0xdd // ADPCM accelerator read. Used by AX.
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#define DSP_GAIN 0xde
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#define DSP_DIRQ 0xfb // DSP Irq Rest
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#define DSP_DMBH 0xfc // DSP Mailbox H
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#define DSP_DMBL 0xfd // DSP Mailbox L
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#define DSP_CMBH 0xfe // CPU Mailbox H
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#define DSP_CMBL 0xff // CPU Mailbox L
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#define DMA_TO_DSP 0
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#define DMA_TO_DSP 0
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#define DMA_TO_CPU 1
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#define DMA_TO_CPU 1
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@ -125,6 +143,7 @@
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#define CR_HALT 0x0004
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#define CR_HALT 0x0004
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#define CR_EXTERNAL_INT 0x0002
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#define CR_EXTERNAL_INT 0x0002
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// SR bits
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// SR bits
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#define SR_CARRY 0x0001
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#define SR_CARRY 0x0001
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#define SR_2 0x0002 // overflow???
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#define SR_2 0x0002 // overflow???
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@ -194,4 +213,18 @@ void DSPCore_CheckExceptions();
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// sets a flag in the pending exception register.
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// sets a flag in the pending exception register.
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void DSPCore_SetException(u8 level);
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void DSPCore_SetException(u8 level);
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enum DSPCoreState
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{
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DSPCORE_RUNNING = 0,
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DSPCORE_STEPPING = 1,
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};
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int DSPCore_RunCycles(int cycles);
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// These are meant to be called from the UI thread.
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void DSPCore_SetState(DSPCoreState new_state);
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DSPCoreState DSPCore_GetState();
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void DSPCore_Step();
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#endif // _DSPCORE_H
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#endif // _DSPCORE_H
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@ -36,7 +36,7 @@
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#include "DSPInterpreter.h"
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#include "DSPInterpreter.h"
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#include "DSPHWInterface.h"
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#include "DSPHWInterface.h"
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void gdsp_dma();
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void gdsp_do_dma();
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Common::CriticalSection g_CriticalSection;
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Common::CriticalSection g_CriticalSection;
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@ -137,7 +137,7 @@ void gdsp_ifx_write(u16 addr, u16 val)
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case 0xcb: // DSBL
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case 0xcb: // DSBL
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gdsp_ifx_regs[addr & 0xFF] = val;
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gdsp_ifx_regs[addr & 0xFF] = val;
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gdsp_dma();
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gdsp_do_dma();
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gdsp_ifx_regs[DSP_DSCR] &= ~0x0004;
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gdsp_ifx_regs[DSP_DSCR] &= ~0x0004;
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break;
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break;
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@ -274,7 +274,7 @@ void gdsp_ddma_out(u16 dsp_addr, u32 addr, u32 size)
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INFO_LOG(DSPLLE, "*** ddma_out DRAM_DSP (0x%04x) -> RAM (0x%08x) : size (0x%08x)\n", dsp_addr / 2, addr, size);
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INFO_LOG(DSPLLE, "*** ddma_out DRAM_DSP (0x%04x) -> RAM (0x%08x) : size (0x%08x)\n", dsp_addr / 2, addr, size);
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}
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}
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void gdsp_dma()
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void gdsp_do_dma()
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{
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{
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u16 ctl;
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u16 ctl;
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u32 addr;
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u32 addr;
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@ -30,26 +30,6 @@
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#define GDSP_MBOX_CPU 0
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#define GDSP_MBOX_CPU 0
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#define GDSP_MBOX_DSP 1
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#define GDSP_MBOX_DSP 1
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#define DSP_DSMAH 0xce
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#define DSP_DSMAL 0xcf
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#define DSP_DSCR 0xc9
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#define DSP_DSPA 0xcd
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#define DSP_DSBL 0xcb
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#define DSP_ACSAH 0xd4
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#define DSP_ACSAL 0xd5
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#define DSP_ACEAH 0xd6
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#define DSP_ACEAL 0xd7
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#define DSP_ACCAH 0xd8
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#define DSP_ACCAL 0xd9
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#define DSP_COEF_A1_0 0xa0
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#define DSP_FORMAT 0xd1
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#define DSP_PRED_SCALE 0xda
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#define DSP_YN1 0xdb
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#define DSP_YN2 0xdc
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#define DSP_ARAM 0xdd
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#define DSP_GAIN 0xde
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extern u16 gdsp_ifx_regs[256];
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extern u16 gdsp_ifx_regs[256];
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u32 gdsp_mbox_peek(u8 mbx);
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u32 gdsp_mbox_peek(u8 mbx);
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@ -29,5 +29,6 @@ bool DSPHost_OnThread();
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bool DSPHost_Running();
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bool DSPHost_Running();
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void DSPHost_InterruptRequest();
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void DSPHost_InterruptRequest();
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u32 DSPHost_CodeLoaded(const u8 *ptr, int size);
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u32 DSPHost_CodeLoaded(const u8 *ptr, int size);
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void DSPHost_UpdateDebugger();
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#endif
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#endif
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@ -32,12 +32,12 @@ void Update_SR_Register64(s64 _Value)
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if (_Value < 0)
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if (_Value < 0)
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{
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{
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g_dsp.r[DSP_REG_SR] |= 0x8;
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g_dsp.r[DSP_REG_SR] |= SR_SIGN;
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}
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}
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if (_Value == 0)
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if (_Value == 0)
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{
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{
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g_dsp.r[DSP_REG_SR] |= 0x4;
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g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO;
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}
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}
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// weird
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// weird
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@ -53,12 +53,12 @@ void Update_SR_Register16(s16 _Value)
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if (_Value < 0)
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if (_Value < 0)
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{
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{
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g_dsp.r[DSP_REG_SR] |= 0x8;
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g_dsp.r[DSP_REG_SR] |= SR_SIGN;
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}
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}
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if (_Value == 0)
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if (_Value == 0)
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{
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{
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g_dsp.r[DSP_REG_SR] |= 0x4;
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g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO;
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}
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}
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// weird
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// weird
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@ -90,92 +90,51 @@ int GetMultiplyModifier()
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}
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}
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inline bool isCarry() {
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inline bool isCarry() {
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return (g_dsp.r[DSP_REG_SR] & 0x01) ? true : false;
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return (g_dsp.r[DSP_REG_SR] & SR_CARRY) ? true : false;
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}
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}
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inline bool isSign() {
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inline bool isSign() {
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return ((g_dsp.r[DSP_REG_SR] & 0x02) != (g_dsp.r[DSP_REG_SR] & 0x08));
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return ((g_dsp.r[DSP_REG_SR] & SR_2) != (g_dsp.r[DSP_REG_SR] & SR_SIGN));
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}
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}
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inline bool isZero() {
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inline bool isZero() {
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return (g_dsp.r[DSP_REG_SR] & 0x04) ? true : false;
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return (g_dsp.r[DSP_REG_SR] & SR_ARITH_ZERO) ? true : false;
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}
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}
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//see gdsp_registers.h for flags
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//see gdsp_registers.h for flags
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bool CheckCondition(u8 _Condition)
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bool CheckCondition(u8 _Condition)
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{
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{
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bool taken = false;
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switch (_Condition & 0xf)
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switch (_Condition & 0xf)
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{
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{
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case 0x0: //NS - NOT SIGN
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case 0x0: //NS - NOT SIGN
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if (! isSign())
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return !isSign();
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taken = true;
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break;
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case 0x1: // S - SIGN
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case 0x1: // S - SIGN
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if (isSign())
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return isSign();
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taken = true;
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break;
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case 0x2: // G - GREATER
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case 0x2: // G - GREATER
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if (! isSign() && !isZero())
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return !isSign() && !isZero();
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taken = true;
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break;
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case 0x3: // LE - LESS EQUAL
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case 0x3: // LE - LESS EQUAL
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if (isSign() || isZero())
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return isSign() || isZero();
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taken = true;
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break;
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case 0x4: // NZ - NOT ZERO
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case 0x4: // NZ - NOT ZERO
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return !isZero();
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if (!isZero())
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taken = true;
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break;
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case 0x5: // Z - ZERO
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case 0x5: // Z - ZERO
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return isZero();
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if (isZero())
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taken = true;
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break;
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case 0x6: // L - LESS
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case 0x6: // L - LESS
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// Should be that once we set 0x01
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// Should be that once we set 0x01
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if (!isCarry())
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return !isCarry();
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// if (isSign())
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// if (isSign())
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taken = true;
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break;
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case 0x7: // GE - GREATER EQUAL
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case 0x7: // GE - GREATER EQUAL
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// Should be that once we set 0x01
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// Should be that once we set 0x01
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if (isCarry())
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return isCarry();
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// if (! isSign() || isZero())
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// if (! isSign() || isZero())
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taken = true;
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break;
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case 0xc: // LNZ - LOGIC NOT ZERO
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case 0xc: // LNZ - LOGIC NOT ZERO
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return !(g_dsp.r[DSP_REG_SR] & SR_LOGIC_ZERO);
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if (!(g_dsp.r[DSP_REG_SR] & SR_LOGIC_ZERO))
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taken = true;
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break;
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case 0xd: // LZ - LOGIC ZERO
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case 0xd: // LZ - LOGIC ZERO
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return (g_dsp.r[DSP_REG_SR] & SR_LOGIC_ZERO) != 0;
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if (g_dsp.r[DSP_REG_SR] & SR_LOGIC_ZERO)
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case 0xf: // Empty - always true.
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taken = true;
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return true;
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break;
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case 0xf: // Empty
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taken = true;
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break;
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default:
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default:
|
||||||
ERROR_LOG(DSPLLE, "Unknown condition check: 0x%04x\n", _Condition & 0xf);
|
ERROR_LOG(DSPLLE, "Unknown condition check: 0x%04x\n", _Condition & 0xf);
|
||||||
break;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
return taken;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
} // namespace
|
} // namespace
|
||||||
|
|
|
@ -32,7 +32,6 @@
|
||||||
#include "DSPCore.h"
|
#include "DSPCore.h"
|
||||||
#include "DSPMemoryMap.h"
|
#include "DSPMemoryMap.h"
|
||||||
#include "DSPStacks.h"
|
#include "DSPStacks.h"
|
||||||
// #include "DSPIntExtOps.h"
|
|
||||||
|
|
||||||
// ---------------------------------------------------------------------------------------
|
// ---------------------------------------------------------------------------------------
|
||||||
// --- SR
|
// --- SR
|
||||||
|
|
|
@ -71,8 +71,6 @@ u16 ReadCR()
|
||||||
return g_dsp.cr;
|
return g_dsp.cr;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void HandleLoop()
|
void HandleLoop()
|
||||||
{
|
{
|
||||||
// Handle looping hardware.
|
// Handle looping hardware.
|
||||||
|
@ -85,6 +83,7 @@ void HandleLoop()
|
||||||
// This does not always work correctly!
|
// This does not always work correctly!
|
||||||
// The loop end tends to point to the second part of
|
// The loop end tends to point to the second part of
|
||||||
// two-byte instructions!
|
// two-byte instructions!
|
||||||
|
// 0179 1104 019f bloopi #0x04, 0x019f in zelda, for example
|
||||||
if (g_dsp.pc == (rLoopAddress + 1))
|
if (g_dsp.pc == (rLoopAddress + 1))
|
||||||
{
|
{
|
||||||
rLoopCounter--;
|
rLoopCounter--;
|
||||||
|
@ -150,31 +149,62 @@ void Run()
|
||||||
gdsp_running = false;
|
gdsp_running = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
// Used by non-thread mode.
|
// This one has basic idle skipping, and checks breakpoints.
|
||||||
void RunCycles(int cycles)
|
int RunCyclesDebug(int cycles)
|
||||||
|
{
|
||||||
|
// First, let's run a few cycles with no idle skipping so that things can progress a bit.
|
||||||
|
for (int i = 0; i < 8; i++)
|
||||||
|
{
|
||||||
|
if (g_dsp.cr & CR_HALT)
|
||||||
|
return 0;
|
||||||
|
Step();
|
||||||
|
cycles--;
|
||||||
|
}
|
||||||
|
|
||||||
|
while (cycles > 0)
|
||||||
|
{
|
||||||
|
if (g_dsp.cr & CR_HALT) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
if (dsp_breakpoints.IsAddressBreakPoint(g_dsp.pc))
|
||||||
|
{
|
||||||
|
DSPCore_SetState(DSPCORE_STEPPING);
|
||||||
|
return cycles;
|
||||||
|
}
|
||||||
|
DSPCore_CheckExternalInterrupt();
|
||||||
|
Step();
|
||||||
|
cycles--;
|
||||||
|
|
||||||
|
// Idle skipping.
|
||||||
|
if (DSPAnalyzer::code_flags[g_dsp.pc] & DSPAnalyzer::CODE_IDLE_SKIP)
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// Used by non-thread mode. Meant to be efficient.
|
||||||
|
int RunCycles(int cycles)
|
||||||
{
|
{
|
||||||
if (cycles < 18)
|
if (cycles < 18)
|
||||||
{
|
{
|
||||||
for (int i = 0; i < cycles; i++)
|
for (int i = 0; i < cycles; i++)
|
||||||
{
|
{
|
||||||
if (g_dsp.cr & CR_HALT)
|
if (g_dsp.cr & CR_HALT)
|
||||||
return;
|
return 0;
|
||||||
if (DSPAnalyzer::code_flags[g_dsp.pc] & DSPAnalyzer::CODE_IDLE_SKIP)
|
if (DSPAnalyzer::code_flags[g_dsp.pc] & DSPAnalyzer::CODE_IDLE_SKIP)
|
||||||
return;
|
return 0;
|
||||||
Step();
|
Step();
|
||||||
cycles--;
|
cycles--;
|
||||||
}
|
}
|
||||||
return;
|
return cycles;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
DSPCore_CheckExternalInterrupt();
|
DSPCore_CheckExternalInterrupt();
|
||||||
|
|
||||||
// First, let's run a few cycles with no idle skipping so that things can progress a bit.
|
// First, let's run a few cycles with no idle skipping so that things can progress a bit.
|
||||||
for (int i = 0; i < 8; i++)
|
for (int i = 0; i < 8; i++)
|
||||||
{
|
{
|
||||||
if (g_dsp.cr & CR_HALT)
|
if (g_dsp.cr & CR_HALT)
|
||||||
return;
|
return 0;
|
||||||
Step();
|
Step();
|
||||||
cycles--;
|
cycles--;
|
||||||
}
|
}
|
||||||
|
@ -183,9 +213,9 @@ void RunCycles(int cycles)
|
||||||
for (int i = 0; i < 8; i++)
|
for (int i = 0; i < 8; i++)
|
||||||
{
|
{
|
||||||
if (g_dsp.cr & CR_HALT)
|
if (g_dsp.cr & CR_HALT)
|
||||||
return;
|
return 0;
|
||||||
if (DSPAnalyzer::code_flags[g_dsp.pc] & DSPAnalyzer::CODE_IDLE_SKIP)
|
if (DSPAnalyzer::code_flags[g_dsp.pc] & DSPAnalyzer::CODE_IDLE_SKIP)
|
||||||
return;
|
return 0;
|
||||||
Step();
|
Step();
|
||||||
cycles--;
|
cycles--;
|
||||||
}
|
}
|
||||||
|
@ -199,6 +229,8 @@ void RunCycles(int cycles)
|
||||||
// We don't bother directly supporting pause - if the main emu pauses,
|
// We don't bother directly supporting pause - if the main emu pauses,
|
||||||
// it just won't call this function anymore.
|
// it just won't call this function anymore.
|
||||||
}
|
}
|
||||||
|
|
||||||
|
return cycles;
|
||||||
}
|
}
|
||||||
|
|
||||||
void Stop()
|
void Stop()
|
||||||
|
|
|
@ -27,7 +27,13 @@ namespace DSPInterpreter {
|
||||||
|
|
||||||
void Step();
|
void Step();
|
||||||
void Run();
|
void Run();
|
||||||
void RunCycles(int cycles);
|
|
||||||
|
// If these simply return the same number of cycles as was passed into them,
|
||||||
|
// chances are that the DSP is halted.
|
||||||
|
// The difference between them is that the debug one obeys breakpoints.
|
||||||
|
int RunCycles(int cycles);
|
||||||
|
int RunCyclesDebug(int cycles);
|
||||||
|
|
||||||
void Stop();
|
void Stop();
|
||||||
|
|
||||||
void WriteCR(u16 val);
|
void WriteCR(u16 val);
|
||||||
|
|
|
@ -30,27 +30,27 @@
|
||||||
|
|
||||||
// Stacks. The stacks are outside the DSP RAM, in dedicated hardware.
|
// Stacks. The stacks are outside the DSP RAM, in dedicated hardware.
|
||||||
|
|
||||||
void dsp_reg_stack_push(u8 stack_reg)
|
void dsp_reg_stack_push(int stack_reg)
|
||||||
{
|
{
|
||||||
g_dsp.reg_stack_ptr[stack_reg]++;
|
g_dsp.reg_stack_ptr[stack_reg]++;
|
||||||
g_dsp.reg_stack_ptr[stack_reg] &= DSP_STACK_MASK;
|
g_dsp.reg_stack_ptr[stack_reg] &= DSP_STACK_MASK;
|
||||||
g_dsp.reg_stack[stack_reg][g_dsp.reg_stack_ptr[stack_reg]] = g_dsp.r[DSP_REG_ST0 + stack_reg];
|
g_dsp.reg_stack[stack_reg][g_dsp.reg_stack_ptr[stack_reg]] = g_dsp.r[DSP_REG_ST0 + stack_reg];
|
||||||
}
|
}
|
||||||
|
|
||||||
void dsp_reg_stack_pop(u8 stack_reg)
|
void dsp_reg_stack_pop(int stack_reg)
|
||||||
{
|
{
|
||||||
g_dsp.r[DSP_REG_ST0 + stack_reg] = g_dsp.reg_stack[stack_reg][g_dsp.reg_stack_ptr[stack_reg]];
|
g_dsp.r[DSP_REG_ST0 + stack_reg] = g_dsp.reg_stack[stack_reg][g_dsp.reg_stack_ptr[stack_reg]];
|
||||||
g_dsp.reg_stack_ptr[stack_reg]--;
|
g_dsp.reg_stack_ptr[stack_reg]--;
|
||||||
g_dsp.reg_stack_ptr[stack_reg] &= DSP_STACK_MASK;
|
g_dsp.reg_stack_ptr[stack_reg] &= DSP_STACK_MASK;
|
||||||
}
|
}
|
||||||
|
|
||||||
void dsp_reg_store_stack(u8 stack_reg, u16 val)
|
void dsp_reg_store_stack(int stack_reg, u16 val)
|
||||||
{
|
{
|
||||||
dsp_reg_stack_push(stack_reg);
|
dsp_reg_stack_push(stack_reg);
|
||||||
g_dsp.r[DSP_REG_ST0 + stack_reg] = val;
|
g_dsp.r[DSP_REG_ST0 + stack_reg] = val;
|
||||||
}
|
}
|
||||||
|
|
||||||
u16 dsp_reg_load_stack(u8 stack_reg)
|
u16 dsp_reg_load_stack(int stack_reg)
|
||||||
{
|
{
|
||||||
u16 val = g_dsp.r[DSP_REG_ST0 + stack_reg];
|
u16 val = g_dsp.r[DSP_REG_ST0 + stack_reg];
|
||||||
dsp_reg_stack_pop(stack_reg);
|
dsp_reg_stack_pop(stack_reg);
|
||||||
|
|
|
@ -28,7 +28,7 @@
|
||||||
|
|
||||||
#include "Common.h"
|
#include "Common.h"
|
||||||
|
|
||||||
void dsp_reg_store_stack(u8 stack_reg, u16 val);
|
void dsp_reg_store_stack(int stack_reg, u16 val);
|
||||||
u16 dsp_reg_load_stack(u8 stack_reg);
|
u16 dsp_reg_load_stack(int stack_reg);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -253,7 +253,6 @@ const DSPOPCTemplate opcodes[] =
|
||||||
{"CLR", 0x8100, 0xf7ff, DSPInterpreter::clr, nop, 1 | P_EXT, 1, {{P_ACC, 1, 0, 11, 0x0800}}, dsp_op_ext_ops_pro, dsp_op_ext_ops_epi}, // clear acc0
|
{"CLR", 0x8100, 0xf7ff, DSPInterpreter::clr, nop, 1 | P_EXT, 1, {{P_ACC, 1, 0, 11, 0x0800}}, dsp_op_ext_ops_pro, dsp_op_ext_ops_epi}, // clear acc0
|
||||||
{"CLRP", 0x8400, 0xffff, DSPInterpreter::clrp, nop, 1 | P_EXT, 0, {}, },
|
{"CLRP", 0x8400, 0xffff, DSPInterpreter::clrp, nop, 1 | P_EXT, 0, {}, },
|
||||||
|
|
||||||
|
|
||||||
{"MOV", 0x6c00, 0xfeff, DSPInterpreter::mov, nop, 1 | P_EXT, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_ACC_D, 1, 0, 8, 0x0100}}, dsp_op_ext_ops_pro, dsp_op_ext_ops_epi},
|
{"MOV", 0x6c00, 0xfeff, DSPInterpreter::mov, nop, 1 | P_EXT, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_ACC_D, 1, 0, 8, 0x0100}}, dsp_op_ext_ops_pro, dsp_op_ext_ops_epi},
|
||||||
{"MOVAX", 0x6800, 0xfcff, DSPInterpreter::movax, nop, 1 | P_EXT, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG18, 1, 0, 9, 0x0200}}, dsp_op_ext_ops_pro, dsp_op_ext_ops_epi},
|
{"MOVAX", 0x6800, 0xfcff, DSPInterpreter::movax, nop, 1 | P_EXT, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG18, 1, 0, 9, 0x0200}}, dsp_op_ext_ops_pro, dsp_op_ext_ops_epi},
|
||||||
{"MOVR", 0x6000, 0xf8ff, DSPInterpreter::movr, nop, 1 | P_EXT, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG18, 1, 0, 9, 0x0600}}, dsp_op_ext_ops_pro, dsp_op_ext_ops_epi},
|
{"MOVR", 0x6000, 0xf8ff, DSPInterpreter::movr, nop, 1 | P_EXT, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_REG18, 1, 0, 9, 0x0600}}, dsp_op_ext_ops_pro, dsp_op_ext_ops_epi},
|
||||||
|
@ -368,6 +367,7 @@ const pdlabel_t pdlabels[] =
|
||||||
{0xffad, "COEF_A2_6", "COEF_A2_6",},
|
{0xffad, "COEF_A2_6", "COEF_A2_6",},
|
||||||
{0xffae, "COEF_A1_7", "COEF_A1_7",},
|
{0xffae, "COEF_A1_7", "COEF_A1_7",},
|
||||||
{0xffaf, "COEF_A2_7", "COEF_A2_7",},
|
{0xffaf, "COEF_A2_7", "COEF_A2_7",},
|
||||||
|
|
||||||
{0xffb0, 0, 0,},
|
{0xffb0, 0, 0,},
|
||||||
{0xffb1, 0, 0,},
|
{0xffb1, 0, 0,},
|
||||||
{0xffb2, 0, 0,},
|
{0xffb2, 0, 0,},
|
||||||
|
@ -384,6 +384,7 @@ const pdlabel_t pdlabels[] =
|
||||||
{0xffbd, 0, 0,},
|
{0xffbd, 0, 0,},
|
||||||
{0xffbe, 0, 0,},
|
{0xffbe, 0, 0,},
|
||||||
{0xffbf, 0, 0,},
|
{0xffbf, 0, 0,},
|
||||||
|
|
||||||
{0xffc0, 0, 0,},
|
{0xffc0, 0, 0,},
|
||||||
{0xffc1, 0, 0,},
|
{0xffc1, 0, 0,},
|
||||||
{0xffc2, 0, 0,},
|
{0xffc2, 0, 0,},
|
||||||
|
@ -400,6 +401,7 @@ const pdlabel_t pdlabels[] =
|
||||||
{0xffcd, "DSPA", "DSP DMA DMEM Address",},
|
{0xffcd, "DSPA", "DSP DMA DMEM Address",},
|
||||||
{0xffce, "DSMAH", "DSP DMA Mem Address H",},
|
{0xffce, "DSMAH", "DSP DMA Mem Address H",},
|
||||||
{0xffcf, "DSMAL", "DSP DMA Mem Address L",},
|
{0xffcf, "DSMAL", "DSP DMA Mem Address L",},
|
||||||
|
|
||||||
{0xffd0, 0,0,},
|
{0xffd0, 0,0,},
|
||||||
{0xffd1, "SampleFormat", "SampleFormat",},
|
{0xffd1, "SampleFormat", "SampleFormat",},
|
||||||
{0xffd2, 0,0,},
|
{0xffd2, 0,0,},
|
||||||
|
@ -416,6 +418,7 @@ const pdlabel_t pdlabels[] =
|
||||||
{0xffdd, "ARAM", "Direct Read from ARAM (uses ADPCM)",},
|
{0xffdd, "ARAM", "Direct Read from ARAM (uses ADPCM)",},
|
||||||
{0xffde, "GAIN", "Gain",},
|
{0xffde, "GAIN", "Gain",},
|
||||||
{0xffdf, 0,0,},
|
{0xffdf, 0,0,},
|
||||||
|
|
||||||
{0xffe0, 0,0,},
|
{0xffe0, 0,0,},
|
||||||
{0xffe1, 0,0,},
|
{0xffe1, 0,0,},
|
||||||
{0xffe2, 0,0,},
|
{0xffe2, 0,0,},
|
||||||
|
@ -432,6 +435,7 @@ const pdlabel_t pdlabels[] =
|
||||||
{0xffed, 0,0,},
|
{0xffed, 0,0,},
|
||||||
{0xffee, 0,0,},
|
{0xffee, 0,0,},
|
||||||
{0xffef, "AMDM", "ARAM DMA Request Mask",},
|
{0xffef, "AMDM", "ARAM DMA Request Mask",},
|
||||||
|
|
||||||
{0xfff0, 0,0,},
|
{0xfff0, 0,0,},
|
||||||
{0xfff1, 0,0,},
|
{0xfff1, 0,0,},
|
||||||
{0xfff2, 0,0,},
|
{0xfff2, 0,0,},
|
||||||
|
|
|
@ -26,6 +26,7 @@ bool DSPHost_OnThread() { return false; }
|
||||||
bool DSPHost_Running() { return true; }
|
bool DSPHost_Running() { return true; }
|
||||||
u32 DSPHost_CodeLoaded(const u8 *ptr, int size) {return 0x1337c0de;}
|
u32 DSPHost_CodeLoaded(const u8 *ptr, int size) {return 0x1337c0de;}
|
||||||
void DSPHost_InterruptRequest() {}
|
void DSPHost_InterruptRequest() {}
|
||||||
|
void DSPHost_UpdateDebugger() {}
|
||||||
|
|
||||||
// This test goes from text ASM to binary to text ASM and once again back to binary.
|
// This test goes from text ASM to binary to text ASM and once again back to binary.
|
||||||
// Then the two binaries are compared.
|
// Then the two binaries are compared.
|
||||||
|
|
|
@ -69,7 +69,7 @@ u32 DSPHost_CodeLoaded(const u8 *ptr, int size)
|
||||||
|
|
||||||
// this crc is comparable with the HLE plugin
|
// this crc is comparable with the HLE plugin
|
||||||
u32 ector_crc = 0;
|
u32 ector_crc = 0;
|
||||||
for (u32 i = 0; i < size; i++)
|
for (int i = 0; i < size; i++)
|
||||||
{
|
{
|
||||||
ector_crc ^= ptr[i];
|
ector_crc ^= ptr[i];
|
||||||
//let's rol
|
//let's rol
|
||||||
|
@ -85,7 +85,8 @@ u32 DSPHost_CodeLoaded(const u8 *ptr, int size)
|
||||||
|
|
||||||
DSPSymbols::Clear();
|
DSPSymbols::Clear();
|
||||||
bool success = false;
|
bool success = false;
|
||||||
switch (ector_crc) {
|
switch (ector_crc)
|
||||||
|
{
|
||||||
case 0x86840740: success = DSPSymbols::ReadAnnotatedAssembly("../../Docs/DSP/DSP_UC_Zelda.txt"); break;
|
case 0x86840740: success = DSPSymbols::ReadAnnotatedAssembly("../../Docs/DSP/DSP_UC_Zelda.txt"); break;
|
||||||
case 0x42f64ac4: success = DSPSymbols::ReadAnnotatedAssembly("../../Docs/DSP/DSP_UC_Luigi.txt"); break;
|
case 0x42f64ac4: success = DSPSymbols::ReadAnnotatedAssembly("../../Docs/DSP/DSP_UC_Luigi.txt"); break;
|
||||||
case 0x4e8a8b21: success = DSPSymbols::ReadAnnotatedAssembly("../../Docs/DSP/DSP_UC_AX1.txt"); break;
|
case 0x4e8a8b21: success = DSPSymbols::ReadAnnotatedAssembly("../../Docs/DSP/DSP_UC_AX1.txt"); break;
|
||||||
|
@ -102,3 +103,8 @@ u32 DSPHost_CodeLoaded(const u8 *ptr, int size)
|
||||||
m_DebuggerFrame->Refresh();
|
m_DebuggerFrame->Refresh();
|
||||||
return crc;
|
return crc;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void DSPHost_UpdateDebugger()
|
||||||
|
{
|
||||||
|
m_DebuggerFrame->Refresh();
|
||||||
|
}
|
||||||
|
|
|
@ -39,8 +39,6 @@ DSPDebuggerLLE::DSPDebuggerLLE(wxWindow *parent, wxWindowID id, const wxString &
|
||||||
const wxPoint &position, const wxSize& size, long style)
|
const wxPoint &position, const wxSize& size, long style)
|
||||||
: wxFrame(parent, id, title, position, size, style)
|
: wxFrame(parent, id, title, position, size, style)
|
||||||
, m_CachedStepCounter(-1)
|
, m_CachedStepCounter(-1)
|
||||||
, m_CachedCR(-1)
|
|
||||||
, m_State(RUN)
|
|
||||||
{
|
{
|
||||||
CreateGUIControls();
|
CreateGUIControls();
|
||||||
}
|
}
|
||||||
|
@ -87,6 +85,8 @@ void DSPDebuggerLLE::CreateGUIControls()
|
||||||
|
|
||||||
this->SetSizer(sMain);
|
this->SetSizer(sMain);
|
||||||
this->Layout();
|
this->Layout();
|
||||||
|
|
||||||
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
void DSPDebuggerLLE::OnClose(wxCloseEvent& event)
|
void DSPDebuggerLLE::OnClose(wxCloseEvent& event)
|
||||||
|
@ -99,15 +99,17 @@ void DSPDebuggerLLE::OnChangeState(wxCommandEvent& event)
|
||||||
switch (event.GetId())
|
switch (event.GetId())
|
||||||
{
|
{
|
||||||
case ID_RUNTOOL:
|
case ID_RUNTOOL:
|
||||||
if ((m_State == RUN) || (m_State == RUN_START))
|
if (DSPCore_GetState() == DSPCORE_RUNNING)
|
||||||
m_State = PAUSE;
|
DSPCore_SetState(DSPCORE_STEPPING);
|
||||||
else
|
else
|
||||||
m_State = RUN_START;
|
DSPCore_SetState(DSPCORE_RUNNING);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case ID_STEPTOOL:
|
case ID_STEPTOOL:
|
||||||
m_State = STEP;
|
if (DSPCore_GetState() == DSPCORE_STEPPING)
|
||||||
|
DSPCore_Step();
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case ID_SHOWPCTOOL:
|
case ID_SHOWPCTOOL:
|
||||||
FocusOnPC();
|
FocusOnPC();
|
||||||
break;
|
break;
|
||||||
|
@ -137,10 +139,14 @@ void DSPDebuggerLLE::FocusOnPC()
|
||||||
|
|
||||||
void DSPDebuggerLLE::UpdateState()
|
void DSPDebuggerLLE::UpdateState()
|
||||||
{
|
{
|
||||||
if ((m_State == RUN) || (m_State == RUN_START))
|
if (DSPCore_GetState() == DSPCORE_RUNNING) {
|
||||||
m_Toolbar->FindById(ID_RUNTOOL)->SetLabel(wxT("Pause"));
|
m_Toolbar->FindById(ID_RUNTOOL)->SetLabel(wxT("Pause"));
|
||||||
else
|
m_Toolbar->FindById(ID_STEPTOOL)->Enable(false);
|
||||||
|
}
|
||||||
|
else {
|
||||||
m_Toolbar->FindById(ID_RUNTOOL)->SetLabel(wxT("Run"));
|
m_Toolbar->FindById(ID_RUNTOOL)->SetLabel(wxT("Run"));
|
||||||
|
m_Toolbar->FindById(ID_STEPTOOL)->Enable(true);
|
||||||
|
}
|
||||||
m_Toolbar->Realize();
|
m_Toolbar->Realize();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -188,54 +194,7 @@ void DSPDebuggerLLE::OnSymbolListChange(wxCommandEvent& event)
|
||||||
|
|
||||||
void DSPDebuggerLLE::UpdateRegisterFlags()
|
void DSPDebuggerLLE::UpdateRegisterFlags()
|
||||||
{
|
{
|
||||||
if (m_CachedCR == g_dsp.cr)
|
|
||||||
return;
|
|
||||||
|
|
||||||
// m_Toolbar->ToggleTool(ID_CHECK_ASSERTINT, g_dsp.cr & 0x02 ? true : false);
|
|
||||||
// m_Toolbar->ToggleTool(ID_CHECK_HALT, g_dsp.cr & 0x04 ? true : false);
|
|
||||||
// m_Toolbar->ToggleTool(ID_CHECK_INIT, g_dsp.cr & 0x800 ? true : false);
|
|
||||||
|
|
||||||
m_CachedCR = g_dsp.cr;
|
|
||||||
}
|
|
||||||
|
|
||||||
bool DSPDebuggerLLE::CanDoStep()
|
|
||||||
{
|
|
||||||
// update the symbols all the time because they're script cmds like bps
|
|
||||||
UpdateSymbolMap();
|
|
||||||
|
|
||||||
switch (m_State)
|
|
||||||
{
|
|
||||||
case RUN_START:
|
|
||||||
m_State = RUN;
|
|
||||||
return true;
|
|
||||||
|
|
||||||
case RUN:
|
|
||||||
/*
|
|
||||||
if (IsBreakPoint(g_dsp.pc))
|
|
||||||
{
|
|
||||||
Refresh();
|
|
||||||
m_State = PAUSE;
|
|
||||||
return false;
|
|
||||||
}*/
|
|
||||||
|
|
||||||
return true;
|
|
||||||
|
|
||||||
case PAUSE:
|
|
||||||
Refresh();
|
|
||||||
return false;
|
|
||||||
|
|
||||||
case STEP:
|
|
||||||
Refresh();
|
|
||||||
m_State = PAUSE;
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
|
|
||||||
void DSPDebuggerLLE::DebugBreak()
|
|
||||||
{
|
|
||||||
m_State = PAUSE;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void DSPDebuggerLLE::OnAddrBoxChange(wxCommandEvent& event)
|
void DSPDebuggerLLE::OnAddrBoxChange(wxCommandEvent& event)
|
||||||
|
|
|
@ -54,8 +54,6 @@ public:
|
||||||
|
|
||||||
virtual ~DSPDebuggerLLE();
|
virtual ~DSPDebuggerLLE();
|
||||||
|
|
||||||
bool CanDoStep();
|
|
||||||
void DebugBreak();
|
|
||||||
void Refresh();
|
void Refresh();
|
||||||
|
|
||||||
private:
|
private:
|
||||||
|
@ -95,18 +93,8 @@ private:
|
||||||
COLUMN_PARAM,
|
COLUMN_PARAM,
|
||||||
};
|
};
|
||||||
|
|
||||||
enum EState
|
|
||||||
{
|
|
||||||
PAUSE,
|
|
||||||
STEP,
|
|
||||||
RUN,
|
|
||||||
RUN_START // ignores breakpoints and switches after one step to RUN
|
|
||||||
};
|
|
||||||
EState m_State;
|
|
||||||
|
|
||||||
DSPDebugInterface debug_interface;
|
DSPDebugInterface debug_interface;
|
||||||
u64 m_CachedStepCounter;
|
u64 m_CachedStepCounter;
|
||||||
u16 m_CachedCR;
|
|
||||||
|
|
||||||
// GUI updaters
|
// GUI updaters
|
||||||
void UpdateDisAsmListView();
|
void UpdateDisAsmListView();
|
||||||
|
|
|
@ -45,17 +45,12 @@ DSPDebuggerLLE* m_DebuggerFrame = NULL;
|
||||||
PLUGIN_GLOBALS* globals = NULL;
|
PLUGIN_GLOBALS* globals = NULL;
|
||||||
DSPInitialize g_dspInitialize;
|
DSPInitialize g_dspInitialize;
|
||||||
Common::Thread *g_hDSPThread = NULL;
|
Common::Thread *g_hDSPThread = NULL;
|
||||||
|
|
||||||
SoundStream *soundStream = NULL;
|
SoundStream *soundStream = NULL;
|
||||||
|
|
||||||
#define GDSP_MBOX_CPU 0
|
|
||||||
#define GDSP_MBOX_DSP 1
|
|
||||||
|
|
||||||
bool bCanWork = false;
|
|
||||||
bool bIsRunning = false;
|
bool bIsRunning = false;
|
||||||
|
|
||||||
//////////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////////
|
||||||
// UGLY wxw stuff, TODO fix up
|
// UGLY WxW stuff, TODO fix up
|
||||||
// wxWidgets: Create the wxApp
|
// wxWidgets: Create the wxApp
|
||||||
#if defined(HAVE_WX) && HAVE_WX
|
#if defined(HAVE_WX) && HAVE_WX
|
||||||
class wxDLLApp : public wxApp
|
class wxDLLApp : public wxApp
|
||||||
|
@ -188,14 +183,14 @@ THREAD_RETURN dsp_thread(void* lpParameter)
|
||||||
void DSP_DebugBreak()
|
void DSP_DebugBreak()
|
||||||
{
|
{
|
||||||
#if defined(HAVE_WX) && HAVE_WX
|
#if defined(HAVE_WX) && HAVE_WX
|
||||||
if(m_DebuggerFrame)
|
// if (m_DebuggerFrame)
|
||||||
m_DebuggerFrame->DebugBreak();
|
// m_DebuggerFrame->DebugBreak();
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
void Initialize(void *init)
|
void Initialize(void *init)
|
||||||
{
|
{
|
||||||
bCanWork = true;
|
bool bCanWork = true;
|
||||||
g_dspInitialize = *(DSPInitialize*)init;
|
g_dspInitialize = *(DSPInitialize*)init;
|
||||||
|
|
||||||
g_Config.Load();
|
g_Config.Load();
|
||||||
|
@ -324,7 +319,7 @@ void DSP_Update(int cycles)
|
||||||
// If we're not on a thread, run cycles here.
|
// If we're not on a thread, run cycles here.
|
||||||
if (!g_dspInitialize.bOnThread)
|
if (!g_dspInitialize.bOnThread)
|
||||||
{
|
{
|
||||||
DSPInterpreter::RunCycles(cycles);
|
DSPCore_RunCycles(cycles);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1008,34 +1008,46 @@ void 04f1_Unk() {
|
||||||
04f1 8e00 set16
|
04f1 8e00 set16
|
||||||
04f2 009b 0e44 lri $AX1.H, #0x0e44
|
04f2 009b 0e44 lri $AX1.H, #0x0e44
|
||||||
04f4 009d 00c0 lri $AC1.L, #0x00c0
|
04f4 009d 00c0 lri $AC1.L, #0x00c0
|
||||||
04f6 02bf 0541 call 0x0541
|
// 04f6 02bf 0541 call 0x0541
|
||||||
|
0541_DMA_Transfer();
|
||||||
|
|
||||||
04f8 4900 addax $ACC1, $AX0.L
|
04f8 4900 addax $ACC1, $AX0.L
|
||||||
04f9 00ff 0e1d sr @0x0e1d, $AC1.M
|
04f9 00ff 0e1d sr @0x0e1d, $AC1.M
|
||||||
04fb 00fd 0e1e sr @0x0e1e, $AC1.L
|
04fb 00fd 0e1e sr @0x0e1e, $AC1.L
|
||||||
04fd 8900 clr $ACC1
|
04fd 8900 clr $ACC1
|
||||||
04fe 02bf 055c call 0x055c
|
// 04fe 02bf 055c call 0x055c
|
||||||
|
WaitDMA();
|
||||||
|
|
||||||
0500 1104 052c bloopi #0x04, 0x052c
|
0500 1104 052c bloopi #0x04, 0x052c
|
||||||
0502 00da 0e1d lr $AX0.H, @0x0e1d
|
0502 00da 0e1d lr $AX0.H, @0x0e1d
|
||||||
0504 00d8 0e1e lr $AX0.L, @0x0e1e
|
0504 00d8 0e1e lr $AX0.L, @0x0e1e
|
||||||
0506 009b 0ea4 lri $AX1.H, #0x0ea4
|
0506 009b 0ea4 lri $AX1.H, #0x0ea4
|
||||||
0508 009d 00c0 lri $AC1.L, #0x00c0
|
0508 009d 00c0 lri $AC1.L, #0x00c0
|
||||||
050a 02bf 0541 call 0x0541
|
// 050a 02bf 0541 call 0x0541
|
||||||
|
0541_DMA_Transfer();
|
||||||
|
|
||||||
050c 4900 addax $ACC1, $AX0.L
|
050c 4900 addax $ACC1, $AX0.L
|
||||||
050d 00ff 0e1d sr @0x0e1d, $AC1.M
|
050d 00ff 0e1d sr @0x0e1d, $AC1.M
|
||||||
050f 00fd 0e1e sr @0x0e1e, $AC1.L
|
050f 00fd 0e1e sr @0x0e1e, $AC1.L
|
||||||
0511 0083 0e44 lri $AR3, #0x0e44
|
0511 0083 0e44 lri $AR3, #0x0e44
|
||||||
0513 02bf 054c call 0x054c
|
// 0513 02bf 054c call 0x054c
|
||||||
|
054c_UnknownMulBuffer();
|
||||||
|
|
||||||
0515 8900 clr $ACC1
|
0515 8900 clr $ACC1
|
||||||
0516 00da 0e1d lr $AX0.H, @0x0e1d
|
0516 00da 0e1d lr $AX0.H, @0x0e1d
|
||||||
0518 00d8 0e1e lr $AX0.L, @0x0e1e
|
0518 00d8 0e1e lr $AX0.L, @0x0e1e
|
||||||
051a 009b 0e44 lri $AX1.H, #0x0e44
|
051a 009b 0e44 lri $AX1.H, #0x0e44
|
||||||
051c 009d 00c0 lri $AC1.L, #0x00c0
|
051c 009d 00c0 lri $AC1.L, #0x00c0
|
||||||
051e 02bf 0541 call 0x0541
|
// 051e 02bf 0541 call 0x0541
|
||||||
|
0541_DMA_Transfer();
|
||||||
|
|
||||||
0520 4900 addax $ACC1, $AX0.L
|
0520 4900 addax $ACC1, $AX0.L
|
||||||
0521 00ff 0e1d sr @0x0e1d, $AC1.M
|
0521 00ff 0e1d sr @0x0e1d, $AC1.M
|
||||||
0523 00fd 0e1e sr @0x0e1e, $AC1.L
|
0523 00fd 0e1e sr @0x0e1e, $AC1.L
|
||||||
0525 0083 0ea4 lri $AR3, #0x0ea4
|
0525 0083 0ea4 lri $AR3, #0x0ea4
|
||||||
0527 02bf 054c call 0x054c
|
// 0527 02bf 054c call 0x054c
|
||||||
|
054c_UnknownMulBuffer();
|
||||||
|
|
||||||
0529 0000 nop
|
0529 0000 nop
|
||||||
052a 0000 nop
|
052a 0000 nop
|
||||||
052b 8e00 set16
|
052b 8e00 set16
|
||||||
|
@ -1044,12 +1056,18 @@ void 04f1_Unk() {
|
||||||
052f 00d8 0e1e lr $AX0.L, @0x0e1e
|
052f 00d8 0e1e lr $AX0.L, @0x0e1e
|
||||||
0531 009b 0ea4 lri $AX1.H, #0x0ea4
|
0531 009b 0ea4 lri $AX1.H, #0x0ea4
|
||||||
0533 009d 00c0 lri $AC1.L, #0x00c0
|
0533 009d 00c0 lri $AC1.L, #0x00c0
|
||||||
0535 02bf 0541 call 0x0541
|
// 0535 02bf 0541 call 0x0541
|
||||||
|
0541_DMA_Transfer();
|
||||||
|
|
||||||
0537 4900 addax $ACC1, $AX0.L
|
0537 4900 addax $ACC1, $AX0.L
|
||||||
0538 0083 0e44 lri $AR3, #0x0e44
|
0538 0083 0e44 lri $AR3, #0x0e44
|
||||||
053a 02bf 054c call 0x054c
|
// 053a 02bf 054c call 0x054c
|
||||||
|
054c_UnknownMulBuffer();
|
||||||
|
|
||||||
053c 0083 0ea4 lri $AR3, #0x0ea4
|
053c 0083 0ea4 lri $AR3, #0x0ea4
|
||||||
053e 02bf 054c call 0x054c
|
// 053e 02bf 054c call 0x054c
|
||||||
|
054c_UnknownMulBuffer();
|
||||||
|
|
||||||
0540 02df ret
|
0540 02df ret
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1622,6 +1640,7 @@ void 079d_Unk() {
|
||||||
07bf 02df ret
|
07bf 02df ret
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void 07c0_Unk() {
|
||||||
07c0 00c0 0e40 lr $AR0, @0x0e40
|
07c0 00c0 0e40 lr $AR0, @0x0e40
|
||||||
07c2 0081 0b89 lri $AR1, #0x0b89
|
07c2 0081 0b89 lri $AR1, #0x0b89
|
||||||
07c4 00c2 0e08 lr $AR2, @0x0e08
|
07c4 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -1650,8 +1669,9 @@ void 079d_Unk() {
|
||||||
07ef 00f8 0bab sr @0x0bab, $AX0.L
|
07ef 00f8 0bab sr @0x0bab, $AX0.L
|
||||||
07f1 00fb 0bae sr @0x0bae, $AX1.H
|
07f1 00fb 0bae sr @0x0bae, $AX1.H
|
||||||
07f3 02df ret
|
07f3 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 07f4_Unk() {
|
||||||
07f4 00c0 0e40 lr $AR0, @0x0e40
|
07f4 00c0 0e40 lr $AR0, @0x0e40
|
||||||
07f6 0081 0b89 lri $AR1, #0x0b89
|
07f6 0081 0b89 lri $AR1, #0x0b89
|
||||||
07f8 00c2 0e08 lr $AR2, @0x0e08
|
07f8 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -1668,8 +1688,9 @@ void 079d_Unk() {
|
||||||
080c 02bf 81f9 call 0x81f9
|
080c 02bf 81f9 call 0x81f9
|
||||||
080e 00f8 0baf sr @0x0baf, $AX0.L
|
080e 00f8 0baf sr @0x0baf, $AX0.L
|
||||||
0810 02df ret
|
0810 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 0811_Unk() {
|
||||||
0811 00c0 0e40 lr $AR0, @0x0e40
|
0811 00c0 0e40 lr $AR0, @0x0e40
|
||||||
0813 0081 0b89 lri $AR1, #0x0b89
|
0813 0081 0b89 lri $AR1, #0x0b89
|
||||||
0815 00c2 0e08 lr $AR2, @0x0e08
|
0815 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -1698,8 +1719,9 @@ void 079d_Unk() {
|
||||||
083f 00f8 0baf sr @0x0baf, $AX0.L
|
083f 00f8 0baf sr @0x0baf, $AX0.L
|
||||||
0841 00fb 0bb0 sr @0x0bb0, $AX1.H
|
0841 00fb 0bb0 sr @0x0bb0, $AX1.H
|
||||||
0843 02df ret
|
0843 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 0844_Unk() {
|
||||||
0844 00c0 0e40 lr $AR0, @0x0e40
|
0844 00c0 0e40 lr $AR0, @0x0e40
|
||||||
0846 0081 0b89 lri $AR1, #0x0b89
|
0846 0081 0b89 lri $AR1, #0x0b89
|
||||||
0848 00c2 0e08 lr $AR2, @0x0e08
|
0848 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -1728,8 +1750,9 @@ void 079d_Unk() {
|
||||||
0872 00f8 0bb1 sr @0x0bb1, $AX0.L
|
0872 00f8 0bb1 sr @0x0bb1, $AX0.L
|
||||||
0874 00fb 0baf sr @0x0baf, $AX1.H
|
0874 00fb 0baf sr @0x0baf, $AX1.H
|
||||||
0876 02df ret
|
0876 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 0877_Unk() {
|
||||||
0877 00c0 0e40 lr $AR0, @0x0e40
|
0877 00c0 0e40 lr $AR0, @0x0e40
|
||||||
0879 0081 0b89 lri $AR1, #0x0b89
|
0879 0081 0b89 lri $AR1, #0x0b89
|
||||||
087b 00c2 0e08 lr $AR2, @0x0e08
|
087b 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -1773,8 +1796,9 @@ void 079d_Unk() {
|
||||||
08c1 02bf 81f9 call 0x81f9
|
08c1 02bf 81f9 call 0x81f9
|
||||||
08c3 00f8 0bb1 sr @0x0bb1, $AX0.L
|
08c3 00f8 0bb1 sr @0x0bb1, $AX0.L
|
||||||
08c5 02df ret
|
08c5 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 08c6_Unk() {
|
||||||
08c6 00c0 0e40 lr $AR0, @0x0e40
|
08c6 00c0 0e40 lr $AR0, @0x0e40
|
||||||
08c8 0081 0b89 lri $AR1, #0x0b89
|
08c8 0081 0b89 lri $AR1, #0x0b89
|
||||||
08ca 00c2 0e08 lr $AR2, @0x0e08
|
08ca 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -1785,8 +1809,9 @@ void 079d_Unk() {
|
||||||
08d4 00f8 0ba9 sr @0x0ba9, $AX0.L
|
08d4 00f8 0ba9 sr @0x0ba9, $AX0.L
|
||||||
08d6 00fb 0bac sr @0x0bac, $AX1.H
|
08d6 00fb 0bac sr @0x0bac, $AX1.H
|
||||||
08d8 02df ret
|
08d8 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 08d9_Unk() {
|
||||||
08d9 00c0 0e40 lr $AR0, @0x0e40
|
08d9 00c0 0e40 lr $AR0, @0x0e40
|
||||||
08db 0081 0b89 lri $AR1, #0x0b89
|
08db 0081 0b89 lri $AR1, #0x0b89
|
||||||
08dd 00c2 0e08 lr $AR2, @0x0e08
|
08dd 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -1806,8 +1831,9 @@ void 079d_Unk() {
|
||||||
08f9 00f8 0baa sr @0x0baa, $AX0.L
|
08f9 00f8 0baa sr @0x0baa, $AX0.L
|
||||||
08fb 00fb 0bad sr @0x0bad, $AX1.H
|
08fb 00fb 0bad sr @0x0bad, $AX1.H
|
||||||
08fd 02df ret
|
08fd 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 08fe_Unk() {
|
||||||
08fe 00c0 0e40 lr $AR0, @0x0e40
|
08fe 00c0 0e40 lr $AR0, @0x0e40
|
||||||
0900 0081 0b89 lri $AR1, #0x0b89
|
0900 0081 0b89 lri $AR1, #0x0b89
|
||||||
0902 00c2 0e08 lr $AR2, @0x0e08
|
0902 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -1827,8 +1853,9 @@ void 079d_Unk() {
|
||||||
091e 00f8 0bab sr @0x0bab, $AX0.L
|
091e 00f8 0bab sr @0x0bab, $AX0.L
|
||||||
0920 00fb 0bae sr @0x0bae, $AX1.H
|
0920 00fb 0bae sr @0x0bae, $AX1.H
|
||||||
0922 02df ret
|
0922 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 0923_Unk() {
|
||||||
0923 00c0 0e40 lr $AR0, @0x0e40
|
0923 00c0 0e40 lr $AR0, @0x0e40
|
||||||
0925 0081 0b89 lri $AR1, #0x0b89
|
0925 0081 0b89 lri $AR1, #0x0b89
|
||||||
0927 00c2 0e08 lr $AR2, @0x0e08
|
0927 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -1857,8 +1884,9 @@ void 079d_Unk() {
|
||||||
0955 00f8 0bab sr @0x0bab, $AX0.L
|
0955 00f8 0bab sr @0x0bab, $AX0.L
|
||||||
0957 00fb 0bae sr @0x0bae, $AX1.H
|
0957 00fb 0bae sr @0x0bae, $AX1.H
|
||||||
0959 02df ret
|
0959 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 095a_Unk() {
|
||||||
095a 00c0 0e40 lr $AR0, @0x0e40
|
095a 00c0 0e40 lr $AR0, @0x0e40
|
||||||
095c 0081 0b89 lri $AR1, #0x0b89
|
095c 0081 0b89 lri $AR1, #0x0b89
|
||||||
095e 00c2 0e08 lr $AR2, @0x0e08
|
095e 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -1875,8 +1903,9 @@ void 079d_Unk() {
|
||||||
0974 02bf 845d call 0x845d
|
0974 02bf 845d call 0x845d
|
||||||
0976 00f8 0baf sr @0x0baf, $AX0.L
|
0976 00f8 0baf sr @0x0baf, $AX0.L
|
||||||
0978 02df ret
|
0978 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 0979_Unk() {
|
||||||
0979 00c0 0e40 lr $AR0, @0x0e40
|
0979 00c0 0e40 lr $AR0, @0x0e40
|
||||||
097b 0081 0b89 lri $AR1, #0x0b89
|
097b 0081 0b89 lri $AR1, #0x0b89
|
||||||
097d 00c2 0e08 lr $AR2, @0x0e08
|
097d 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -1905,8 +1934,9 @@ void 079d_Unk() {
|
||||||
09aa 00f8 0baf sr @0x0baf, $AX0.L
|
09aa 00f8 0baf sr @0x0baf, $AX0.L
|
||||||
09ac 00fb 0bb0 sr @0x0bb0, $AX1.H
|
09ac 00fb 0bb0 sr @0x0bb0, $AX1.H
|
||||||
09ae 02df ret
|
09ae 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 09af_Unk() {
|
||||||
09af 00c0 0e40 lr $AR0, @0x0e40
|
09af 00c0 0e40 lr $AR0, @0x0e40
|
||||||
09b1 0081 0b89 lri $AR1, #0x0b89
|
09b1 0081 0b89 lri $AR1, #0x0b89
|
||||||
09b3 00c2 0e08 lr $AR2, @0x0e08
|
09b3 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -1935,8 +1965,9 @@ void 079d_Unk() {
|
||||||
09e0 00f8 0bb1 sr @0x0bb1, $AX0.L
|
09e0 00f8 0bb1 sr @0x0bb1, $AX0.L
|
||||||
09e2 00fb 0baf sr @0x0baf, $AX1.H
|
09e2 00fb 0baf sr @0x0baf, $AX1.H
|
||||||
09e4 02df ret
|
09e4 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 09e5_Unk() {
|
||||||
09e5 00c0 0e40 lr $AR0, @0x0e40
|
09e5 00c0 0e40 lr $AR0, @0x0e40
|
||||||
09e7 0081 0b89 lri $AR1, #0x0b89
|
09e7 0081 0b89 lri $AR1, #0x0b89
|
||||||
09e9 00c2 0e08 lr $AR2, @0x0e08
|
09e9 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -1980,8 +2011,9 @@ void 079d_Unk() {
|
||||||
0a34 02bf 845d call 0x845d
|
0a34 02bf 845d call 0x845d
|
||||||
0a36 00f8 0bb1 sr @0x0bb1, $AX0.L
|
0a36 00f8 0bb1 sr @0x0bb1, $AX0.L
|
||||||
0a38 02df ret
|
0a38 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 0a39_Unk() {
|
||||||
0a39 00c0 0e40 lr $AR0, @0x0e40
|
0a39 00c0 0e40 lr $AR0, @0x0e40
|
||||||
0a3b 0081 0b89 lri $AR1, #0x0b89
|
0a3b 0081 0b89 lri $AR1, #0x0b89
|
||||||
0a3d 00c2 0e08 lr $AR2, @0x0e08
|
0a3d 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -2001,8 +2033,9 @@ void 079d_Unk() {
|
||||||
0a56 00f8 0bab sr @0x0bab, $AX0.L
|
0a56 00f8 0bab sr @0x0bab, $AX0.L
|
||||||
0a58 00fb 0bae sr @0x0bae, $AX1.H
|
0a58 00fb 0bae sr @0x0bae, $AX1.H
|
||||||
0a5a 02df ret
|
0a5a 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 0a5b_Unk() {
|
||||||
0a5b 00c0 0e40 lr $AR0, @0x0e40
|
0a5b 00c0 0e40 lr $AR0, @0x0e40
|
||||||
0a5d 0081 0b89 lri $AR1, #0x0b89
|
0a5d 0081 0b89 lri $AR1, #0x0b89
|
||||||
0a5f 00c2 0e08 lr $AR2, @0x0e08
|
0a5f 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -2037,8 +2070,9 @@ void 079d_Unk() {
|
||||||
0a94 02bf 81f9 call 0x81f9
|
0a94 02bf 81f9 call 0x81f9
|
||||||
0a96 00f8 0bb0 sr @0x0bb0, $AX0.L
|
0a96 00f8 0bb0 sr @0x0bb0, $AX0.L
|
||||||
0a98 02df ret
|
0a98 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 0a99_Unk() {
|
||||||
0a99 00c0 0e40 lr $AR0, @0x0e40
|
0a99 00c0 0e40 lr $AR0, @0x0e40
|
||||||
0a9b 0081 0b89 lri $AR1, #0x0b89
|
0a9b 0081 0b89 lri $AR1, #0x0b89
|
||||||
0a9d 00c2 0e08 lr $AR2, @0x0e08
|
0a9d 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -2058,8 +2092,9 @@ void 079d_Unk() {
|
||||||
0ab8 00f8 0bab sr @0x0bab, $AX0.L
|
0ab8 00f8 0bab sr @0x0bab, $AX0.L
|
||||||
0aba 00fb 0bae sr @0x0bae, $AX1.H
|
0aba 00fb 0bae sr @0x0bae, $AX1.H
|
||||||
0abc 02df ret
|
0abc 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
|
void 0abd_Unk() {
|
||||||
0abd 00c0 0e40 lr $AR0, @0x0e40
|
0abd 00c0 0e40 lr $AR0, @0x0e40
|
||||||
0abf 0081 0b89 lri $AR1, #0x0b89
|
0abf 0081 0b89 lri $AR1, #0x0b89
|
||||||
0ac1 00c2 0e08 lr $AR2, @0x0e08
|
0ac1 00c2 0e08 lr $AR2, @0x0e08
|
||||||
|
@ -2094,8 +2129,9 @@ void 079d_Unk() {
|
||||||
0afa 02bf 845d call 0x845d
|
0afa 02bf 845d call 0x845d
|
||||||
0afc 00f8 0bb0 sr @0x0bb0, $AX0.L
|
0afc 00f8 0bb0 sr @0x0bb0, $AX0.L
|
||||||
0afe 02df ret
|
0afe 02df ret
|
||||||
|
}
|
||||||
|
|
||||||
# This looks like a jump table.
|
# This is a jump table.
|
||||||
0aff 0082 // Jump 0
|
0aff 0082 // Jump 0
|
||||||
0b00 013e // Jump 1
|
0b00 013e // Jump 1
|
||||||
0b01 01bc // Jump 2
|
0b01 01bc // Jump 2
|
||||||
|
@ -2114,45 +2150,53 @@ void 079d_Unk() {
|
||||||
0b0e 047a // Jump f
|
0b0e 047a // Jump f
|
||||||
0b0f 0bb1 // Jump 10
|
0b0f 0bb1 // Jump 10
|
||||||
0b10 0175 // Jump 11
|
0b10 0175 // Jump 11
|
||||||
0b11 0768 // Jump 12
|
|
||||||
0b12 077a cmpis $ACC1, #0x7a
|
# Another one here - choose from a number of mixers?
|
||||||
0b13 079d cmpis $ACC1, #0x9d
|
0b11 0768 // Jump3 0
|
||||||
0b14 07c0 cmpis $ACC1, #0xc0
|
0b12 077a // Jump3 1
|
||||||
0b15 07f4 cmpis $ACC1, #0xf4
|
0b13 079d // Jump3 2
|
||||||
0b16 0811 lris $AX0.L, #0x11
|
0b14 07c0 // Jump3 3
|
||||||
0b17 0844 lris $AX0.L, #0x44
|
0b15 07f4 // Jump3 4
|
||||||
0b18 0877 lris $AX0.L, #0x77
|
0b16 0811 // Jump3 5
|
||||||
0b19 08c6 lris $AX0.L, #0xc6
|
0b17 0844 // Jump3 6
|
||||||
0b1a 08d9 lris $AX0.L, #0xd9
|
0b18 0877 // Jump3 7
|
||||||
0b1b 08fe lris $AX0.L, #0xfe
|
0b19 08c6 // Jump3 8
|
||||||
0b1c 0923 lris $AX1.L, #0x23
|
0b1a 08d9 // Jump3 9
|
||||||
0b1d 095a lris $AX1.L, #0x5a
|
0b1b 08fe // Jump3 a
|
||||||
0b1e 0979 lris $AX1.L, #0x79
|
0b1c 0923 // Jump3 b
|
||||||
0b1f 09af lris $AX1.L, #0xaf
|
0b1d 095a // Jump3 c
|
||||||
0b20 09e5 lris $AX1.L, #0xe5
|
0b1e 0979 // Jump3 d
|
||||||
0b21 0a39 lris $AX0.H, #0x39
|
0b1f 09af // Jump3 e
|
||||||
0b22 0a5b lris $AX0.H, #0x5b
|
0b20 09e5 // Jump3 f
|
||||||
0b23 0768 cmpis $ACC1, #0x68
|
|
||||||
0b24 0768 cmpis $ACC1, #0x68
|
0b21 0a39 // Jump3 10
|
||||||
0b25 0768 cmpis $ACC1, #0x68
|
0b22 0a5b // Jump3 11
|
||||||
0b26 0768 cmpis $ACC1, #0x68
|
0b23 0768 // Jump3 12
|
||||||
0b27 0768 cmpis $ACC1, #0x68
|
0b24 0768 // Jump3 13
|
||||||
0b28 0768 cmpis $ACC1, #0x68
|
0b25 0768 // Jump3 14
|
||||||
0b29 0a99 lris $AX0.H, #0x99
|
0b26 0768 // Jump3 15
|
||||||
0b2a 0abd lris $AX0.H, #0xbd
|
0b27 0768 // Jump3 16
|
||||||
0b2b 0768 cmpis $ACC1, #0x68
|
0b28 0768 // Jump3 17
|
||||||
0b2c 0768 cmpis $ACC1, #0x68
|
0b29 0a99 // Jump3 18
|
||||||
0b2d 0768 cmpis $ACC1, #0x68
|
0b2a 0abd // Jump3 19
|
||||||
0b2e 0768 cmpis $ACC1, #0x68
|
0b2b 0768 // Jump3 1a
|
||||||
0b2f 0768 cmpis $ACC1, #0x68
|
0b2c 0768 // Jump3 1b
|
||||||
0b30 0768 cmpis $ACC1, #0x68
|
0b2d 0768 // Jump3 1c
|
||||||
0b31 05a8 addis $ACC1, #0xa8
|
0b2e 0768 // Jump3 1d
|
||||||
0b32 065d cmpis $ACC0, #0x5d
|
0b2f 0768 // Jump3 1e
|
||||||
0b33 0707 cmpis $ACC1, #0x07
|
0b30 0768 // Jump3 1f
|
||||||
0b34 1000 loopi #0x00
|
|
||||||
0b35 1200 sbclr #0x00
|
# And another LUT starts here.
|
||||||
0b36 1400 lsl $ACC0, #0
|
0b31 05a8 // Jump4 0
|
||||||
# End of noise
|
0b32 065d // Jump4 1
|
||||||
|
0b33 0707 // Jump4 2
|
||||||
|
|
||||||
|
# And yet another one starts here.
|
||||||
|
0b34 1000
|
||||||
|
0b35 1200
|
||||||
|
0b36 1400
|
||||||
|
|
||||||
|
# End of noise - back to code.
|
||||||
|
|
||||||
void 0b37_JumpTable_8() {
|
void 0b37_JumpTable_8() {
|
||||||
0b37 8e00 set16
|
0b37 8e00 set16
|
||||||
|
@ -2463,10 +2507,10 @@ void 0c88_Int7_Handler() {
|
||||||
}
|
}
|
||||||
|
|
||||||
// Jump table for the next function.
|
// Jump table for the next function.
|
||||||
0c8d 0c9f
|
0c8d 0c9f // Jump2 0
|
||||||
0c8e 0ca2
|
0c8e 0ca2 // Jump2 1
|
||||||
0c8f 0cda
|
0c8f 0cda // Jump2 2
|
||||||
0c90 0cdd
|
0c90 0cdd // Jump2 3
|
||||||
|
|
||||||
void 0c91_JumpThroughTable2() {
|
void 0c91_JumpThroughTable2() {
|
||||||
0c91 8e00 set16
|
0c91 8e00 set16
|
||||||
|
|
|
@ -11,7 +11,6 @@ BIG Questions:
|
||||||
- Why is a PB-Transfer from RAM to DMEM 0xC0 shorts long but DMEM to RAM just 0x80
|
- Why is a PB-Transfer from RAM to DMEM 0xC0 shorts long but DMEM to RAM just 0x80
|
||||||
|
|
||||||
DSP functionality to test:
|
DSP functionality to test:
|
||||||
- CR
|
|
||||||
- Interrupts (7)
|
- Interrupts (7)
|
||||||
|
|
||||||
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// */
|
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// */
|
||||||
|
@ -354,8 +353,8 @@ void 0067_CopyCommand(_destAddr($AR0), _loopCount($AC0.M))
|
||||||
|
|
||||||
// 0072 02df ret
|
// 0072 02df ret
|
||||||
}
|
}
|
||||||
/*
|
|
||||||
|
|
||||||
|
/*
|
||||||
0073 029f 0043 jmp 0x0043
|
0073 029f 0043 jmp 0x0043
|
||||||
0075 029f 0043 jmp 0x0043
|
0075 029f 0043 jmp 0x0043
|
||||||
0077 029f 0095 jmp 0x0095
|
0077 029f 0095 jmp 0x0095
|
||||||
|
@ -1752,7 +1751,7 @@ void 0561_SetupAcceleratorForMysteryAccess(ARAMAddress(ACC0), DestBuffer(AC1.M),
|
||||||
0569 2ed7 srs @ACEAL, $AC0.M
|
0569 2ed7 srs @ACEAL, $AC0.M
|
||||||
056a 1fda mrr $AC0.M, $AX0.H
|
056a 1fda mrr $AC0.M, $AX0.H
|
||||||
056b 1f98 mrr $AC0.L, $AX0.L
|
056b 1f98 mrr $AC0.L, $AX0.L
|
||||||
// Multiply "current" address by 2 since it's in nibbles? (love these negative shifts :/)
|
// Divide "current" address by 2.
|
||||||
056c 147f lsr $ACC0, #-1
|
056c 147f lsr $ACC0, #-1
|
||||||
056d 2ed8 srs @ACCAH, $AC0.M // Current address
|
056d 2ed8 srs @ACCAH, $AC0.M // Current address
|
||||||
056e 2cd9 srs @ACCAL, $AC0.L
|
056e 2cd9 srs @ACCAL, $AC0.L
|
||||||
|
@ -1844,8 +1843,7 @@ void 05ad_SetupAccelerator(_acceleratorH(AC0.M), _accleratorL(AC0.L), _format(AC
|
||||||
// 05b7 02df ret
|
// 05b7 02df ret
|
||||||
}
|
}
|
||||||
|
|
||||||
void 05b8_NewMail()
|
void 05b8_NewMail() {
|
||||||
{
|
|
||||||
# 05b8 1205 sbclr #0x05
|
# 05b8 1205 sbclr #0x05
|
||||||
# 05b9 8e00 set16
|
# 05b9 8e00 set16
|
||||||
|
|
||||||
|
@ -1861,7 +1859,7 @@ void 05b8_NewMail()
|
||||||
*/
|
*/
|
||||||
|
|
||||||
*0x03fd = AC0.H
|
*0x03fd = AC0.H
|
||||||
*0x03fF = AC0.L
|
*0x03ff = AC0.L
|
||||||
ACC0 >>= 16
|
ACC0 >>= 16
|
||||||
*0x03fe = AC0.L
|
*0x03fe = AC0.L
|
||||||
*0x03fa = AX0.H
|
*0x03fa = AX0.H
|
||||||
|
@ -3124,6 +3122,7 @@ void Decoder0x08() {
|
||||||
09a7 2605 lrs $AC0.M, @0x0005
|
09a7 2605 lrs $AC0.M, @0x0005
|
||||||
09a8 b100 tst $ACC0
|
09a8 b100 tst $ACC0
|
||||||
09a9 0295 09be jz 0x09be
|
09a9 0295 09be jz 0x09be
|
||||||
|
|
||||||
09ab 8100 clr $ACC0
|
09ab 8100 clr $ACC0
|
||||||
09ac 2e05 srs @0x0005, $AC0.M
|
09ac 2e05 srs @0x0005, $AC0.M
|
||||||
09ad 2281 lrs $AX0.H, @0xff81
|
09ad 2281 lrs $AX0.H, @0xff81
|
||||||
|
@ -3162,6 +3161,7 @@ void Decoder0x08() {
|
||||||
09d4 0a01 lris $AX0.H, #0x01
|
09d4 0a01 lris $AX0.H, #0x01
|
||||||
09d5 00fa 0405 sr @0x0405, $AX0.H
|
09d5 00fa 0405 sr @0x0405, $AX0.H
|
||||||
09d7 029f 09ab jmp 0x09ab
|
09d7 029f 09ab jmp 0x09ab
|
||||||
|
|
||||||
09d9 1f5f mrr $AX0.H, $AC1.M
|
09d9 1f5f mrr $AX0.H, $AC1.M
|
||||||
09da 02bf 0a0a call 0x0a0a
|
09da 02bf 0a0a call 0x0a0a
|
||||||
09dc 00fa 0362 sr @0x0362, $AX0.H
|
09dc 00fa 0362 sr @0x0362, $AX0.H
|
||||||
|
|
Loading…
Reference in New Issue