diff --git a/Source/Core/Core/PowerPC/PowerPC.cpp b/Source/Core/Core/PowerPC/PowerPC.cpp
index 6f2ae50a56..b044f77834 100644
--- a/Source/Core/Core/PowerPC/PowerPC.cpp
+++ b/Source/Core/Core/PowerPC/PowerPC.cpp
@@ -88,6 +88,7 @@ void DoState(PointerWrap& p)
 static void ResetRegisters()
 {
   memset(ppcState.ps, 0, sizeof(ppcState.ps));
+  memset(ppcState.sr, 0, sizeof(ppcState.sr));
   memset(ppcState.gpr, 0, sizeof(ppcState.gpr));
   memset(ppcState.spr, 0, sizeof(ppcState.spr));
   /*
@@ -126,34 +127,8 @@ static void ResetRegisters()
   SystemTimers::DecrementerSet();
 }
 
-void Init(int cpu_core)
+static void InitializeCPUCore(int cpu_core)
 {
-  // NOTE: This function runs on EmuThread, not the CPU Thread.
-  //   Changing the rounding mode has a limited effect.
-  FPURoundMode::SetPrecisionMode(FPURoundMode::PREC_53);
-
-  s_invalidate_cache_thread_safe =
-      CoreTiming::RegisterEvent("invalidateEmulatedCache", InvalidateCacheThreadSafe);
-
-  memset(ppcState.sr, 0, sizeof(ppcState.sr));
-  ppcState.pagetable_base = 0;
-  ppcState.pagetable_hashmask = 0;
-
-  for (int tlb = 0; tlb < 2; tlb++)
-  {
-    for (int set = 0; set < 64; set++)
-    {
-      ppcState.tlb[tlb][set].recent = 0;
-      for (int way = 0; way < 2; way++)
-      {
-        ppcState.tlb[tlb][set].paddr[way] = 0;
-        ppcState.tlb[tlb][set].pte[way] = 0;
-        ppcState.tlb[tlb][set].tag[way] = TLB_TAG_INVALID;
-      }
-    }
-  }
-
-  ResetRegisters();
   PPCTables::InitTables(cpu_core);
 
   // We initialize the interpreter because
@@ -184,7 +159,24 @@ void Init(int cpu_core)
   {
     s_mode = MODE_INTERPRETER;
   }
+}
 
+void Init(int cpu_core)
+{
+  // NOTE: This function runs on EmuThread, not the CPU Thread.
+  //   Changing the rounding mode has a limited effect.
+  FPURoundMode::SetPrecisionMode(FPURoundMode::PREC_53);
+
+  s_invalidate_cache_thread_safe =
+      CoreTiming::RegisterEvent("invalidateEmulatedCache", InvalidateCacheThreadSafe);
+
+  ppcState.pagetable_base = 0;
+  ppcState.pagetable_hashmask = 0;
+  ppcState.tlb = {};
+
+  ResetRegisters();
+
+  InitializeCPUCore(cpu_core);
   ppcState.iCache.Init();
 
   if (SConfig::GetInstance().bEnableDebugging)
diff --git a/Source/Core/Core/PowerPC/PowerPC.h b/Source/Core/Core/PowerPC/PowerPC.h
index 885b8a5da2..2d8476e0c2 100644
--- a/Source/Core/Core/PowerPC/PowerPC.h
+++ b/Source/Core/Core/PowerPC/PowerPC.h
@@ -49,10 +49,10 @@ enum CoreMode
 
 struct tlb_entry
 {
-  u32 tag[TLB_WAYS];
-  u32 paddr[TLB_WAYS];
-  u32 pte[TLB_WAYS];
-  u8 recent;
+  u32 tag[TLB_WAYS] = {TLB_TAG_INVALID, TLB_TAG_INVALID};
+  u32 paddr[TLB_WAYS] = {};
+  u32 pte[TLB_WAYS] = {};
+  u8 recent = 0;
 };
 
 // This contains the entire state of the emulated PowerPC "Gekko" CPU.
@@ -116,7 +116,7 @@ struct PowerPCState
   // also for power management, but we don't care about that.
   u32 spr[1024];
 
-  tlb_entry tlb[NUM_TLBS][TLB_SIZE / TLB_WAYS];
+  std::array<std::array<tlb_entry, TLB_SIZE / TLB_WAYS>, NUM_TLBS> tlb;
 
   u32 pagetable_base;
   u32 pagetable_hashmask;