X64Emitter: add FMA3 support
This commit is contained in:
Fiora
parent
9d059d1d2f
commit
019657cd93
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@ -1353,9 +1353,9 @@ void XEmitter::WriteSSEOp(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int extr
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arg.WriteRest(this, extrabytes);
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}
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void XEmitter::WriteAVXOp(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int extrabytes)
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void XEmitter::WriteAVXOp(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int W, int extrabytes)
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{
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WriteAVXOp(opPrefix, op, regOp, INVALID_REG, arg, extrabytes);
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WriteAVXOp(opPrefix, op, regOp, INVALID_REG, arg, W, extrabytes);
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}
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static int GetVEXmmmmm(u16 op)
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@ -1381,14 +1381,14 @@ static int GetVEXpp(u8 opPrefix)
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return 0;
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}
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void XEmitter::WriteAVXOp(u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, OpArg arg, int extrabytes)
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void XEmitter::WriteAVXOp(u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, OpArg arg, int W, int extrabytes)
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{
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if (!cpu_info.bAVX)
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PanicAlert("Trying to use AVX on a system that doesn't support it. Bad programmer.");
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int mmmmm = GetVEXmmmmm(op);
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int pp = GetVEXpp(opPrefix);
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// FIXME: we currently don't support 256-bit instructions, and "size" is not the vector size here
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arg.WriteVex(this, regOp1, regOp2, 0, pp, mmmmm);
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arg.WriteVex(this, regOp1, regOp2, 0, pp, mmmmm, W);
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Write8(op & 0xFF);
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arg.WriteRest(this, extrabytes, regOp1);
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}
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@ -1778,10 +1778,71 @@ void XEmitter::VPAND(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x6
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void XEmitter::VPANDN(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, sseANDN, regOp1, regOp2, arg);}
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void XEmitter::VPOR(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, sseOR, regOp1, regOp2, arg);}
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void XEmitter::VPXOR(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, sseXOR, regOp1, regOp2, arg);}
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void XEmitter::VSHUFPD(X64Reg regOp1, X64Reg regOp2, OpArg arg, u8 shuffle) {WriteAVXOp(0x66, sseSHUF, regOp1, regOp2, arg, 1); Write8(shuffle);}
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void XEmitter::VSHUFPD(X64Reg regOp1, X64Reg regOp2, OpArg arg, u8 shuffle) {WriteAVXOp(0x66, sseSHUF, regOp1, regOp2, arg, 0, 1); Write8(shuffle);}
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void XEmitter::VUNPCKLPD(X64Reg regOp1, X64Reg regOp2, OpArg arg){WriteAVXOp(0x66, 0x14, regOp1, regOp2, arg);}
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void XEmitter::VUNPCKHPD(X64Reg regOp1, X64Reg regOp2, OpArg arg){WriteAVXOp(0x66, 0x15, regOp1, regOp2, arg);}
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void XEmitter::VFMADD132PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x3898, regOp1, regOp2, arg);}
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void XEmitter::VFMADD213PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38A8, regOp1, regOp2, arg);}
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void XEmitter::VFMADD231PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38B8, regOp1, regOp2, arg);}
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void XEmitter::VFMADD132PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x3898, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMADD213PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38A8, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMADD231PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38B8, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMADD132SS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x3899, regOp1, regOp2, arg);}
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void XEmitter::VFMADD213SS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38A9, regOp1, regOp2, arg);}
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void XEmitter::VFMADD231SS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38B9, regOp1, regOp2, arg);}
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void XEmitter::VFMADD132SD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x3899, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMADD213SD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38A9, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMADD231SD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38B9, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMSUB132PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x389A, regOp1, regOp2, arg);}
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void XEmitter::VFMSUB213PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38AA, regOp1, regOp2, arg);}
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void XEmitter::VFMSUB231PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38BA, regOp1, regOp2, arg);}
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void XEmitter::VFMSUB132PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x389A, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMSUB213PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38AA, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMSUB231PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38BA, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMSUB132SS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x389B, regOp1, regOp2, arg);}
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void XEmitter::VFMSUB213SS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38AB, regOp1, regOp2, arg);}
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void XEmitter::VFMSUB231SS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38BB, regOp1, regOp2, arg);}
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void XEmitter::VFMSUB132SD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x389B, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMSUB213SD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38AB, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMSUB231SD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38BB, regOp1, regOp2, arg, 1);}
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void XEmitter::VFNMADD132PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x389C, regOp1, regOp2, arg);}
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void XEmitter::VFNMADD213PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38AC, regOp1, regOp2, arg);}
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void XEmitter::VFNMADD231PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38BC, regOp1, regOp2, arg);}
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void XEmitter::VFNMADD132PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x389C, regOp1, regOp2, arg, 1);}
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void XEmitter::VFNMADD213PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38AC, regOp1, regOp2, arg, 1);}
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void XEmitter::VFNMADD231PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38BC, regOp1, regOp2, arg, 1);}
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void XEmitter::VFNMADD132SS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x389D, regOp1, regOp2, arg);}
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void XEmitter::VFNMADD213SS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38AD, regOp1, regOp2, arg);}
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void XEmitter::VFNMADD231SS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38BD, regOp1, regOp2, arg);}
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void XEmitter::VFNMADD132SD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x389D, regOp1, regOp2, arg, 1);}
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void XEmitter::VFNMADD213SD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38AD, regOp1, regOp2, arg, 1);}
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void XEmitter::VFNMADD231SD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38BD, regOp1, regOp2, arg, 1);}
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void XEmitter::VFNMSUB132PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x389E, regOp1, regOp2, arg);}
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void XEmitter::VFNMSUB213PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38AE, regOp1, regOp2, arg);}
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void XEmitter::VFNMSUB231PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38BE, regOp1, regOp2, arg);}
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void XEmitter::VFNMSUB132PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x389E, regOp1, regOp2, arg, 1);}
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void XEmitter::VFNMSUB213PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38AE, regOp1, regOp2, arg, 1);}
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void XEmitter::VFNMSUB231PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38BE, regOp1, regOp2, arg, 1);}
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void XEmitter::VFNMSUB132SS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x389F, regOp1, regOp2, arg);}
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void XEmitter::VFNMSUB213SS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38AF, regOp1, regOp2, arg);}
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void XEmitter::VFNMSUB231SS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38BF, regOp1, regOp2, arg);}
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void XEmitter::VFNMSUB132SD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x389F, regOp1, regOp2, arg, 1);}
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void XEmitter::VFNMSUB213SD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38AF, regOp1, regOp2, arg, 1);}
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void XEmitter::VFNMSUB231SD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38BF, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMADDSUB132PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x3896, regOp1, regOp2, arg);}
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void XEmitter::VFMADDSUB213PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38A6, regOp1, regOp2, arg);}
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void XEmitter::VFMADDSUB231PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38B6, regOp1, regOp2, arg);}
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void XEmitter::VFMADDSUB132PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x3896, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMADDSUB213PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38A6, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMADDSUB231PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38B6, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMSUBADD132PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x3897, regOp1, regOp2, arg);}
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void XEmitter::VFMSUBADD213PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38A7, regOp1, regOp2, arg);}
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void XEmitter::VFMSUBADD231PS(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38B7, regOp1, regOp2, arg);}
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void XEmitter::VFMSUBADD132PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x3897, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMSUBADD213PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38A7, regOp1, regOp2, arg, 1);}
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void XEmitter::VFMSUBADD231PD(X64Reg regOp1, X64Reg regOp2, OpArg arg) {WriteAVXOp(0x66, 0x38B7, regOp1, regOp2, arg, 1);}
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void XEmitter::SARX(int bits, X64Reg regOp1, OpArg arg, X64Reg regOp2) {WriteBMI2Op(bits, 0xF3, 0x38F7, regOp1, regOp2, arg);}
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void XEmitter::SHLX(int bits, X64Reg regOp1, OpArg arg, X64Reg regOp2) {WriteBMI2Op(bits, 0x66, 0x38F7, regOp1, regOp2, arg);}
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void XEmitter::SHRX(int bits, X64Reg regOp1, OpArg arg, X64Reg regOp2) {WriteBMI2Op(bits, 0xF2, 0x38F7, regOp1, regOp2, arg);}
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@ -281,8 +281,8 @@ private:
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void WriteSSEOp(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int extrabytes = 0);
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void WriteSSSE3Op(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int extrabytes = 0);
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void WriteSSE41Op(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int extrabytes = 0);
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void WriteAVXOp(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int extrabytes = 0);
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void WriteAVXOp(u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, OpArg arg, int extrabytes = 0);
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void WriteAVXOp(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int W = 0, int extrabytes = 0);
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void WriteAVXOp(u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, OpArg arg, int W = 0, int extrabytes = 0);
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void WriteVEXOp(int size, u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, OpArg arg, int extrabytes = 0);
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void WriteBMI1Op(int size, u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, OpArg arg, int extrabytes = 0);
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void WriteBMI2Op(int size, u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, OpArg arg, int extrabytes = 0);
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@ -743,6 +743,68 @@ public:
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void VUNPCKLPD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VUNPCKHPD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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// FMA
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void VFMADD132PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADD213PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADD231PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADD132PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADD213PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADD231PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADD132SS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADD213SS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADD231SS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADD132SD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADD213SD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADD231SD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUB132PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUB213PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUB231PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUB132PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUB213PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUB231PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUB132SS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUB213SS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUB231SS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUB132SD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUB213SD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUB231SD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMADD132PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMADD213PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMADD231PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMADD132PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMADD213PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMADD231PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMADD132SS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMADD213SS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMADD231SS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMADD132SD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMADD213SD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMADD231SD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMSUB132PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMSUB213PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMSUB231PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMSUB132PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMSUB213PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMSUB231PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMSUB132SS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMSUB213SS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMSUB231SS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMSUB132SD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMSUB213SD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFNMSUB231SD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADDSUB132PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADDSUB213PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADDSUB231PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADDSUB132PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADDSUB213PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMADDSUB231PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUBADD132PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUBADD213PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUBADD231PS(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUBADD132PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUBADD213PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VFMSUBADD231PD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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// VEX GPR instructions
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void SARX(int bits, X64Reg regOp1, OpArg arg, X64Reg regOp2);
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void SHLX(int bits, X64Reg regOp1, OpArg arg, X64Reg regOp2);
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Reference in New Issue