Merge pull request #1144 from skidau/fifo-linked
Moved the linking of the FIFO CPWritePointer near where CPWritePointer gets updated
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commit
007ba13cfa
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@ -335,6 +335,13 @@ void STACKALIGN GatherPipeBursted()
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else
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else
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fifo.CPWritePointer += GATHER_PIPE_SIZE;
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fifo.CPWritePointer += GATHER_PIPE_SIZE;
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if (m_CPCtrlReg.GPReadEnable && m_CPCtrlReg.GPLinkEnable)
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{
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ProcessorInterface::Fifo_CPUWritePointer = fifo.CPWritePointer;
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ProcessorInterface::Fifo_CPUBase = fifo.CPBase;
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ProcessorInterface::Fifo_CPUEnd = fifo.CPEnd;
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}
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Common::AtomicAdd(fifo.CPReadWriteDistance, GATHER_PIPE_SIZE);
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Common::AtomicAdd(fifo.CPReadWriteDistance, GATHER_PIPE_SIZE);
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RunGpu();
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RunGpu();
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@ -495,13 +502,6 @@ void SetCpControlRegister()
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fifo.bFF_LoWatermarkInt = m_CPCtrlReg.FifoUnderflowIntEnable;
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fifo.bFF_LoWatermarkInt = m_CPCtrlReg.FifoUnderflowIntEnable;
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fifo.bFF_GPLinkEnable = m_CPCtrlReg.GPLinkEnable;
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fifo.bFF_GPLinkEnable = m_CPCtrlReg.GPLinkEnable;
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if (m_CPCtrlReg.GPReadEnable && m_CPCtrlReg.GPLinkEnable)
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{
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ProcessorInterface::Fifo_CPUWritePointer = fifo.CPWritePointer;
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ProcessorInterface::Fifo_CPUBase = fifo.CPBase;
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ProcessorInterface::Fifo_CPUEnd = fifo.CPEnd;
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}
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if (fifo.bFF_GPReadEnable && !m_CPCtrlReg.GPReadEnable)
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if (fifo.bFF_GPReadEnable && !m_CPCtrlReg.GPReadEnable)
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{
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{
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fifo.bFF_GPReadEnable = m_CPCtrlReg.GPReadEnable;
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fifo.bFF_GPReadEnable = m_CPCtrlReg.GPReadEnable;
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