diff --git a/desmume/src/MMU.cpp b/desmume/src/MMU.cpp
index 321ea1182..a4c6131fa 100644
--- a/desmume/src/MMU.cpp
+++ b/desmume/src/MMU.cpp
@@ -2309,7 +2309,11 @@ void FASTCALL _MMU_ARM9_write08(u32 adr, u8 val)
 			case REG_AUXSPICNT+1:
 				write_auxspicnt(9,8,1,val);
 				return;
-
+			
+			case REG_AUXSPIDATA:
+				if(val!=0) MMU.AUX_SPI_CMD = val & 0xFF;
+				T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM9][(REG_AUXSPIDATA >> 20) & 0xff], REG_AUXSPIDATA & 0xfff, MMU_new.backupDevice.data_command((u8)val,ARMCPU_ARM9));
+				return;
 
 			case 0x4000247:	
 				/* Update WRAMSTAT at the ARM7 side */
@@ -2642,7 +2646,7 @@ void FASTCALL _MMU_ARM9_write16(u32 adr, u16 val)
 				   MMU.AUX_SPI_CMD = val & 0xFF;
 
 				//T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM7][(REG_AUXSPIDATA >> 20) & 0xff], REG_AUXSPIDATA & 0xfff, bm_transfer(&MMU.bupmem, val));
-				T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM7][(REG_AUXSPIDATA >> 20) & 0xff], REG_AUXSPIDATA & 0xfff, MMU_new.backupDevice.data_command((u8)val,ARMCPU_ARM9));
+				T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM9][(REG_AUXSPIDATA >> 20) & 0xff], REG_AUXSPIDATA & 0xfff, MMU_new.backupDevice.data_command((u8)val,ARMCPU_ARM9));
 				return;
 
 			case REG_DISPA_BG0CNT :
@@ -3587,6 +3591,10 @@ void FASTCALL _MMU_ARM7_write08(u32 adr, u8 val)
 			case REG_AUXSPICNT+1:
 				write_auxspicnt(9,8,1,val);
 				return;
+			case REG_AUXSPIDATA:
+				if(val!=0) MMU.AUX_SPI_CMD = val & 0xFF;
+				T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM7][(REG_AUXSPIDATA >> 20) & 0xff], REG_AUXSPIDATA & 0xfff, MMU_new.backupDevice.data_command((u8)val,ARMCPU_ARM7));
+				return;
 		}
 		MMU.MMU_MEM[ARMCPU_ARM7][adr>>20][adr&MMU.MMU_MASK[ARMCPU_ARM7][adr>>20]]=val;
 		return;