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core: 

- more correctly IPC FIFO implementation;
This commit is contained in:
mtabachenko 2009-01-13 00:59:16 +00:00
parent 3f9c4cf341
commit ec0b4547c6
4 changed files with 42 additions and 51 deletions
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72
desmume/src/FIFO.cpp
View File

@ -34,22 +34,17 @@ IPC_FIFO ipc_fifo[2]; // 0 - ARM9
void IPC_FIFOinit(u8 proc)
{
ipc_fifo[proc].head = 0;
ipc_fifo[proc].tail = 0;
memset(&ipc_fifo[proc], 0, sizeof(IPC_FIFO));
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, 0x00000101);
NDS_makeInt(proc^1, 18);
}
#define FIFO_IS_FULL(proc) ((ipc_fifo[proc].head) && (ipc_fifo[proc].head == ipc_fifo[proc].tail+1)) ||\
((!ipc_fifo[proc].head) && (ipc_fifo[proc].tail == 15))
void IPC_FIFOsend(u8 proc, u32 val)
{
u16 cnt_l = T1ReadWord(MMU.MMU_MEM[proc][0x40], 0x184);
if (!(cnt_l & 0x8000)) return; // FIFO disabled
u8 proc_remote = proc ^ 1;
if (FIFO_IS_FULL(proc_remote)) // FIFO error
if (ipc_fifo[proc].tail > 15)
{
cnt_l |= 0x4000;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, cnt_l);
@ -57,62 +52,66 @@ void IPC_FIFOsend(u8 proc, u32 val)
}
u16 cnt_r = T1ReadWord(MMU.MMU_MEM[proc_remote][0x40], 0x184);
cnt_l &= 0xFFFC; // clear send empty bit & full
cnt_r &= 0xFCFF; // set recv empty bit & full
ipc_fifo[proc_remote].buf[ipc_fifo[proc_remote].tail] = val;
ipc_fifo[proc_remote].tail++;
if (ipc_fifo[proc_remote].tail == 16)
ipc_fifo[proc_remote].tail = 0;
if (FIFO_IS_FULL(proc_remote))
//LOG("IPC%s send FIFO 0x%08X (l 0x%X, tail %02i) (r 0x%X, tail %02i)\n",
// proc?"7":"9", val, cnt_l, ipc_fifo[proc].tail, cnt_r, ipc_fifo[proc^1].tail);
cnt_l &= 0xBFFC; // clear send empty bit & full
cnt_r &= 0xBCFF; // set recv empty bit & full
ipc_fifo[proc].buf[ipc_fifo[proc].tail++] = val;
if (ipc_fifo[proc].tail > 15)
{
cnt_l |= 0x0002; // set send full bit
cnt_r |= 0x0200; // set recv full bit
}
//LOG("IPC%s send FIFO 0x%08X (l 0x%X, r 0x%X), head %02i, tail %02i\n", proc?"7":"9", val, cnt_l, cnt_r, ipc_fifo[proc].head, ipc_fifo[proc].tail);
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, cnt_l);
T1WriteWord(MMU.MMU_MEM[proc_remote][0x40], 0x184, cnt_r);
MMU.reg_IF[proc_remote] |= ( (cnt_r & 0x0400) << 8 );
MMU.reg_IF[proc_remote] |= ( (cnt_l & 0x0400) << 8 );
}
u32 IPC_FIFOrecv(u8 proc)
{
u32 val = 0;
u16 cnt_l = T1ReadWord(MMU.MMU_MEM[proc][0x40], 0x184);
if (!(cnt_l & 0x8000)) return (0); // FIFO disabled
if (!(cnt_l & 0x8000)) return (0); // FIFO disabled
u8 proc_remote = proc ^ 1;
if ( ipc_fifo[proc].head == ipc_fifo[proc].tail ) // FIFO error
u32 val = 0;
if ( ipc_fifo[proc_remote].tail == 0 ) // remote FIFO error
{
cnt_l |= 0x4000;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, cnt_l);
return (val);
return (0);
}
u16 cnt_r = T1ReadWord(MMU.MMU_MEM[proc_remote][0x40], 0x184);
cnt_l &= 0xFCFF; // clear send full bit & empty
cnt_r &= 0xFFFC; // set recv full bit & empty
cnt_l &= 0xBCFF; // clear send full bit & empty
cnt_r &= 0xBFFC; // set recv full bit & empty
val = ipc_fifo[proc].buf[ipc_fifo[proc].head];
ipc_fifo[proc].head++;
if (ipc_fifo[proc].head == 16)
ipc_fifo[proc].head = 0;
if ( ipc_fifo[proc].head == ipc_fifo[proc].tail ) // FIFO empty
val = ipc_fifo[proc_remote].buf[0];
//LOG("IPC%s recv FIFO 0x%08X (l 0x%X, tail %02i) (r 0x%X, tail %02i)\n",
// proc?"7":"9", val, cnt_l, ipc_fifo[proc].tail, cnt_r, ipc_fifo[proc^1].tail);
ipc_fifo[proc_remote].tail--;
for (int i = 0; i < ipc_fifo[proc_remote].tail; i++)
ipc_fifo[proc_remote].buf[i] = ipc_fifo[proc_remote].buf[i+1];;
if ( ipc_fifo[proc_remote].tail == 0 ) // FIFO empty
{
cnt_l |= 0x0100;
cnt_r |= 0x0001;
}
//LOG("IPC%s recv FIFO 0x%08X (l 0x%X, r 0x%X), head %02i, tail %02i\n", proc?"7":"9", val, cnt_l, cnt_r, ipc_fifo[proc].head, ipc_fifo[proc].tail);
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, cnt_l);
T1WriteWord(MMU.MMU_MEM[proc_remote][0x40], 0x184, cnt_r);
if ((cnt_l & 0x0100) && (cnt_l & BIT(2)) )
MMU.reg_IF[proc_remote] |= ( 1<<17 );
MMU.reg_IF[proc_remote] |= ( (cnt_l & 0x0004) << 15);
return (val);
}
@ -120,23 +119,18 @@ void IPC_FIFOcnt(u8 proc, u16 val)
{
u16 cnt_l = T1ReadWord(MMU.MMU_MEM[proc][0x40], 0x184);
u16 cnt_r = T1ReadWord(MMU.MMU_MEM[proc^1][0x40], 0x184);
cnt_r &= 0x3FFF;
cnt_r |= (val & 0x8000);
//LOG("IPC%s FIFO context 0x%X (local 0x%X)\n", proc?"7":"9", val, cnt_l);
//LOG("IPC%s FIFO context 0x%X (local 0x%04X, remote 0x%04X)\n", proc?"7":"9", val, cnt_l, cnt_r);
if (val & 0x4008)
{
ipc_fifo[proc].head = 0;
ipc_fifo[proc].tail = 0;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, (cnt_l & 0x0301) | (val & 0x8404) | 1);
T1WriteWord(MMU.MMU_MEM[proc^1][0x40], 0x184, (cnt_r & 0x8407) | 0x100);
MMU.reg_IF[proc] |= ((cnt_l & 0x0004) << 16);
MMU.reg_IF[proc^1] |= ((val & 0x0004) << 15);
return;
}
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, cnt_l | (val & 0xBFF4));
T1WriteWord(MMU.MMU_MEM[proc^1][0x40], 0x184, cnt_r);
MMU.reg_IF[proc] |= ((cnt_l & 0x0004) << 16);
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, val);
}
// ========================================================= GFX FIFO

1
desmume/src/FIFO.h
View File

@ -31,7 +31,6 @@ typedef struct
{
u32 buf[16];
u8 head;
u8 tail;
} IPC_FIFO;

18
desmume/src/MMU.cpp
View File

@ -1472,18 +1472,18 @@ struct armcpu_memory_iface arm9_direct_memory_iface = {
static INLINE void MMU_IPCSync(u8 proc, u32 val)
{
//INFO("IPC%s sync 0x%08X\n", proc?"7":"9", val);
u32 IPCSYNC_local = T1ReadLong(MMU.MMU_MEM[proc][0x40], 0x180);
u32 IPCSYNC_remote = T1ReadLong(MMU.MMU_MEM[proc^1][0x40], 0x180);
//INFO("IPC%s sync 0x%04X (0x%02X|%02X)\n", proc?"7":"9", val, val >> 8, val & 0xFF);
u32 sync_l = T1ReadLong(MMU.MMU_MEM[proc][0x40], 0x180) & 0xFFFF;
u32 sync_r = T1ReadLong(MMU.MMU_MEM[proc^1][0x40], 0x180) & 0xFFFF;
IPCSYNC_local = (IPCSYNC_local&0x6000)|(val&0xf00)|(IPCSYNC_local&0xf);
IPCSYNC_remote =(IPCSYNC_remote&0x6f00)|((val>>8)&0xf);
sync_l = ( sync_l & 0x600F ) | ( val & 0x0F00 );
sync_r = ( sync_r & 0x6F00 ) | ( (val >> 8) & 0x000F );
T1WriteLong(MMU.MMU_MEM[proc][0x40], 0x180, IPCSYNC_local);
T1WriteLong(MMU.MMU_MEM[proc^1][0x40], 0x180, IPCSYNC_remote);
T1WriteLong(MMU.MMU_MEM[proc][0x40], 0x180, sync_l);
T1WriteLong(MMU.MMU_MEM[proc^1][0x40], 0x180, sync_r);
if ((val & 0x2000) && (IPCSYNC_remote & 0x4000))
MMU.reg_IF[proc^1] |= ( 1<<17 );
if ((val & 0x2000) && (sync_r & 0x4000))
MMU.reg_IF[proc^1] |= ( 1 << 16 );
}
//================================================================================================== ARM9 *

2
desmume/src/saves.cpp
View File

@ -221,10 +221,8 @@ SFORMAT SF_MMU[]={
//fifos
{ "F0TL", 1, 1, &ipc_fifo[0].tail},
{ "F0HD", 1, 1, &ipc_fifo[0].head},
{ "F0BF", 4, 16, &ipc_fifo[0].buf[0]},
{ "F1TL", 1, 1, &ipc_fifo[1].tail},
{ "F1HD", 1, 1, &ipc_fifo[1].head},
{ "F1BF", 4, 16, &ipc_fifo[1].buf[0]},
{ 0 }
};