diff --git a/desmume/src/MMU.cpp b/desmume/src/MMU.cpp index 2bc652dd1..57c094de6 100644 --- a/desmume/src/MMU.cpp +++ b/desmume/src/MMU.cpp @@ -155,15 +155,11 @@ void mmu_log_debug_ARM7(u32 adr, const char *fmt, ...) INFO("MMU ARM7 0x%08X: %s\n", adr, msg); } +#else +#define mmu_log_debug_ARM9(...) +#define mmu_log_debug_ARM7(...) #endif -/* - * - */ -#define EARLY_MEMORY_ACCESS 1 - -#define INTERNAL_DTCM_READ 1 -#define INTERNAL_DTCM_WRITE 1 //#define LOG_CARD //#define LOG_GPU @@ -266,12 +262,13 @@ u32 MMU_struct::MMU_MASK[2][256] = { } }; - +CACHE_ALIGN TWaitState MMU_struct::MMU_WAIT16[2][16] = { { 1, 1, 1, 1, 1, 1, 1, 1, 5, 5, 5, 1, 1, 1, 1, 1 }, //arm9 { 1, 1, 1, 1, 1, 1, 1, 1, 5, 5, 5, 1, 1, 1, 1, 1 }, //arm7 }; +CACHE_ALIGN TWaitState MMU_struct::MMU_WAIT32[2][16] = { { 1, 1, 1, 1, 1, 2, 2, 1, 8, 8, 5, 1, 1, 1, 1, 1 }, //arm9 { 1, 1, 1, 1, 1, 1, 1, 1, 8, 8, 5, 1, 1, 1, 1, 1 }, //arm7 @@ -1282,453 +1279,10 @@ void FASTCALL MMU_write32_acl(u32 proc, u32 adr, u32 val) } #endif -#ifdef PROFILE_MEMORY_ACCESS +//a stub for memory profiler, if we choose to re-add it +#define PROFILE_PREFETCH 1 +#define profile_memory_access(X,Y,Z) -#define PROFILE_PREFETCH 0 -#define PROFILE_READ 1 -#define PROFILE_WRITE 2 - -struct mem_access_profile { - u64 num_accesses; - u32 address_mask; - u32 masked_value; -}; - -#define PROFILE_NUM_MEM_ACCESS_PROFILES 4 - -static u64 profile_num_accesses[2][3]; -static u64 profile_unknown_addresses[2][3]; -static struct mem_access_profile -profile_memory_accesses[2][3][PROFILE_NUM_MEM_ACCESS_PROFILES]; - -static void -setup_profiling( void) { - int i; - - for ( i = 0; i < 2; i++) { - int access_type; - - for ( access_type = 0; access_type < 3; access_type++) { - profile_num_accesses[i][access_type] = 0; - profile_unknown_addresses[i][access_type] = 0; - - /* - * Setup the access testing structures - */ - profile_memory_accesses[i][access_type][0].address_mask = 0x0e000000; - profile_memory_accesses[i][access_type][0].masked_value = 0x00000000; - profile_memory_accesses[i][access_type][0].num_accesses = 0; - - /* main memory */ - profile_memory_accesses[i][access_type][1].address_mask = 0x0f000000; - profile_memory_accesses[i][access_type][1].masked_value = 0x02000000; - profile_memory_accesses[i][access_type][1].num_accesses = 0; - - /* shared memory */ - profile_memory_accesses[i][access_type][2].address_mask = 0x0f800000; - profile_memory_accesses[i][access_type][2].masked_value = 0x03000000; - profile_memory_accesses[i][access_type][2].num_accesses = 0; - - /* arm7 memory */ - profile_memory_accesses[i][access_type][3].address_mask = 0x0f800000; - profile_memory_accesses[i][access_type][3].masked_value = 0x03800000; - profile_memory_accesses[i][access_type][3].num_accesses = 0; - } - } -} - -static void -profile_memory_access( int arm9, u32 adr, int access_type) { - static int first = 1; - int mem_profile; - int address_found = 0; - - if ( first) { - setup_profiling(); - first = 0; - } - - profile_num_accesses[arm9][access_type] += 1; - - for ( mem_profile = 0; - mem_profile < PROFILE_NUM_MEM_ACCESS_PROFILES && - !address_found; - mem_profile++) { - if ( (adr & profile_memory_accesses[arm9][access_type][mem_profile].address_mask) == - profile_memory_accesses[arm9][access_type][mem_profile].masked_value) { - /*printf( "adr %08x mask %08x res %08x expected %08x\n", - adr, - profile_memory_accesses[arm9][access_type][mem_profile].address_mask, - adr & profile_memory_accesses[arm9][access_type][mem_profile].address_mask, - profile_memory_accesses[arm9][access_type][mem_profile].masked_value);*/ - address_found = 1; - profile_memory_accesses[arm9][access_type][mem_profile].num_accesses += 1; - } - } - - if ( !address_found) { - profile_unknown_addresses[arm9][access_type] += 1; - } -} - - -static const char *access_type_strings[] = { - "prefetch", - "read ", - "write " -}; - -void -print_memory_profiling( void) { - int arm; - - printf("------ Memory access profile ------\n"); - - for ( arm = 0; arm < 2; arm++) { - int access_type; - - for ( access_type = 0; access_type < 3; access_type++) { - int mem_profile; - printf("ARM%c: num of %s %lld\n", - arm ? '9' : '7', - access_type_strings[access_type], - profile_num_accesses[arm][access_type]); - - for ( mem_profile = 0; - mem_profile < PROFILE_NUM_MEM_ACCESS_PROFILES; - mem_profile++) { - printf( "address %08x: %lld\n", - profile_memory_accesses[arm][access_type][mem_profile].masked_value, - profile_memory_accesses[arm][access_type][mem_profile].num_accesses); - } - - printf( "unknown addresses %lld\n", - profile_unknown_addresses[arm][access_type]); - - printf( "\n"); - } - } - - printf("------ End of Memory access profile ------\n\n"); -} -#else -void -print_memory_profiling( void) { -} -#endif /* End of PROFILE_MEMORY_ACCESS area */ - -static u16 FASTCALL -arm9_prefetch16( void *data, u32 adr) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 1, adr, PROFILE_PREFETCH); -#endif - -#ifdef EARLY_MEMORY_ACCESS - if((adr & ~0x3FFF) == MMU.DTCMRegion) - { - /* Returns data from DTCM (ARM9 only) */ - return T1ReadWord(ARM9Mem.ARM9_DTCM, adr & 0x3FFF); - } - /* access to main memory */ - if ( (adr & 0x0f000000) == 0x02000000) { - return T1ReadWord( MMU.MMU_MEM[ARMCPU_ARM9][(adr >> 20) & 0xFF], - adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20) & 0xFF]); - } -#endif - - return _MMU_read16(adr); -} -static u32 FASTCALL -arm9_prefetch32( void *data, u32 adr) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 1, adr, PROFILE_PREFETCH); -#endif - -#ifdef EARLY_MEMORY_ACCESS - if((adr & ~0x3FFF) == MMU.DTCMRegion) - { - /* Returns data from DTCM (ARM9 only) */ - return T1ReadLong(ARM9Mem.ARM9_DTCM, adr & 0x3FFF); - } - /* access to main memory */ - if ( (adr & 0x0f000000) == 0x02000000) { - return T1ReadLong( MMU.MMU_MEM[ARMCPU_ARM9][(adr >> 20) & 0xFF], - adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20) & 0xFF]); - } -#endif - - return _MMU_read32(adr); -} - -static u8 FASTCALL -arm9_read8( void *data, u32 adr) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 1, adr, PROFILE_READ); -#endif - -#ifdef EARLY_MEMORY_ACCESS - if( (adr&(~0x3FFF)) == MMU.DTCMRegion) - { - return ARM9Mem.ARM9_DTCM[adr&0x3FFF]; - } - /* access to main memory */ - if ( (adr & 0x0f000000) == 0x02000000) { - return MMU.MMU_MEM[ARMCPU_ARM9][(adr >> 20) & 0xFF] - [adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20) & 0xFF]]; - } -#endif - - return _MMU_read08(adr); -} -static u16 FASTCALL -arm9_read16( void *data, u32 adr) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 1, adr, PROFILE_READ); -#endif - -#ifdef EARLY_MEMORY_ACCESS - if((adr & ~0x3FFF) == MMU.DTCMRegion) - { - /* Returns data from DTCM (ARM9 only) */ - return T1ReadWord(ARM9Mem.ARM9_DTCM, adr & 0x3FFF); - } - - /* access to main memory */ - if ( (adr & 0x0f000000) == 0x02000000) { - return T1ReadWord( MMU.MMU_MEM[ARMCPU_ARM9][(adr >> 20) & 0xFF], - adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20) & 0xFF]); - } -#endif - - return _MMU_read16(adr); -} -static u32 FASTCALL -arm9_read32( void *data, u32 adr) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 1, adr, PROFILE_READ); -#endif - -#ifdef EARLY_MEMORY_ACCESS - if((adr & ~0x3FFF) == MMU.DTCMRegion) - { - /* Returns data from DTCM (ARM9 only) */ - return T1ReadLong(ARM9Mem.ARM9_DTCM, adr & 0x3FFF); - } - /* access to main memory */ - if ( (adr & 0x0f000000) == 0x02000000) { - return T1ReadLong( MMU.MMU_MEM[ARMCPU_ARM9][(adr >> 20) & 0xFF], - adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20) & 0xFF]); - } -#endif - - return _MMU_read32(adr); -} - - -static void FASTCALL -arm9_write8(void *data, u32 adr, u8 val) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 1, adr, PROFILE_WRITE); -#endif - -#ifdef EARLY_MEMORY_ACCESS - if( (adr & ~0x3FFF) == MMU.DTCMRegion) - { - /* Writes data in DTCM (ARM9 only) */ - ARM9Mem.ARM9_DTCM[adr&0x3FFF] = val; - return ; - } - /* main memory */ - if ( (adr & 0x0f000000) == 0x02000000) { - MMU.MMU_MEM[ARMCPU_ARM9][(adr>>20)&0xFF] - [adr&MMU.MMU_MASK[ARMCPU_ARM9][(adr>>20)&0xFF]] = val; - return; - } -#endif - - _MMU_write08(adr, val); -} -static void FASTCALL -arm9_write16(void *data, u32 adr, u16 val) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 1, adr, PROFILE_WRITE); -#endif - -#ifdef EARLY_MEMORY_ACCESS - if((adr & ~0x3FFF) == MMU.DTCMRegion) - { - /* Writes in DTCM (ARM9 only) */ - T1WriteWord(ARM9Mem.ARM9_DTCM, adr & 0x3FFF, val); - return; - } - /* main memory */ - if ( (adr & 0x0f000000) == 0x02000000) { - T1WriteWord( MMU.MMU_MEM[ARMCPU_ARM9][(adr>>20)&0xFF], - adr&MMU.MMU_MASK[ARMCPU_ARM9][(adr>>20)&0xFF], val); - return; - } -#endif - - _MMU_write16(adr, val); -} -static void FASTCALL -arm9_write32(void *data, u32 adr, u32 val) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 1, adr, PROFILE_WRITE); -#endif - -#ifdef EARLY_MEMORY_ACCESS - if((adr & ~0x3FFF) == MMU.DTCMRegion) - { - /* Writes in DTCM (ARM9 only) */ - T1WriteLong(ARM9Mem.ARM9_DTCM, adr & 0x3FFF, val); - return; - } - /* main memory */ - if ( (adr & 0x0f000000) == 0x02000000) { - T1WriteLong( MMU.MMU_MEM[ARMCPU_ARM9][(adr>>20)&0xFF], - adr&MMU.MMU_MASK[ARMCPU_ARM9][(adr>>20)&0xFF], val); - return; - } -#endif - - _MMU_write32(adr, val); -} - - - - -static u16 FASTCALL -arm7_prefetch16( void *data, u32 adr) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 0, adr, PROFILE_PREFETCH); -#endif - -#ifdef EARLY_MEMORY_ACCESS - /* ARM7 private memory */ - if ( (adr & 0x0f800000) == 0x03800000) { - T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20) & 0xFF], - adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20) & 0xFF]); - } -#endif - - return _MMU_read16(adr); -} -static u32 FASTCALL -arm7_prefetch32( void *data, u32 adr) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 0, adr, PROFILE_PREFETCH); -#endif - -#ifdef EARLY_MEMORY_ACCESS - /* ARM7 private memory */ - if ( (adr & 0x0f800000) == 0x03800000) { - T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20) & 0xFF], - adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20) & 0xFF]); - } -#endif - - return _MMU_read32(adr); -} - -static u8 FASTCALL -arm7_read8( void *data, u32 adr) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 0, adr, PROFILE_READ); -#endif - - return _MMU_read08(adr); -} -static u16 FASTCALL -arm7_read16( void *data, u32 adr) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 0, adr, PROFILE_READ); -#endif - - return _MMU_read16(adr); -} -static u32 FASTCALL -arm7_read32( void *data, u32 adr) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 0, adr, PROFILE_READ); -#endif - - return _MMU_read32(adr); -} - -static void FASTCALL -arm7_write8(void *data, u32 adr, u8 val) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 0, adr, PROFILE_WRITE); -#endif - - _MMU_write08(adr, val); -} -static void FASTCALL -arm7_write16(void *data, u32 adr, u16 val) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 0, adr, PROFILE_WRITE); -#endif - - _MMU_write16(adr, val); -} -static void FASTCALL -arm7_write32(void *data, u32 adr, u32 val) { -#ifdef PROFILE_MEMORY_ACCESS - profile_memory_access( 0, adr, PROFILE_WRITE); -#endif - - _MMU_write32(adr, val); -} - - - -/* - * the base memory interfaces - */ -struct armcpu_memory_iface arm9_base_memory_iface = { - arm9_prefetch32, - arm9_prefetch16, - - arm9_read8, - arm9_read16, - arm9_read32, - - arm9_write8, - arm9_write16, - arm9_write32 -}; - -struct armcpu_memory_iface arm7_base_memory_iface = { - arm7_prefetch32, - arm7_prefetch16, - - arm7_read8, - arm7_read16, - arm7_read32, - - arm7_write8, - arm7_write16, - arm7_write32 -}; - -/* - * The direct memory interface for the ARM9. - * This avoids the ARM9 protection unit when accessing - * memory. - */ -struct armcpu_memory_iface arm9_direct_memory_iface = { - NULL, - NULL, - - arm9_read8, - arm9_read16, - arm9_read32, - - arm9_write8, - arm9_write16, - arm9_write32 -}; static INLINE void MMU_IPCSync(u8 proc, u32 val) { @@ -1752,18 +1306,12 @@ static INLINE void MMU_IPCSync(u8 proc, u32 val) //================================================= MMU write 08 void FASTCALL _MMU_ARM9_write08(u32 adr, u8 val) { -#ifdef INTERNAL_DTCM_WRITE - if(((adr & ~0x3FFF) == MMU.DTCMRegion)) - { - /* Writes data in DTCM (ARM9 only) */ - ARM9Mem.ARM9_DTCM[adr & 0x3FFF] = val; - return ; - } -#endif + mmu_log_debug_ARM9(adr, "(write08) %0x%X", val); + if(adr < 0x02000000) { T1WriteByte(ARM9Mem.ARM9_ITCM, adr&0x7FFF, val); - return ; + return; } #ifdef EXPERIMENTAL_GBASLOT @@ -1950,9 +1498,7 @@ void FASTCALL _MMU_ARM9_write08(u32 adr, u8 val) LOG("%08X : %02X\r\n", adr, val); #endif } -#ifdef _MMU_DEBUG - mmu_log_debug_ARM9(adr, "(write08) %0x%X", val); -#endif + MMU.MMU_MEM[ARMCPU_ARM9][0x40][adr&MMU.MMU_MASK[ARMCPU_ARM9][adr>>20]]=val; return; } @@ -1968,18 +1514,12 @@ void FASTCALL _MMU_ARM9_write08(u32 adr, u8 val) //================================================= MMU ARM9 write 16 void FASTCALL _MMU_ARM9_write16(u32 adr, u16 val) { -#ifdef INTERNAL_DTCM_WRITE - if((adr & ~0x3FFF) == MMU.DTCMRegion) - { - /* Writes in DTCM (ARM9 only) */ - T1WriteWord(ARM9Mem.ARM9_DTCM, adr & 0x3FFF, val); - return; - } -#endif + mmu_log_debug_ARM9(adr, "(write16) %0x%X", val); + if (adr < 0x02000000) { T1WriteWord(ARM9Mem.ARM9_ITCM, adr&0x7FFF, val); - return ; + return; } #ifdef EXPERIMENTAL_GBASLOT @@ -2535,9 +2075,7 @@ void FASTCALL _MMU_ARM9_write16(u32 adr, u16 val) return; } } -#ifdef _MMU_DEBUG - mmu_log_debug_ARM9(adr, "(write16) %0x%X", val); -#endif + T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr&MMU.MMU_MASK[ARMCPU_ARM9][adr>>20], val); return; } @@ -2553,20 +2091,7 @@ void FASTCALL _MMU_ARM9_write16(u32 adr, u16 val) //================================================= MMU ARM9 write 32 void FASTCALL _MMU_ARM9_write32(u32 adr, u32 val) { -#ifdef INTERNAL_DTCM_WRITE - if((adr&(~0x3FFF)) == MMU.DTCMRegion) - { - T1WriteLong(ARM9Mem.ARM9_DTCM, adr & 0x3FFF, val); - return ; - } -#endif - -#ifdef EARLY_MEMORY_ACCESS - if ( (adr & 0x0F000000) == 0x02000000) { - T1WriteLong( ARM9Mem.MAIN_MEM, adr & 0x3FFFFF, val); - return; - } -#endif + mmu_log_debug_ARM9(adr, "(write32) %0x%X", val); if(adr<0x02000000) { @@ -3113,9 +2638,6 @@ void FASTCALL _MMU_ARM9_write32(u32 adr, u32 val) return; } } -#ifdef _MMU_DEBUG - mmu_log_debug_ARM9(adr, "(write32) %0x%X", val); -#endif T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][adr>>20], val); return; @@ -3132,12 +2654,7 @@ void FASTCALL _MMU_ARM9_write32(u32 adr, u32 val) //================================================= MMU ARM9 read 08 u8 FASTCALL _MMU_ARM9_read08(u32 adr) { -#ifdef INTERNAL_DTCM_READ - if((adr&(~0x3FFF)) == MMU.DTCMRegion) - { - return T1ReadByte(ARM9Mem.ARM9_DTCM, adr&0x3FFF); - } -#endif + mmu_log_debug_ARM9(adr, "(read08) %0x%X", MMU.MMU_MEM[ARMCPU_ARM9][(adr>>20)&0xFF][adr&MMU.MMU_MASK[ARMCPU_ARM9][(adr>>20)&0xFF]]); if(adr<0x02000000) return T1ReadByte(ARM9Mem.ARM9_ITCM, adr&0x7FFF); @@ -3151,11 +2668,6 @@ u8 FASTCALL _MMU_ARM9_read08(u32 adr) return (unsigned char)cflash_read(adr); #endif -#ifdef _MMU_DEBUG - mmu_log_debug_ARM9(adr, "(read08) %0x%X", - MMU.MMU_MEM[ARMCPU_ARM9][(adr>>20)&0xFF][adr&MMU.MMU_MASK[ARMCPU_ARM9][(adr>>20)&0xFF]]); -#endif - bool unmapped; adr = MMU_LCDmap(adr, unmapped); if(unmapped) return 0; @@ -3166,12 +2678,7 @@ u8 FASTCALL _MMU_ARM9_read08(u32 adr) //================================================= MMU ARM9 read 16 u16 FASTCALL _MMU_ARM9_read16(u32 adr) { -#ifdef INTERNAL_DTCM_READ - if((adr&(~0x3FFF)) == MMU.DTCMRegion) - { - return T1ReadWord(ARM9Mem.ARM9_DTCM, adr & 0x3FFF); - } -#endif + mmu_log_debug_ARM9(adr, "(read16) %0x%X", T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20) & 0xFF])); if(adr<0x02000000) return T1ReadWord(ARM9Mem.ARM9_ITCM, adr & 0x7FFF); @@ -3230,10 +2737,7 @@ u16 FASTCALL _MMU_ARM9_read16(u32 adr) case REG_POSTFLG : return 1; } -#ifdef _MMU_DEBUG - mmu_log_debug_ARM9(adr, "(read16) %0x%X", - T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20) & 0xFF])); -#endif + return T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20) & 0xFF]); } @@ -3247,22 +2751,7 @@ u16 FASTCALL _MMU_ARM9_read16(u32 adr) //================================================= MMU ARM9 read 32 u32 FASTCALL _MMU_ARM9_read32(u32 adr) { -#ifdef INTERNAL_DTCM_READ - if((adr&(~0x3FFF)) == MMU.DTCMRegion) - { - /* Returns data from DTCM (ARM9 only) */ - return T1ReadLong(ARM9Mem.ARM9_DTCM, adr & 0x3FFF); - } -#endif - -#ifdef EARLY_MEMORY_ACCESS - if ( (adr & 0x0F000000) == 0x02000000) - return T1ReadLong( ARM9Mem.MAIN_MEM, adr & 0x3FFFFF); -#endif - - if(adr>=0x02400000 && adr<0x03000000) { - //int zzz=9; - } + mmu_log_debug_ARM9(adr, "(read32) %0x%X", T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20)])); if(adr<0x02000000) return T1ReadLong(ARM9Mem.ARM9_ITCM, adr&0x7FFF); @@ -3429,10 +2918,6 @@ u32 FASTCALL _MMU_ARM9_read32(u32 adr) return val; } } -#ifdef _MMU_DEBUG - mmu_log_debug_ARM9(adr, "(read32) %0x%X", - T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20)])); -#endif return T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20)]); } @@ -3449,6 +2934,8 @@ u32 FASTCALL _MMU_ARM9_read32(u32 adr) //================================================= MMU ARM7 write 08 void FASTCALL _MMU_ARM7_write08(u32 adr, u8 val) { + mmu_log_debug_ARM7(adr, "(write08) %0x%X", val); + #ifdef EXPERIMENTAL_GBASLOT if ( (adr >= 0x08000000) && (adr < 0x0A010000) ) { @@ -3496,9 +2983,6 @@ void FASTCALL _MMU_ARM7_write08(u32 adr, u8 val) adr = MMU_LCDmap(adr,unmapped); if(unmapped) return; -#ifdef _MMU_DEBUG - mmu_log_debug_ARM7(adr, "(write08) %0x%X", val); -#endif // Removed the &0xFF as they are implicit with the adr&0x0FFFFFFFF [shash] MMU.MMU_MEM[ARMCPU_ARM7][adr>>20][adr&MMU.MMU_MASK[ARMCPU_ARM7][adr>>20]]=val; } @@ -3506,6 +2990,8 @@ void FASTCALL _MMU_ARM7_write08(u32 adr, u8 val) //================================================= MMU ARM7 write 16 void FASTCALL _MMU_ARM7_write16(u32 adr, u16 val) { + mmu_log_debug_ARM7(adr, "(write16) %0x%X", val); + #ifdef EXPERIMENTAL_GBASLOT if ( (adr >= 0x08000000) && (adr < 0x0A010000) ) { @@ -3915,9 +3401,7 @@ void FASTCALL _MMU_ARM7_write16(u32 adr, u16 val) return; //case REG_AUXSPICNT : emu_halt(); } -#ifdef _MMU_DEBUG - mmu_log_debug_ARM7(adr, "(write16) %0x%X", val); -#endif + T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM7][0x40], adr&MMU.MMU_MASK[ARMCPU_ARM7][adr>>20], val); return; } @@ -3932,6 +3416,8 @@ void FASTCALL _MMU_ARM7_write16(u32 adr, u16 val) //================================================= MMU ARM7 write 32 void FASTCALL _MMU_ARM7_write32(u32 adr, u32 val) { + mmu_log_debug_ARM7(adr, "(write32) %0x%X", val); + #ifdef EXPERIMENTAL_GBASLOT if ( (adr >= 0x08000000) && (adr < 0x0A010000) ) { @@ -4204,9 +3690,6 @@ void FASTCALL _MMU_ARM7_write32(u32 adr, u32 val) } return; } -#ifdef _MMU_DEBUG - mmu_log_debug_ARM7(adr, "(write32) %0x%X", val); -#endif T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM7][adr>>20], val); return; } @@ -4222,6 +3705,8 @@ void FASTCALL _MMU_ARM7_write32(u32 adr, u32 val) //================================================= MMU ARM7 read 08 u8 FASTCALL _MMU_ARM7_read08(u32 adr) { + mmu_log_debug_ARM7(adr, "(read08) %0x%X", MMU.MMU_MEM[ARMCPU_ARM7][(adr>>20)&0xFF][adr&MMU.MMU_MASK[ARMCPU_ARM7][(adr>>20)&0xFF]]); + #ifdef EXPERIMENTAL_WIFI /* wifi mac access */ if ((adr>=0x04800000)&&(adr<0x05000000)) @@ -4244,11 +3729,6 @@ u8 FASTCALL _MMU_ARM7_read08(u32 adr) if (adr == REG_RTC) return (u8)rtcRead(); -#ifdef _MMU_DEBUG - mmu_log_debug_ARM7(adr, "(read08) %0x%X", - MMU.MMU_MEM[ARMCPU_ARM7][(adr>>20)&0xFF][adr&MMU.MMU_MASK[ARMCPU_ARM7][(adr>>20)&0xFF]]); -#endif - bool unmapped; adr = MMU_LCDmap(adr,unmapped); if(unmapped) return 0; @@ -4258,6 +3738,8 @@ u8 FASTCALL _MMU_ARM7_read08(u32 adr) //================================================= MMU ARM7 read 16 u16 FASTCALL _MMU_ARM7_read16(u32 adr) { + mmu_log_debug_ARM7(adr, "(read16) %0x%X", T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20) & 0xFF], adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20) & 0xFF])); + #ifdef EXPERIMENTAL_WIFI /* wifi mac access */ if ((adr>=0x04800000)&&(adr<0x05000000)) @@ -4313,10 +3795,6 @@ u16 FASTCALL _MMU_ARM7_read16(u32 adr) case REG_POSTFLG : return 1; } -#ifdef _MMU_DEBUG - mmu_log_debug_ARM7(adr, "(read16) %0x%X", - T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20) & 0xFF], adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20) & 0xFF])); -#endif return T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20) & 0xFF], adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20) & 0xFF]); } @@ -4330,6 +3808,8 @@ u16 FASTCALL _MMU_ARM7_read16(u32 adr) //================================================= MMU ARM7 read 32 u32 FASTCALL _MMU_ARM7_read32(u32 adr) { + mmu_log_debug_ARM7(adr, "(read32) %0x%X", T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20) & 0xFF], adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20) & 0xFF])); + #ifdef EXPERIMENTAL_WIFI /* wifi mac access */ if ((adr>=0x04800000)&&(adr<0x05000000)) @@ -4428,10 +3908,6 @@ u32 FASTCALL _MMU_ARM7_read32(u32 adr) return val; } } -#ifdef _MMU_DEBUG - mmu_log_debug_ARM7(adr, "(read32) %0x%X", - T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20) & 0xFF], adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20) & 0xFF])); -#endif return T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20)], adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20)]); } @@ -4518,3 +3994,278 @@ void mmu_select_savetype(int type, int *bmemtype, u32 *bmemsize) { *bmemsize=save_types[type][1]; mc_realloc(&MMU.bupmem, *bmemtype, *bmemsize); } + +//////////////////////////////////////////////////////////// +//function pointer handlers for gdb stub stuff + +static u16 arm9_prefetch16( void *data, u32 adr) { + profile_memory_access( 1, adr, PROFILE_PREFETCH); + return _MMU_read16(adr); +} + +static u32 arm9_prefetch32( void *data, u32 adr) { + profile_memory_access( 1, adr, PROFILE_PREFETCH); + return _MMU_read32(adr); +} + +static u8 arm9_read8( void *data, u32 adr) { + profile_memory_access( 1, adr, PROFILE_READ); + return _MMU_read08(adr); +} + +static u16 arm9_read16( void *data, u32 adr) { + profile_memory_access( 1, adr, PROFILE_READ); + return _MMU_read16(adr); +} + +static u32 arm9_read32( void *data, u32 adr) { + profile_memory_access( 1, adr, PROFILE_READ); + return _MMU_read32(adr); +} + +static void arm9_write8(void *data, u32 adr, u8 val) { + profile_memory_access( 1, adr, PROFILE_WRITE); + _MMU_write08(adr, val); +} + +static void FASTCALL arm9_write16(void *data, u32 adr, u16 val) { + profile_memory_access( 1, adr, PROFILE_WRITE); + _MMU_write16(adr, val); +} + +static void FASTCALL arm9_write32(void *data, u32 adr, u32 val) { + profile_memory_access( 1, adr, PROFILE_WRITE); + _MMU_write32(adr, val); +} + +static u16 FASTCALL arm7_prefetch16( void *data, u32 adr) { + profile_memory_access( 0, adr, PROFILE_PREFETCH); + return _MMU_read16(adr); +} + +static u32 FASTCALL arm7_prefetch32( void *data, u32 adr) { + profile_memory_access( 0, adr, PROFILE_PREFETCH); + return _MMU_read32(adr); +} + +static u8 FASTCALL arm7_read8( void *data, u32 adr) { + profile_memory_access( 0, adr, PROFILE_READ); + return _MMU_read08(adr); +} + +static u16 FASTCALL arm7_read16( void *data, u32 adr) { + profile_memory_access( 0, adr, PROFILE_READ); + return _MMU_read16(adr); +} + +static u32 FASTCALL arm7_read32( void *data, u32 adr) { + profile_memory_access( 0, adr, PROFILE_READ); + return _MMU_read32(adr); +} + +static void FASTCALL arm7_write8(void *data, u32 adr, u8 val) { + profile_memory_access( 0, adr, PROFILE_WRITE); + _MMU_write08(adr, val); +} + +static void FASTCALL arm7_write16(void *data, u32 adr, u16 val) { + profile_memory_access( 0, adr, PROFILE_WRITE); + _MMU_write16(adr, val); +} + +static void FASTCALL arm7_write32(void *data, u32 adr, u32 val) { + profile_memory_access( 0, adr, PROFILE_WRITE); + _MMU_write32(adr, val); +} + + + +/* + * the base memory interfaces + */ +struct armcpu_memory_iface arm9_base_memory_iface = { + arm9_prefetch32, + arm9_prefetch16, + + arm9_read8, + arm9_read16, + arm9_read32, + + arm9_write8, + arm9_write16, + arm9_write32 +}; + +struct armcpu_memory_iface arm7_base_memory_iface = { + arm7_prefetch32, + arm7_prefetch16, + + arm7_read8, + arm7_read16, + arm7_read32, + + arm7_write8, + arm7_write16, + arm7_write32 +}; + +/* + * The direct memory interface for the ARM9. + * This avoids the ARM9 protection unit when accessing + * memory. + */ +struct armcpu_memory_iface arm9_direct_memory_iface = { + NULL, + NULL, + + arm9_read8, + arm9_read16, + arm9_read32, + + arm9_write8, + arm9_write16, + arm9_write32 +}; + + +///////////////////////////////////////////////////////////////// +///////////////////////////////////////////////////////////////// +///////////////////////////////////////////////////////////////// +///////////////////////////////////////////////////////////////// +///////////////////////////////////////////////////////////////// +///////////////////////////////////////////////////////////////// + +//#ifdef PROFILE_MEMORY_ACCESS +// +//#define PROFILE_PREFETCH 0 +//#define PROFILE_READ 1 +//#define PROFILE_WRITE 2 +// +//struct mem_access_profile { +// u64 num_accesses; +// u32 address_mask; +// u32 masked_value; +//}; +// +//#define PROFILE_NUM_MEM_ACCESS_PROFILES 4 +// +//static u64 profile_num_accesses[2][3]; +//static u64 profile_unknown_addresses[2][3]; +//static struct mem_access_profile +//profile_memory_accesses[2][3][PROFILE_NUM_MEM_ACCESS_PROFILES]; +// +//static void +//setup_profiling( void) { +// int i; +// +// for ( i = 0; i < 2; i++) { +// int access_type; +// +// for ( access_type = 0; access_type < 3; access_type++) { +// profile_num_accesses[i][access_type] = 0; +// profile_unknown_addresses[i][access_type] = 0; +// +// /* +// * Setup the access testing structures +// */ +// profile_memory_accesses[i][access_type][0].address_mask = 0x0e000000; +// profile_memory_accesses[i][access_type][0].masked_value = 0x00000000; +// profile_memory_accesses[i][access_type][0].num_accesses = 0; +// +// /* main memory */ +// profile_memory_accesses[i][access_type][1].address_mask = 0x0f000000; +// profile_memory_accesses[i][access_type][1].masked_value = 0x02000000; +// profile_memory_accesses[i][access_type][1].num_accesses = 0; +// +// /* shared memory */ +// profile_memory_accesses[i][access_type][2].address_mask = 0x0f800000; +// profile_memory_accesses[i][access_type][2].masked_value = 0x03000000; +// profile_memory_accesses[i][access_type][2].num_accesses = 0; +// +// /* arm7 memory */ +// profile_memory_accesses[i][access_type][3].address_mask = 0x0f800000; +// profile_memory_accesses[i][access_type][3].masked_value = 0x03800000; +// profile_memory_accesses[i][access_type][3].num_accesses = 0; +// } +// } +//} +// +//static void +//profile_memory_access( int arm9, u32 adr, int access_type) { +// static int first = 1; +// int mem_profile; +// int address_found = 0; +// +// if ( first) { +// setup_profiling(); +// first = 0; +// } +// +// profile_num_accesses[arm9][access_type] += 1; +// +// for ( mem_profile = 0; +// mem_profile < PROFILE_NUM_MEM_ACCESS_PROFILES && +// !address_found; +// mem_profile++) { +// if ( (adr & profile_memory_accesses[arm9][access_type][mem_profile].address_mask) == +// profile_memory_accesses[arm9][access_type][mem_profile].masked_value) { +// /*printf( "adr %08x mask %08x res %08x expected %08x\n", +// adr, +// profile_memory_accesses[arm9][access_type][mem_profile].address_mask, +// adr & profile_memory_accesses[arm9][access_type][mem_profile].address_mask, +// profile_memory_accesses[arm9][access_type][mem_profile].masked_value);*/ +// address_found = 1; +// profile_memory_accesses[arm9][access_type][mem_profile].num_accesses += 1; +// } +// } +// +// if ( !address_found) { +// profile_unknown_addresses[arm9][access_type] += 1; +// } +//} +// +// +//static const char *access_type_strings[] = { +// "prefetch", +// "read ", +// "write " +//}; +// +//void +//print_memory_profiling( void) { +// int arm; +// +// printf("------ Memory access profile ------\n"); +// +// for ( arm = 0; arm < 2; arm++) { +// int access_type; +// +// for ( access_type = 0; access_type < 3; access_type++) { +// int mem_profile; +// printf("ARM%c: num of %s %lld\n", +// arm ? '9' : '7', +// access_type_strings[access_type], +// profile_num_accesses[arm][access_type]); +// +// for ( mem_profile = 0; +// mem_profile < PROFILE_NUM_MEM_ACCESS_PROFILES; +// mem_profile++) { +// printf( "address %08x: %lld\n", +// profile_memory_accesses[arm][access_type][mem_profile].masked_value, +// profile_memory_accesses[arm][access_type][mem_profile].num_accesses); +// } +// +// printf( "unknown addresses %lld\n", +// profile_unknown_addresses[arm][access_type]); +// +// printf( "\n"); +// } +// } +// +// printf("------ End of Memory access profile ------\n\n"); +//} +//#else +//void +//print_memory_profiling( void) { +//} +//#endif /* End of PROFILE_MEMORY_ACCESS area */ diff --git a/desmume/src/MMU.h b/desmume/src/MMU.h index cb81e178b..cc23ac872 100644 --- a/desmume/src/MMU.h +++ b/desmume/src/MMU.h @@ -45,7 +45,7 @@ /* theses ones for reading in rom data */ #define ROM_8(m, a) (((u8*)(m))[(a)]) -typedef const u32 TWaitState; +typedef const u8 TWaitState; struct MMU_struct { //ARM7 mem @@ -80,8 +80,8 @@ struct MMU_struct { u8 ARM9_RW_MODE; - static TWaitState MMU_WAIT16[2][16]; - static TWaitState MMU_WAIT32[2][16]; + static CACHE_ALIGN TWaitState MMU_WAIT16[2][16]; + static CACHE_ALIGN TWaitState MMU_WAIT32[2][16]; u32 DTCMRegion; u32 ITCMRegion; @@ -175,21 +175,31 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val); template void FASTCALL MMU_doDMA(u32 num); -/* - * The base ARM memory interfaces - */ +//The base ARM memory interfaces extern struct armcpu_memory_iface arm9_base_memory_iface; extern struct armcpu_memory_iface arm7_base_memory_iface; extern struct armcpu_memory_iface arm9_direct_memory_iface; extern u8 *MMU_RenderMapToLCD(u32 vram_addr); -template u8 _MMU_read08(u32 addr); -template u16 _MMU_read16(u32 addr); -template u32 _MMU_read32(u32 addr); -template void _MMU_write08(u32 addr, u8 val); -template void _MMU_write16(u32 addr, u16 val); -template void _MMU_write32(u32 addr, u32 val); +enum MMU_ACCESS_TYPE +{ + MMU_AT_CODE, MMU_AT_DATA, MMU_AT_GPU +}; + +template u8 _MMU_read08(u32 addr); +template u16 _MMU_read16(u32 addr); +template u32 _MMU_read32(u32 addr); +template void _MMU_write08(u32 addr, u8 val); +template void _MMU_write16(u32 addr, u16 val); +template void _MMU_write32(u32 addr, u32 val); + +template u8 _MMU_read08(u32 addr) { return _MMU_read08(addr); } +template u16 _MMU_read16(u32 addr) { return _MMU_read16(addr); } +template u32 _MMU_read32(u32 addr) { return _MMU_read32(addr); } +template void _MMU_write08(u32 addr, u8 val) { _MMU_write08(addr,val); } +template void _MMU_write16(u32 addr, u16 val) { _MMU_write16(addr,val); } +template void _MMU_write32(u32 addr, u32 val) { _MMU_write32(addr,val); } void FASTCALL _MMU_ARM9_write08(u32 adr, u8 val); void FASTCALL _MMU_ARM9_write16(u32 adr, u16 val); @@ -211,7 +221,13 @@ inline void SetupMMU(bool debugConsole) { else _MMU_MAIN_MEM_MASK = 0x3FFFFF; } -FORCEINLINE u8 _MMU_read08(const int PROCNUM, u32 addr) { +//TODO: at one point some of the early access code included this. consider re-adding it + //ARM7 private memory + //if ( (adr & 0x0f800000) == 0x03800000) { + //T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20) & 0xFF], + // adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20) & 0xFF]); + +FORCEINLINE u8 _MMU_read08(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr) { if(PROCNUM==ARMCPU_ARM9) if((addr&(~0x3FFF)) == MMU.DTCMRegion) { @@ -226,7 +242,20 @@ FORCEINLINE u8 _MMU_read08(const int PROCNUM, u32 addr) { else return _MMU_ARM7_read08(addr); } -FORCEINLINE u16 _MMU_read16(const int PROCNUM, u32 addr) { +FORCEINLINE u16 _MMU_read16(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr) { + + //special handling for execution from arm9, since we spend so much time in there + if(PROCNUM==ARMCPU_ARM9 && AT == MMU_AT_CODE) + { + if ((addr & 0x0F000000) == 0x02000000) + return T1ReadWord( ARM9Mem.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); + + if(addr<0x02000000) + return T1ReadWord(ARM9Mem.ARM9_ITCM, addr&0x7FFF); + + goto dunno; + } + if(PROCNUM==ARMCPU_ARM9) if((addr&(~0x3FFF)) == MMU.DTCMRegion) { @@ -237,11 +266,26 @@ FORCEINLINE u16 _MMU_read16(const int PROCNUM, u32 addr) { if ( (addr & 0x0F000000) == 0x02000000) return T1ReadWord( ARM9Mem.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); +dunno: if(PROCNUM==ARMCPU_ARM9) return _MMU_ARM9_read16(addr); else return _MMU_ARM7_read16(addr); } -FORCEINLINE u32 _MMU_read32(int PROCNUM, u32 addr) { +FORCEINLINE u32 _MMU_read32(int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr) { + + //special handling for execution from arm9, since we spend so much time in there + if(PROCNUM==ARMCPU_ARM9 && AT == MMU_AT_CODE) + { + if ( (addr & 0x0F000000) == 0x02000000) + return T1ReadLong( ARM9Mem.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); + + if(addr<0x02000000) + return T1ReadLong(ARM9Mem.ARM9_ITCM, addr&0x7FFF); + + goto dunno; + } + + //for other cases, we have to check from dtcm first because it is patched on top of the main memory range if(PROCNUM==ARMCPU_ARM9) if((addr&(~0x3FFF)) == MMU.DTCMRegion) { @@ -252,11 +296,12 @@ FORCEINLINE u32 _MMU_read32(int PROCNUM, u32 addr) { if ( (addr & 0x0F000000) == 0x02000000) return T1ReadLong( ARM9Mem.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); +dunno: if(PROCNUM==ARMCPU_ARM9) return _MMU_ARM9_read32(addr); else return _MMU_ARM7_read32(addr); } -FORCEINLINE void _MMU_write08(const int PROCNUM, u32 addr, u8 val) { +FORCEINLINE void _MMU_write08(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr, u8 val) { if(PROCNUM==ARMCPU_ARM9) if((addr&(~0x3FFF)) == MMU.DTCMRegion) { @@ -273,7 +318,7 @@ FORCEINLINE void _MMU_write08(const int PROCNUM, u32 addr, u8 val) { else _MMU_ARM7_write08(addr,val); } -FORCEINLINE void _MMU_write16(const int PROCNUM, u32 addr, u16 val) { +FORCEINLINE void _MMU_write16(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr, u16 val) { if(PROCNUM==ARMCPU_ARM9) if((addr&(~0x3FFF)) == MMU.DTCMRegion) { @@ -290,7 +335,7 @@ FORCEINLINE void _MMU_write16(const int PROCNUM, u32 addr, u16 val) { else _MMU_ARM7_write16(addr,val); } -FORCEINLINE void _MMU_write32(const int PROCNUM, u32 addr, u32 val) { +FORCEINLINE void _MMU_write32(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr, u32 val) { if(PROCNUM==ARMCPU_ARM9) if((addr&(~0x3FFF)) == MMU.DTCMRegion) { @@ -320,8 +365,8 @@ FORCEINLINE void _MMU_write32(const int PROCNUM, u32 addr, u32 val) { #define MMU_write16_acl(proc, adr, val) _MMU_write16(adr, val) #define MMU_write32_acl(proc, adr, val) _MMU_write32(adr, val) #define MMU_read8_acl(proc,adr,access) _MMU_read08(adr) - #define MMU_read16_acl(proc,adr,access) _MMU_read16(adr) - #define MMU_read32_acl(proc,adr,access) _MMU_read32(adr) + #define MMU_read16_acl(proc,adr,access) ((access==CP15_ACCESS_EXECUTE)?_MMU_read16(adr):_MMU_read16(adr)) + #define MMU_read32_acl(proc,adr,access) ((access==CP15_ACCESS_EXECUTE)?_MMU_read32(adr):_MMU_read32(adr)) #endif // Use this macros for reading/writing, so the GDB stub isn't broken @@ -341,23 +386,23 @@ FORCEINLINE void _MMU_write32(const int PROCNUM, u32 addr, u32 val) { #define WRITE8(a,b,c) _MMU_write08(b, c) #endif -template -u8 _MMU_read08(u32 addr) { return _MMU_read08(PROCNUM, addr); } +template +u8 _MMU_read08(u32 addr) { return _MMU_read08(PROCNUM, AT, addr); } -template -u16 _MMU_read16(u32 addr) { return _MMU_read16(PROCNUM, addr); } +template +u16 _MMU_read16(u32 addr) { return _MMU_read16(PROCNUM, AT, addr); } -template -u32 _MMU_read32(u32 addr) { return _MMU_read32(PROCNUM, addr); } +template +u32 _MMU_read32(u32 addr) { return _MMU_read32(PROCNUM, AT, addr); } -template -void _MMU_write08(u32 addr, u8 val) { _MMU_write08(PROCNUM, addr, val); } +template +void _MMU_write08(u32 addr, u8 val) { _MMU_write08(PROCNUM, AT, addr, val); } -template -void _MMU_write16(u32 addr, u16 val) { _MMU_write16(PROCNUM, addr, val); } +template +void _MMU_write16(u32 addr, u16 val) { _MMU_write16(PROCNUM, AT, addr, val); } -template -void _MMU_write32(u32 addr, u32 val) { _MMU_write32(PROCNUM, addr, val); } +template +void _MMU_write32(u32 addr, u32 val) { _MMU_write32(PROCNUM, AT, addr, val); } void FASTCALL MMU_DumpMemBlock(u8 proc, u32 address, u32 size, u8 *buffer); diff --git a/desmume/src/bios.cpp b/desmume/src/bios.cpp index ba78e588b..238a3425c 100644 --- a/desmume/src/bios.cpp +++ b/desmume/src/bios.cpp @@ -224,7 +224,7 @@ TEMPLATE u32 intrWaitARM() } else { intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8; } - intr = _MMU_read32(cpu->proc_ID,intrFlagAdr); + intr = _MMU_read32(intrFlagAdr); intrFlag = (cpu->R[1] & intr); if(!noDiscard) @@ -236,7 +236,7 @@ TEMPLATE u32 intrWaitARM() // on efface son(les) occurence(s). intr ^= intrFlag; cpu->newIrqFlags ^= intrFlag; - _MMU_write32(cpu->proc_ID, intrFlagAdr, intr); + _MMU_write32(intrFlagAdr, intr); //cpu->switchMode(oldmode[cpu->proc_ID]); return 1; } @@ -266,7 +266,7 @@ TEMPLATE static u32 waitVBlankARM() } else { intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8; } - intr = _MMU_read32(cpu->proc_ID,intrFlagAdr); + intr = _MMU_read32(intrFlagAdr); intrFlag = 1 & intr; // if(intrFlag) @@ -274,7 +274,7 @@ TEMPLATE static u32 waitVBlankARM() // si une(ou plusieurs) des interruptions que l'on attend s'est(se sont) produite(s) // on efface son(les) occurence(s). intr ^= intrFlag; - _MMU_write32(cpu->proc_ID,intrFlagAdr, intr); + _MMU_write32(intrFlagAdr, intr); //cpu->switchMode(oldmode[cpu->proc_ID]); return 1; } @@ -314,7 +314,7 @@ TEMPLATE static u32 wait4IRQ() TEMPLATE static u32 sleep() { - _MMU_write08(cpu->proc_ID, 0x04000301, 0xC0); + _MMU_write08(0x04000301, 0xC0); return 1; } @@ -351,7 +351,7 @@ TEMPLATE static u32 copy() cnt &= 0x1FFFFF; while(cnt) { - _MMU_write16(cpu->proc_ID,dst, _MMU_read16(cpu->proc_ID,src)); + _MMU_write16(dst, _MMU_read16(src)); cnt--; dst+=2; src+=2; @@ -359,11 +359,11 @@ TEMPLATE static u32 copy() break; case 1: { - u32 val = _MMU_read16(cpu->proc_ID, src); + u32 val = _MMU_read16(src); cnt &= 0x1FFFFF; while(cnt) { - _MMU_write16(cpu->proc_ID, dst, val); + _MMU_write16(dst, val); cnt--; dst+=2; } @@ -380,7 +380,7 @@ TEMPLATE static u32 copy() cnt &= 0x1FFFFF; while(cnt) { - _MMU_write32(cpu->proc_ID, dst, _MMU_read32(cpu->proc_ID, src)); + _MMU_write32(dst, _MMU_read32(src)); cnt--; dst+=4; src+=4; @@ -388,11 +388,11 @@ TEMPLATE static u32 copy() break; case 1: { - u32 val = _MMU_read32(cpu->proc_ID, src); + u32 val = _MMU_read32(src); cnt &= 0x1FFFFF; while(cnt) { - _MMU_write32(cpu->proc_ID,dst, val); + _MMU_write32(dst, val); cnt--; dst+=4; } @@ -418,7 +418,7 @@ TEMPLATE static u32 fastCopy() cnt &= 0x1FFFFF; while(cnt) { - _MMU_write32(cpu->proc_ID,dst, _MMU_read32(cpu->proc_ID,src)); + _MMU_write32(dst, _MMU_read32(src)); cnt--; dst+=4; src+=4; @@ -426,11 +426,11 @@ TEMPLATE static u32 fastCopy() break; case 1: { - u32 val = _MMU_read32(cpu->proc_ID,src); + u32 val = _MMU_read32(src); cnt &= 0x1FFFFF; while(cnt) { - _MMU_write32(cpu->proc_ID,dst, val); + _MMU_write32(dst, val); cnt--; dst+=4; } @@ -449,7 +449,7 @@ TEMPLATE static u32 LZ77UnCompVram() int len; u32 source = cpu->R[0]; u32 dest = cpu->R[1]; - u32 header = _MMU_read32(cpu->proc_ID,source); + u32 header = _MMU_read32(source); source += 4; //INFO("swi lz77uncompvram\n"); @@ -465,7 +465,7 @@ TEMPLATE static u32 LZ77UnCompVram() len = header >> 8; while(len > 0) { - u8 d = _MMU_read08(cpu->proc_ID,source++); + u8 d = _MMU_read08(source++); if(d) { for(i1 = 0; i1 < 8; i1++) { @@ -473,18 +473,18 @@ TEMPLATE static u32 LZ77UnCompVram() int length; int offset; u32 windowOffset; - u16 data = _MMU_read08(cpu->proc_ID,source++) << 8; - data |= _MMU_read08(cpu->proc_ID,source++); + u16 data = _MMU_read08(source++) << 8; + data |= _MMU_read08(source++); length = (data >> 12) + 3; offset = (data & 0x0FFF); windowOffset = dest + byteCount - offset - 1; for(i2 = 0; i2 < length; i2++) { - writeValue |= (_MMU_read08(cpu->proc_ID,windowOffset++) << byteShift); + writeValue |= (_MMU_read08(windowOffset++) << byteShift); byteShift += 8; byteCount++; if(byteCount == 2) { - _MMU_write16(cpu->proc_ID,dest, writeValue); + _MMU_write16(dest, writeValue); dest += 2; byteCount = 0; byteShift = 0; @@ -495,11 +495,11 @@ TEMPLATE static u32 LZ77UnCompVram() return 0; } } else { - writeValue |= (_MMU_read08(cpu->proc_ID,source++) << byteShift); + writeValue |= (_MMU_read08(source++) << byteShift); byteShift += 8; byteCount++; if(byteCount == 2) { - _MMU_write16(cpu->proc_ID,dest, writeValue); + _MMU_write16(dest, writeValue); dest += 2; byteCount = 0; byteShift = 0; @@ -513,11 +513,11 @@ TEMPLATE static u32 LZ77UnCompVram() } } else { for(i1 = 0; i1 < 8; i1++) { - writeValue |= (_MMU_read08(cpu->proc_ID, source++) << byteShift); + writeValue |= (_MMU_read08(source++) << byteShift); byteShift += 8; byteCount++; if(byteCount == 2) { - _MMU_write16(cpu->proc_ID, dest, writeValue); + _MMU_write16(dest, writeValue); dest += 2; byteShift = 0; byteCount = 0; @@ -539,7 +539,7 @@ TEMPLATE static u32 LZ77UnCompWram() u32 source = cpu->R[0]; u32 dest = cpu->R[1]; - u32 header = _MMU_read32(cpu->proc_ID, source); + u32 header = _MMU_read32(source); source += 4; //INFO("swi lz77uncompwram\n"); @@ -551,7 +551,7 @@ TEMPLATE static u32 LZ77UnCompWram() len = header >> 8; while(len > 0) { - u8 d = _MMU_read08(cpu->proc_ID, source++); + u8 d = _MMU_read08(source++); if(d) { for(i1 = 0; i1 < 8; i1++) { @@ -559,19 +559,19 @@ TEMPLATE static u32 LZ77UnCompWram() int length; int offset; u32 windowOffset; - u16 data = _MMU_read08(cpu->proc_ID, source++) << 8; - data |= _MMU_read08(cpu->proc_ID, source++); + u16 data = _MMU_read08(source++) << 8; + data |= _MMU_read08(source++); length = (data >> 12) + 3; offset = (data & 0x0FFF); windowOffset = dest - offset - 1; for(i2 = 0; i2 < length; i2++) { - _MMU_write08(cpu->proc_ID, dest++, _MMU_read08(cpu->proc_ID, windowOffset++)); + _MMU_write08(dest++, _MMU_read08(windowOffset++)); len--; if(len == 0) return 0; } } else { - _MMU_write08(cpu->proc_ID, dest++, _MMU_read08(cpu->proc_ID,source++)); + _MMU_write08(dest++, _MMU_read08(source++)); len--; if(len == 0) return 0; @@ -580,7 +580,7 @@ TEMPLATE static u32 LZ77UnCompWram() } } else { for(i1 = 0; i1 < 8; i1++) { - _MMU_write08(cpu->proc_ID,dest++, _MMU_read08(cpu->proc_ID, source++)); + _MMU_write08(dest++, _MMU_read08(source++)); len--; if(len == 0) return 0; @@ -600,7 +600,7 @@ TEMPLATE static u32 RLUnCompVram() u32 source = cpu->R[0]; u32 dest = cpu->R[1]; - u32 header = _MMU_read32(cpu->proc_ID, source); + u32 header = _MMU_read32(source); source += 4; //INFO("swi rluncompvram\n"); @@ -615,10 +615,10 @@ TEMPLATE static u32 RLUnCompVram() writeValue = 0; while(len > 0) { - u8 d = _MMU_read08(cpu->proc_ID, source++); + u8 d = _MMU_read08(source++); int l = d & 0x7F; if(d & 0x80) { - u8 data = _MMU_read08(cpu->proc_ID, source++); + u8 data = _MMU_read08(source++); l += 3; for(i = 0;i < l; i++) { writeValue |= (data << byteShift); @@ -626,7 +626,7 @@ TEMPLATE static u32 RLUnCompVram() byteCount++; if(byteCount == 2) { - _MMU_write16(cpu->proc_ID, dest, writeValue); + _MMU_write16(dest, writeValue); dest += 2; byteCount = 0; byteShift = 0; @@ -639,11 +639,11 @@ TEMPLATE static u32 RLUnCompVram() } else { l++; for(i = 0; i < l; i++) { - writeValue |= (_MMU_read08(cpu->proc_ID, source++) << byteShift); + writeValue |= (_MMU_read08(source++) << byteShift); byteShift += 8; byteCount++; if(byteCount == 2) { - _MMU_write16(cpu->proc_ID, dest, writeValue); + _MMU_write16(dest, writeValue); dest += 2; byteCount = 0; byteShift = 0; @@ -665,7 +665,7 @@ TEMPLATE static u32 RLUnCompWram() u32 source = cpu->R[0]; u32 dest = cpu->R[1]; - u32 header = _MMU_read32(cpu->proc_ID, source); + u32 header = _MMU_read32(source); source += 4; //INFO("swi rluncompwram\n"); @@ -677,13 +677,13 @@ TEMPLATE static u32 RLUnCompWram() len = header >> 8; while(len > 0) { - u8 d = _MMU_read08(cpu->proc_ID, source++); + u8 d = _MMU_read08(source++); int l = d & 0x7F; if(d & 0x80) { - u8 data = _MMU_read08(cpu->proc_ID, source++); + u8 data = _MMU_read08(source++); l += 3; for(i = 0;i < l; i++) { - _MMU_write08(cpu->proc_ID,dest++, data); + _MMU_write08(dest++, data); len--; if(len == 0) return 0; @@ -691,7 +691,7 @@ TEMPLATE static u32 RLUnCompWram() } else { l++; for(i = 0; i < l; i++) { - _MMU_write08(cpu->proc_ID, dest++, _MMU_read08(cpu->proc_ID,source++)); + _MMU_write08(dest++, _MMU_read08(source++)); len--; if(len == 0) return 0; @@ -712,7 +712,7 @@ TEMPLATE static u32 UnCompHuffman() source = cpu->R[0]; dest = cpu->R[1]; - header = _MMU_read08(cpu->proc_ID, source); + header = _MMU_read08(source); source += 4; //INFO("swi uncomphuffman\n"); @@ -721,7 +721,7 @@ TEMPLATE static u32 UnCompHuffman() ((source + ((header >> 8) & 0x1fffff)) & 0xe000000) == 0) return 0; - treeSize = _MMU_read08(cpu->proc_ID,source++); + treeSize = _MMU_read08(source++); treeStart = source; @@ -730,11 +730,11 @@ TEMPLATE static u32 UnCompHuffman() len = header >> 8; mask = 0x80000000; - data = _MMU_read08(cpu->proc_ID,source); + data = _MMU_read08(source); source += 4; pos = 0; - rootNode = _MMU_read08(cpu->proc_ID,treeStart); + rootNode = _MMU_read08(treeStart); currentNode = rootNode; writeData = 0; byteShift = 0; @@ -753,12 +753,12 @@ TEMPLATE static u32 UnCompHuffman() // right if(currentNode & 0x40) writeData = 1; - currentNode = _MMU_read08(cpu->proc_ID,treeStart+pos+1); + currentNode = _MMU_read08(treeStart+pos+1); } else { // left if(currentNode & 0x80) writeData = 1; - currentNode = _MMU_read08(cpu->proc_ID,treeStart+pos); + currentNode = _MMU_read08(treeStart+pos); } if(writeData) { @@ -773,7 +773,7 @@ TEMPLATE static u32 UnCompHuffman() if(byteCount == 4) { byteCount = 0; byteShift = 0; - _MMU_write08(cpu->proc_ID, dest, writeValue); + _MMU_write08(dest, writeValue); writeValue = 0; dest += 4; len -= 4; @@ -782,7 +782,7 @@ TEMPLATE static u32 UnCompHuffman() mask >>= 1; if(mask == 0) { mask = 0x80000000; - data = _MMU_read08(cpu->proc_ID,source); + data = _MMU_read08(source); source += 4; } } @@ -800,12 +800,12 @@ TEMPLATE static u32 UnCompHuffman() // right if(currentNode & 0x40) writeData = 1; - currentNode = _MMU_read08(cpu->proc_ID, treeStart+pos+1); + currentNode = _MMU_read08(treeStart+pos+1); } else { // left if(currentNode & 0x80) writeData = 1; - currentNode = _MMU_read08(cpu->proc_ID, treeStart+pos); + currentNode = _MMU_read08(treeStart+pos); } if(writeData) { @@ -826,7 +826,7 @@ TEMPLATE static u32 UnCompHuffman() if(byteCount == 4) { byteCount = 0; byteShift = 0; - _MMU_write08(cpu->proc_ID,dest, writeValue); + _MMU_write08(dest, writeValue); dest += 4; writeValue = 0; len -= 4; @@ -839,7 +839,7 @@ TEMPLATE static u32 UnCompHuffman() mask >>= 1; if(mask == 0) { mask = 0x80000000; - data = _MMU_read08(cpu->proc_ID, source); + data = _MMU_read08(source); source += 4; } } @@ -859,15 +859,15 @@ TEMPLATE static u32 BitUnPack() //INFO("swi bitunpack\n"); - len = _MMU_read16(cpu->proc_ID, header); + len = _MMU_read16(header); // check address - bits = _MMU_read08(cpu->proc_ID, header+2); + bits = _MMU_read08(header+2); revbits = 8 - bits; // u32 value = 0; - base = _MMU_read08(cpu->proc_ID, header+4); + base = _MMU_read08(header+4); addBase = (base & 0x80000000) ? 1 : 0; base &= 0x7fffffff; - dataSize = _MMU_read08(cpu->proc_ID, header+3); + dataSize = _MMU_read08(header+3); data = 0; bitwritecount = 0; @@ -876,7 +876,7 @@ TEMPLATE static u32 BitUnPack() if(len < 0) break; mask = 0xff >> revbits; - b = _MMU_read08(cpu->proc_ID, source); + b = _MMU_read08(source); source++; bitcount = 0; while(1) { @@ -890,7 +890,7 @@ TEMPLATE static u32 BitUnPack() data |= temp << bitwritecount; bitwritecount += dataSize; if(bitwritecount >= 32) { - _MMU_write08(cpu->proc_ID,dest, data); + _MMU_write08(dest, data); dest += 4; data = 0; bitwritecount = 0; @@ -911,7 +911,7 @@ TEMPLATE static u32 Diff8bitUnFilterWram() source = cpu->R[0]; dest = cpu->R[1]; - header = _MMU_read08(cpu->proc_ID, source); + header = _MMU_read08(source); source += 4; //INFO("swi diff8bitunfilterwram\n"); @@ -922,14 +922,14 @@ TEMPLATE static u32 Diff8bitUnFilterWram() len = header >> 8; - data = _MMU_read08(cpu->proc_ID, source++); - _MMU_write08(cpu->proc_ID, dest++, data); + data = _MMU_read08(source++); + _MMU_write08(dest++, data); len--; while(len > 0) { - diff = _MMU_read08(cpu->proc_ID,source++); + diff = _MMU_read08(source++); data += diff; - _MMU_write08(cpu->proc_ID, dest++, data); + _MMU_write08(dest++, data); len--; } return 1; @@ -946,7 +946,7 @@ TEMPLATE static u32 Diff16bitUnFilter() //INFO("swi diff16bitunfilter\n"); - header = _MMU_read08(cpu->proc_ID, source); + header = _MMU_read08(source); source += 4; if(((source & 0xe000000) == 0) || @@ -955,17 +955,17 @@ TEMPLATE static u32 Diff16bitUnFilter() len = header >> 8; - data = _MMU_read16(cpu->proc_ID,source); + data = _MMU_read16(source); source += 2; - _MMU_write16(cpu->proc_ID, dest, data); + _MMU_write16(dest, data); dest += 2; len -= 2; while(len >= 2) { - u16 diff = _MMU_read16(cpu->proc_ID, source); + u16 diff = _MMU_read16(source); source += 2; data += diff; - _MMU_write16(cpu->proc_ID,dest, data); + _MMU_write16(dest, data); dest += 2; len -= 2; } @@ -980,7 +980,7 @@ TEMPLATE static u32 bios_sqrt() TEMPLATE static u32 setHaltCR() { - _MMU_write08(cpu->proc_ID,0x4000300+cpu->proc_ID, cpu->R[0]); + _MMU_write08(0x4000300+cpu->proc_ID, cpu->R[0]); return 1; } @@ -1013,7 +1013,7 @@ TEMPLATE static u32 getCRC16() const u16 val[] = { 0xC0C1,0xC181,0xC301,0xC601,0xCC01,0xD801,0xF001,0xA001 }; for(i = 0; i < size; i++) { - crc = crc ^ _MMU_read08(cpu->proc_ID, datap + i); + crc = crc ^ _MMU_read08(datap + i); for(j = 0; j < 8; j++) { int do_bit = 0;