diff --git a/desmume/src/arm_instructions.h b/desmume/src/arm_instructions.h new file mode 100644 index 000000000..d5222e158 --- /dev/null +++ b/desmume/src/arm_instructions.h @@ -0,0 +1,32 @@ +/* Copyright (C) 2006 yopyop + yopyop156@ifrance.com + yopyop156.ifrance.com + + This file is part of DeSmuME + + DeSmuME is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + DeSmuME is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with DeSmuME; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#ifndef ARMINSTRUCTION_H +#define ARMINSTRUCTION_H + +#include "types.h" + +typedef struct armcpu_t armcpu_t; + +extern unsigned long (*__fastcall arm_instructions_set[4096])(armcpu_t * cpu); + +#endif + diff --git a/desmume/src/armcpu.h b/desmume/src/armcpu.h index 439a6d7ec..ffa13c6ca 100644 --- a/desmume/src/armcpu.h +++ b/desmume/src/armcpu.h @@ -24,13 +24,7 @@ #include "types.h" -#include "ICoProc.hpp" - -#include "arm_instructions.hpp" -#include "thumb_instructions.hpp" #include "MMU.hpp" -#include "CP15.hpp" -#include "bios.hpp" #define BIT_N(i,n) (((i)>>(n))&1) #define CONDITION(i) (i)>>28 @@ -151,7 +145,9 @@ union Status_Reg unsigned long val; }; -typedef struct +typedef void* armcp_t; + +typedef struct armcpu_t { unsigned long proc_ID; unsigned long instruction; //4 @@ -170,8 +166,8 @@ typedef struct unsigned long R8_fiq, R9_fiq, R10_fiq, R11_fiq, R12_fiq, R13_fiq, R14_fiq; Status_Reg SPSR_svc, SPSR_abt, SPSR_und, SPSR_irq, SPSR_fiq; - ICoProc * coproc[16]; - + armcp_t *coproc[16]; + unsigned long intVector; unsigned char LDTBit; //1 : ARMv5 style 0 : non ARMv5 bool waitIRQ; @@ -179,79 +175,16 @@ typedef struct bool wirq; - unsigned long (* *swi_tab)(ARMCPU * cpu); + unsigned long (* *swi_tab)(struct armcpu_t * cpu); } armcpu_t; +int armcpu_new(armcpu_t *armcpu, unsigned long id); void armcpu_init(armcpu_t *armcpu, unsigned long adr); unsigned long armcpu_switchMode(armcpu_t *armcpu, unsigned char mode); - -inline unsigned long armcpu_prefetch(armcpu_t *armcpu) -{ - if(armcpu->CPSR.bits.T == 0) - { - armcpu->instruction = MMU::readWord(armcpu->proc_ID, armcpu->next_instruction); - armcpu->instruct_adr = armcpu->next_instruction; - armcpu->next_instruction += 4; - armcpu->R[15] = armcpu->next_instruction + 4; - return MMU::MMU_WAIT32[armcpu->proc_ID][(armcpu->instruct_adr>>24)&0xF]; - } - armcpu->instruction = MMU::readHWord(armcpu->proc_ID, armcpu->next_instruction); - armcpu->instruct_adr = armcpu->next_instruction; - armcpu->next_instruction = armcpu->next_instruction + 2; - armcpu->R[15] = armcpu->next_instruction + 2; - return MMU::MMU_WAIT16[armcpu->proc_ID][(armcpu->instruct_adr>>24)&0xF]; -} - -inline unsigned long armcpu_exec(armcpu_t *armcpu) -{ - unsigned long c = 1; - if(armcpu->CPSR.bits.T == 0) - { - if((TEST_COND(CONDITION(armcpu->instruction), armcpu->CPSR)) || ((CONDITION(armcpu->instruction)==0xF)&&(CODE(armcpu->instruction)==0x5))) - { - c = arm_instructions_set[INSTRUCTION_INDEX(armcpu->instruction)](armcpu); - } - c += armcpu_prefetch(armcpu); - return c; - } - c = thumb_instructions_set[armcpu->instruction>>6](armcpu); - c += armcpu_prefetch(armcpu); - return c; -} - -inline bool irqExeption(armcpu_t *armcpu) -{ - if(armcpu->CPSR.bits.I) return false; - Status_Reg tmp = armcpu->CPSR; - armcpu_switchMode(armcpu, IRQ); - armcpu->R[14] = armcpu->instruct_adr + 4; - armcpu->SPSR = tmp; - armcpu->CPSR.bits.T = 0; - armcpu->CPSR.bits.I = 1; - armcpu->next_instruction = armcpu->intVector + 0x18; - armcpu->R[15] = armcpu->next_instruction; - armcpu->waitIRQ = 0; - armcpu_prefetch(armcpu); - return true; -} - -inline bool prefetchExeption(armcpu_t *armcpu) -{ - if(armcpu->CPSR.bits.I) return false; - Status_Reg tmp = armcpu->CPSR; - armcpu_switchMode(armcpu, ABT); - armcpu->R[14] = armcpu->instruct_adr + 4; - armcpu->SPSR = tmp; - armcpu->CPSR.bits.T = 0; - armcpu->CPSR.bits.I = 1; - armcpu->next_instruction = armcpu->intVector + 0xC; - armcpu->R[15] = armcpu->next_instruction; - armcpu->waitIRQ = 0; - armcpu_prefetch(armcpu); - return true; -} - - +unsigned long armcpu_prefetch(armcpu_t *armcpu); +unsigned long armcpu_exec(armcpu_t *armcpu); +bool armcpu_irqExeption(armcpu_t *armcpu); +bool armcpu_prefetchExeption(armcpu_t *armcpu); #endif diff --git a/desmume/src/cp15.h b/desmume/src/cp15.h new file mode 100644 index 000000000..5cbe907ba --- /dev/null +++ b/desmume/src/cp15.h @@ -0,0 +1,70 @@ +/* Copyright (C) 2006 yopyop + yopyop156@ifrance.com + yopyop156.ifrance.com + + This file is part of DeSmuME + + DeSmuME is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + DeSmuME is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with DeSmuME; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#ifndef __CP15_H__ +#define __CP15_H__ + +#include "types.h" + +#include "armcpu.h" + +typedef struct +{ + unsigned long IDCode; + unsigned long cacheType; + unsigned long TCMSize; + unsigned long ctrl; + unsigned long DCConfig; + unsigned long ICConfig; + unsigned long writeBuffCtrl; + unsigned long und; + unsigned long DaccessPerm; + unsigned long IaccessPerm; + unsigned long protectBaseSize0; + unsigned long protectBaseSize1; + unsigned long protectBaseSize2; + unsigned long protectBaseSize3; + unsigned long protectBaseSize4; + unsigned long protectBaseSize5; + unsigned long protectBaseSize6; + unsigned long protectBaseSize7; + unsigned long cacheOp; + unsigned long DcacheLock; + unsigned long IcacheLock; + unsigned long ITCMRegion; + unsigned long DTCMRegion; + unsigned long processID; + unsigned long RAM_TAG; + unsigned long testState; + unsigned long cacheDbg; + + armcpu_t * cpu; + +} armcp15_t; + +armcp15_t *armcp15_new(armcpu_t *c); +bool armcp15_dataProcess(armcp15_t *armcp15, unsigned char CRd, unsigned char CRn, unsigned char CRm, unsigned char opcode1, unsigned char opcode2); +bool armcp15_load(armcp15_t *armcp15, unsigned char CRd, unsigned char adr); +bool armcp15_store(armcp15_t *armcp15, unsigned char CRd, unsigned char adr); +bool armcp15_moveCP2ARM(armcp15_t *armcp15, unsigned long * R, unsigned char CRn, unsigned char CRm, unsigned char opcode1, unsigned char opcode2); +bool armcp15_moveARM2CP(armcp15_t *armcp15, unsigned long val, unsigned char CRn, unsigned char CRm, unsigned char opcode1, unsigned char opcode2); + +#endif /* __CP15_H__*/ diff --git a/desmume/src/thumb_instructions.h b/desmume/src/thumb_instructions.h new file mode 100644 index 000000000..ffbd9f693 --- /dev/null +++ b/desmume/src/thumb_instructions.h @@ -0,0 +1,32 @@ +/* Copyright (C) 2006 yopyop + yopyop156@ifrance.com + yopyop156.ifrance.com + + This file is part of DeSmuME + + DeSmuME is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + DeSmuME is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with DeSmuME; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#ifndef THUMB_INSTRUCTIONS_H +#define THUMB_INSTRUCTIONS_H + +#include "types.h" + +#include "armcpu.h" + +extern unsigned long (* __fastcall thumb_instructions_set[1024])(armcpu_t * cpu); + +#endif +