core:
- fix support calibrating the stylus with firmware; - some cleanup MMU; addons: - fix return value for blank memory (change to 0xFF);
This commit is contained in:
mtabachenko
parent
49667709bd
commit
cf04dac50f
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@ -125,7 +125,8 @@ void mmu_log_debug_ARM7(u32 adr, const char *fmt, ...)
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if (adr < 0x4000004) return;
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if (adr > 0x4808FFF) return;
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#if 1
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if (adr >= 0x4000004 && adr <= 0x40001C4) return; // ARM7 I/O Map
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if (adr >= 0x4000004 && adr < 0x4000180) return; // ARM7 I/O Map
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if (adr >= 0x4000180 && adr <= 0x40001C4) return; // IPC/ROM
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if (adr >= 0x4000204 && adr <= 0x400030C) return; // Memory and IRQ Control
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if (adr >= 0x4000400 && adr <= 0x400051E) return; // Sound Registers
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if (adr >= 0x4100000 && adr <= 0x4100014) return; // IPC/ROM
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@ -2343,7 +2344,7 @@ void FASTCALL _MMU_ARM9_write08(u32 adr, u8 val)
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}
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MMU.MMU_MEM[ARMCPU_ARM9][0x40][adr&MMU.MMU_MASK[ARMCPU_ARM9][adr>>20]]=val;
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MMU.MMU_MEM[ARMCPU_ARM9][0x40][adr&MMU.MMU_MASK[ARMCPU_ARM9][0x40]]=val;
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return;
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}
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@ -2833,7 +2834,7 @@ void FASTCALL _MMU_ARM9_write16(u32 adr, u16 val)
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}
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}
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T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr&MMU.MMU_MASK[ARMCPU_ARM9][adr>>20], val);
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T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr&MMU.MMU_MASK[ARMCPU_ARM9][0x40], val);
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return;
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}
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@ -3256,7 +3257,7 @@ void FASTCALL _MMU_ARM9_write32(u32 adr, u32 val)
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}
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}
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T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][adr>>20], val);
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T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][0x40], val);
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return;
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}
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if(adr>=0x05000000 && adr<0x06200000)
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@ -3304,6 +3305,7 @@ u8 FASTCALL _MMU_ARM9_read08(u32 adr)
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case eng_3D_GXSTAT:
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return MMU_new.gxstat.read(8,adr);
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}
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return MMU.MMU_MEM[ARMCPU_ARM9][0x40][adr&MMU.MMU_MASK[ARMCPU_ARM9][0x40]];
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}
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bool unmapped;
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@ -3316,7 +3318,7 @@ u8 FASTCALL _MMU_ARM9_read08(u32 adr)
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//================================================= MMU ARM9 read 16
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u16 FASTCALL _MMU_ARM9_read16(u32 adr)
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{
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mmu_log_debug_ARM9(adr, "(read16) 0x%04X", T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20) & 0xFF]));
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mmu_log_debug_ARM9(adr, "(read16) 0x%04X", T1ReadWord_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM9][adr >> 20], adr & MMU.MMU_MASK[ARMCPU_ARM9][adr >> 20]));
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if(adr<0x02000000)
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return T1ReadWord_guaranteedAligned(MMU.ARM9_ITCM, adr & 0x7FFE);
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@ -3392,7 +3394,7 @@ u16 FASTCALL _MMU_ARM9_read16(u32 adr)
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}
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return T1ReadWord_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][adr >> 20]);
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return T1ReadWord_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][0x40]);
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}
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bool unmapped;
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@ -3406,7 +3408,7 @@ u16 FASTCALL _MMU_ARM9_read16(u32 adr)
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//================================================= MMU ARM9 read 32
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u32 FASTCALL _MMU_ARM9_read32(u32 adr)
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{
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mmu_log_debug_ARM9(adr, "(read32) 0x%08X", T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20)]));
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mmu_log_debug_ARM9(adr, "(read32) 0x%08X", T1ReadLong_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM9][(adr >> 20)], adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20)]));
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if(adr<0x02000000)
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return T1ReadLong_guaranteedAligned(MMU.ARM9_ITCM, adr&0x7FFC);
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@ -3500,7 +3502,7 @@ u32 FASTCALL _MMU_ARM9_read32(u32 adr)
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case REG_GCDATAIN:
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return MMU_readFromGC<ARMCPU_ARM9>();
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}
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return T1ReadLong_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20)]);
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return T1ReadLong_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][0x40]);
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}
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bool unmapped;
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@ -3566,6 +3568,8 @@ void FASTCALL _MMU_ARM7_write08(u32 adr, u8 val)
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write_auxspicnt(9,8,1,val);
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return;
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}
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MMU.MMU_MEM[ARMCPU_ARM7][0x40][adr&MMU.MMU_MASK[ARMCPU_ARM7][0x40]]=val;
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return;
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}
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bool unmapped;
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@ -3862,7 +3866,7 @@ void FASTCALL _MMU_ARM7_write16(u32 adr, u16 val)
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}
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T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM7][0x40], adr&MMU.MMU_MASK[ARMCPU_ARM7][adr>>20], val);
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T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM7][0x40], adr&MMU.MMU_MASK[ARMCPU_ARM7][0x40], val);
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return;
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}
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@ -3977,7 +3981,7 @@ void FASTCALL _MMU_ARM7_write32(u32 adr, u32 val)
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MMU_writeToGCControl<ARMCPU_ARM7>(val);
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return;
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}
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T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM7][adr>>20], val);
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T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM7][0x40], val);
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return;
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}
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@ -4008,24 +4012,27 @@ u8 FASTCALL _MMU_ARM7_read08(u32 adr)
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if (adr == REG_RTC) return (u8)rtcRead();
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adr &= 0x0FFFFFFF;
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if (adr >> 24 == 4)
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{
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if(MMU_new.is_dma(adr)) return MMU_new.read_dma(ARMCPU_ARM7,8,adr);
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// Address is an IO register
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//switch(adr) {}
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return MMU.MMU_MEM[ARMCPU_ARM7][0x40][adr&MMU.MMU_MASK[ARMCPU_ARM7][0x40]];
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}
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bool unmapped;
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adr = MMU_LCDmap<ARMCPU_ARM7>(adr,unmapped);
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if(unmapped) return 0;
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return MMU.MMU_MEM[ARMCPU_ARM7][(adr>>20)&0xFF][adr&MMU.MMU_MASK[ARMCPU_ARM7][(adr>>20)&0xFF]];
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return MMU.MMU_MEM[ARMCPU_ARM7][adr>>20][adr&MMU.MMU_MASK[ARMCPU_ARM7][adr>>20]];
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}
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//================================================= MMU ARM7 read 16
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u16 FASTCALL _MMU_ARM7_read16(u32 adr)
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{
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mmu_log_debug_ARM7(adr, "(read16) 0x%04X", T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20) & 0xFF], adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20) & 0xFF]));
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mmu_log_debug_ARM7(adr, "(read16) 0x%04X", T1ReadWord_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM7][adr >> 20], adr & MMU.MMU_MASK[ARMCPU_ARM7][adr >> 20]));
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//wifi mac access
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if ((adr>=0x04800000)&&(adr<0x05000000))
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@ -4078,7 +4085,7 @@ u16 FASTCALL _MMU_ARM7_read16(u32 adr)
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case REG_POSTFLG:
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return 1;
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}
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return T1ReadWord_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM7][adr >> 20], adr & MMU.MMU_MASK[ARMCPU_ARM7][adr >> 20]);
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return T1ReadWord_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM7][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM7][0x40]);
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}
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bool unmapped;
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@ -4092,7 +4099,7 @@ u16 FASTCALL _MMU_ARM7_read16(u32 adr)
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//================================================= MMU ARM7 read 32
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u32 FASTCALL _MMU_ARM7_read32(u32 adr)
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{
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mmu_log_debug_ARM7(adr, "(read32) 0x%08X", T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20) & 0xFF], adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20) & 0xFF]));
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mmu_log_debug_ARM7(adr, "(read32) 0x%08X", T1ReadLong_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20)], adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20)]));
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//wifi mac access
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if ((adr>=0x04800000)&&(adr<0x05000000))
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@ -4138,7 +4145,7 @@ u32 FASTCALL _MMU_ARM7_read32(u32 adr)
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return MMU_readFromGC<ARMCPU_ARM7>();
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}
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return T1ReadLong_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20)], adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20)]);
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return T1ReadLong_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM7][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM7][0x40]);
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}
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bool unmapped;
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@ -1876,6 +1876,10 @@ void NDS_Reset()
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INFO("ARM7 BIOS is loaded.\n");
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} else {
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NDS_ARM7.swi_tab = ARM7_swi_tab;
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for (int t = 0; t < 16384; t++)
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MMU.ARM7_BIOS[t] = 0xFF;
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_MMU_write32<ARMCPU_ARM7>(0x00, 0xE25EF002);
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_MMU_write32<ARMCPU_ARM7>(0x04, 0xEAFFFFFE);
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_MMU_write32<ARMCPU_ARM7>(0x18, 0xEA000000);
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@ -1902,18 +1906,7 @@ void NDS_Reset()
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INFO("ARM9 BIOS is loaded.\n");
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} else {
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NDS_ARM9.swi_tab = ARM9_swi_tab;
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#if 0
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0018, 0xEA000000);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0020, 0xE92D500F);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0024, 0xEE190F11);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0028, 0xE1A00620);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF002C, 0xE1A00600);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0030, 0xE2800C40);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0034, 0xE28FE000);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0038, 0xE510F004);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF003C, 0xE8BD500F);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0040, 0xE25EF004);
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#else
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for (int t = 0; t < 4096; t++)
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MMU.ARM9_BIOS[t] = 0xFF;
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@ -1931,7 +1924,6 @@ void NDS_Reset()
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_MMU_write32<ARMCPU_ARM9>(0xFFFF028C, 0xE510F004);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0290, 0xE8BD500F);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0294, 0xE25EF004);
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#endif
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}
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if (firmware)
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@ -2075,14 +2067,19 @@ void NDS_Reset()
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// Save touchscreen calibration info in a structure
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// so we can easily access it at any time
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TSCal.adc.x1 = _MMU_read16<ARMCPU_ARM9>(0x027FFC80 + 0x58);
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TSCal.adc.y1 = _MMU_read16<ARMCPU_ARM9>(0x027FFC80 + 0x5A);
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TSCal.scr.x1 = _MMU_read08<ARMCPU_ARM9>(0x027FFC80 + 0x5C);
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TSCal.scr.y1 = _MMU_read08<ARMCPU_ARM9>(0x027FFC80 + 0x5D);
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TSCal.adc.x2 = _MMU_read16<ARMCPU_ARM9>(0x027FFC80 + 0x5E);
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TSCal.adc.y2 = _MMU_read16<ARMCPU_ARM9>(0x027FFC80 + 0x60);
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TSCal.scr.x2 = _MMU_read08<ARMCPU_ARM9>(0x027FFC80 + 0x62);
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TSCal.scr.y2 = _MMU_read08<ARMCPU_ARM9>(0x027FFC80 + 0x63);
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TSCal.adc.x1 = _MMU_read16<ARMCPU_ARM7>(0x027FFC80 + 0x58);
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TSCal.adc.y1 = _MMU_read16<ARMCPU_ARM7>(0x027FFC80 + 0x5A);
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TSCal.scr.x1 = _MMU_read08<ARMCPU_ARM7>(0x027FFC80 + 0x5C);
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TSCal.scr.y1 = _MMU_read08<ARMCPU_ARM7>(0x027FFC80 + 0x5D);
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TSCal.adc.x2 = _MMU_read16<ARMCPU_ARM7>(0x027FFC80 + 0x5E);
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TSCal.adc.y2 = _MMU_read16<ARMCPU_ARM7>(0x027FFC80 + 0x60);
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TSCal.scr.x2 = _MMU_read08<ARMCPU_ARM7>(0x027FFC80 + 0x62);
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TSCal.scr.y2 = _MMU_read08<ARMCPU_ARM7>(0x027FFC80 + 0x63);
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TSCal.adc.width = (TSCal.adc.x2 - TSCal.adc.x1);
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TSCal.adc.height = (TSCal.adc.y2 - TSCal.adc.y1);
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TSCal.scr.width = (TSCal.scr.x2 - TSCal.scr.x1);
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TSCal.scr.height = (TSCal.scr.y2 - TSCal.scr.y1);
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MainScreen.offset = 0;
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SubScreen.offset = 192;
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@ -2143,13 +2140,13 @@ INLINE u16 NDS_getADCTouchPosX(u16 scrX)
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// we're basically adjusting the ADC results to
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// compensate for how they will be interpreted.
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// the actual system doesn't do this transformation.
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int rv = (scrX - TSCal.scr.x1 + 1) * (TSCal.adc.x2 - TSCal.adc.x1) / (TSCal.scr.x2 - TSCal.scr.x1) + TSCal.adc.x1;
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int rv = (scrX - TSCal.scr.x1 + 1) * TSCal.adc.width / TSCal.scr.width + TSCal.adc.x1;
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rv = min(0xFFF, max(0, rv));
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return (u16)rv;
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}
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INLINE u16 NDS_getADCTouchPosY(u16 scrY)
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{
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int rv = (scrY - TSCal.scr.y1 + 1) * (TSCal.adc.y2 - TSCal.adc.y1) / (TSCal.scr.y2 - TSCal.scr.y1) + TSCal.adc.y1;
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int rv = (scrY - TSCal.scr.y1 + 1) * TSCal.adc.height / TSCal.scr.height + TSCal.adc.y1;
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rv = min(0xFFF, max(0, rv));
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return (u16)rv;
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}
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@ -295,12 +295,16 @@ typedef struct TSCalInfo
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{
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u16 x1, x2;
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u16 y1, y2;
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u16 width;
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u16 height;
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} adc;
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struct scr
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{
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u8 x1, x2;
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u8 y1, y2;
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u16 width;
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u16 height;
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} scr;
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} TSCalInfo;
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@ -92,7 +92,7 @@ static u8 ExpMemory_read08(u32 adr)
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if (adr >= 0x09000000)
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{
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u32 offs = (adr - 0x09000000);
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if (offs >= expMemSize) return (0);
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if (offs >= expMemSize) return (0xFF);
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return (T1ReadByte(expMemory, offs));
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}
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@ -109,7 +109,7 @@ static u16 ExpMemory_read16(u32 adr)
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if (adr >= 0x09000000)
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{
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u32 offs = (adr - 0x09000000);
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if (offs >= expMemSize) return (0);
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if (offs >= expMemSize) return (0xFFFF);
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return (T1ReadWord(expMemory, offs));
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}
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@ -123,7 +123,7 @@ static u32 ExpMemory_read32(u32 adr)
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if (adr >= 0x09000000)
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{
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u32 offs = (adr - 0x09000000);
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if (offs >= expMemSize) return (0);
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if (offs >= expMemSize) return (0xFFFFFFFF);
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return (T1ReadLong(expMemory, offs));
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}
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@ -38,7 +38,7 @@ static u8 guitarGrip_read08(u32 adr)
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{
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//INFO("GuitarGrip: read 08 at 0x%08X\n", adr);
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if (adr == 0x0A000000) return (~guitarKeyStatus);
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return (0x0);
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return (0xFF);
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}
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static u16 guitarGrip_read16(u32 adr)
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{
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@ -46,12 +46,12 @@ static u16 guitarGrip_read16(u32 adr)
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if (adr == 0x080000BE) return (0xF9FF);
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if (adr == 0x0801FFFE) return (0xF9FF);
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return (0);
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return (0xFFFF);
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}
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static u32 guitarGrip_read32(u32 adr)
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{
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//INFO("GuitarGrip: read 32 at 0x%08X\n", adr);
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return (0);
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return (0xFFFFFFFF);
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}
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static void guitarGrip_info(char *info) { strcpy(info, "Guitar Grip for Guitar Hero games"); }
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|
||||
|
|
|
|||
|
|
@ -28,9 +28,9 @@ static void None_config(void) {}
|
|||
static void None_write08(u32 adr, u8 val) {}
|
||||
static void None_write16(u32 adr, u16 val) {}
|
||||
static void None_write32(u32 adr, u32 val) {}
|
||||
static u8 None_read08(u32 adr){ return (0); }
|
||||
static u16 None_read16(u32 adr){ return (0); }
|
||||
static u32 None_read32(u32 adr){ return (0); }
|
||||
static u8 None_read08(u32 adr){ return (0xFF); }
|
||||
static u16 None_read16(u32 adr){ return (0xFFFF); }
|
||||
static u32 None_read32(u32 adr){ return (0xFFFFFFFF); }
|
||||
static void None_info(char *info) { strcpy(info, "Nothing in GBA slot"); }
|
||||
|
||||
ADDONINTERFACE addonNone = {
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@ static void RumblePak_write32(u32 adr, u32 val)
|
|||
|
||||
static u8 RumblePak_read08(u32 adr)
|
||||
{
|
||||
return (0);
|
||||
return (0xFF);
|
||||
}
|
||||
|
||||
static u16 RumblePak_read16(u32 adr)
|
||||
|
|
@ -70,7 +70,7 @@ static u16 RumblePak_read16(u32 adr)
|
|||
|
||||
static u32 RumblePak_read32(u32 adr)
|
||||
{
|
||||
return (0);
|
||||
return (0xFFFFFFFF);
|
||||
}
|
||||
|
||||
static void RumblePak_info(char *info)
|
||||
|
|
|
|||
|
|
@ -65,7 +65,7 @@ void CFIRMWARE::crypt64BitDown(u32 *ptr)
|
|||
u32 Z = (keyBuf[i] ^ X);
|
||||
X = keyBuf[DWNUM(0x048 + (((Z >> 24) & 0xFF) << 2))];
|
||||
X = (keyBuf[DWNUM(0x448 + (((Z >> 16) & 0xFF) << 2))] + X);
|
||||
X = (keyBuf[DWNUM(0x848 + (((Z >> 8) & 0xFF) << 2))] ^ X);
|
||||
X = (keyBuf[DWNUM(0x848 + (((Z >> 8) & 0xFF) << 2))] ^ X);
|
||||
X = (keyBuf[DWNUM(0xC48 + ((Z & 0xFF) << 2))] + X);
|
||||
X = (Y ^ X);
|
||||
Y = Z;
|
||||
|
|
@ -117,7 +117,6 @@ bool CFIRMWARE::initKeycode(u32 idCode, int level, u32 modulo)
|
|||
return TRUE;
|
||||
}
|
||||
|
||||
// TODO
|
||||
u16 CFIRMWARE::getBootCodeCRC16()
|
||||
{
|
||||
unsigned int i, j;
|
||||
|
|
@ -338,11 +337,14 @@ bool CFIRMWARE::load()
|
|||
|
||||
u32 src = 0;
|
||||
|
||||
if (CommonSettings.UseExtFirmware == false) return false;
|
||||
if (strlen(CommonSettings.Firmware) == 0) return false;
|
||||
if (CommonSettings.UseExtFirmware == false)
|
||||
return false;
|
||||
if (strlen(CommonSettings.Firmware) == 0)
|
||||
return false;
|
||||
|
||||
FILE *fp = fopen(CommonSettings.Firmware, "rb");
|
||||
if (!fp) return false;
|
||||
if (!fp)
|
||||
return false;
|
||||
fseek(fp, 0, SEEK_END);
|
||||
size = ftell(fp);
|
||||
fseek(fp, 0, SEEK_SET);
|
||||
|
|
@ -352,13 +354,28 @@ bool CFIRMWARE::load()
|
|||
return false;
|
||||
}
|
||||
data = new u8 [size];
|
||||
if (!data) { fclose(fp); return false; }
|
||||
if (fread(data, 1, size, fp) != size) { delete [] data; fclose(fp); return false; }
|
||||
if (!data)
|
||||
{
|
||||
fclose(fp);
|
||||
return false;
|
||||
}
|
||||
|
||||
if (fread(data, 1, size, fp) != size)
|
||||
{
|
||||
delete [] data;
|
||||
fclose(fp);
|
||||
return false;
|
||||
}
|
||||
|
||||
memcpy(&header, data, sizeof(header));
|
||||
if ((header.fw_identifier[0] != 'M') ||
|
||||
(header.fw_identifier[1] != 'A') ||
|
||||
(header.fw_identifier[2] != 'C')) { delete [] data; fclose(fp); return false; }
|
||||
(header.fw_identifier[2] != 'C'))
|
||||
{
|
||||
delete [] data;
|
||||
fclose(fp);
|
||||
return false;
|
||||
}
|
||||
|
||||
shift1 = ((header.shift_amounts >> 0) & 0x07);
|
||||
shift2 = ((header.shift_amounts >> 3) & 0x07);
|
||||
|
|
@ -377,24 +394,64 @@ bool CFIRMWARE::load()
|
|||
ARM9bootAddr = part1ram;
|
||||
ARM7bootAddr = part2ram;
|
||||
|
||||
if(initKeycode(T1ReadLong(data, 0x08), 1, 0xC) == FALSE) { delete [] data; fclose(fp); return false; };
|
||||
if(initKeycode(T1ReadLong(data, 0x08), 1, 0xC) == FALSE)
|
||||
{
|
||||
delete [] data;
|
||||
fclose(fp);
|
||||
return false;
|
||||
}
|
||||
|
||||
#if 0
|
||||
crypt64BitDown((u32*)&data[0x18]);
|
||||
if(initKeycode(T1ReadLong(data, 0x08), 2, 0xC) == FALSE) { delete [] data; fclose(fp); return false; };
|
||||
#else
|
||||
// hack?
|
||||
data[0x18] = 0x00;
|
||||
data[0x19] = 0x00;
|
||||
data[0x1A] = 0x00;
|
||||
data[0x1B] = 0x00;
|
||||
|
||||
data[0x1C] = 0x00;
|
||||
data[0x1D] = 0xFF;
|
||||
data[0x1E] = 0x00;
|
||||
data[0x1F] = 0x00;
|
||||
#endif
|
||||
|
||||
if(initKeycode(T1ReadLong(data, 0x08), 2, 0xC) == FALSE)
|
||||
{
|
||||
delete [] data;
|
||||
fclose(fp);
|
||||
return false;
|
||||
}
|
||||
|
||||
size9 = decrypt(data + part1addr, tmp_data9);
|
||||
if (!tmp_data9) { delete [] data; fclose(fp); return false; };
|
||||
if (!tmp_data9)
|
||||
{
|
||||
delete [] data;
|
||||
fclose(fp);
|
||||
return false;
|
||||
}
|
||||
|
||||
size7 = decrypt(data + part2addr, tmp_data7);
|
||||
if (!tmp_data7) { delete [] tmp_data9; delete [] data; fclose(fp); return false; };
|
||||
if (!tmp_data7)
|
||||
{
|
||||
delete [] tmp_data9;
|
||||
delete [] data;
|
||||
fclose(fp);
|
||||
return false;
|
||||
}
|
||||
|
||||
u16 crc16_mine = getBootCodeCRC16();
|
||||
|
||||
if (crc16_mine != header.part12_boot_crc16)
|
||||
{
|
||||
INFO("Firmware: ERROR: the boot code CRC16 (0x%04X) doesn't match the value in the firmware header (0x%04X)", crc16_mine, header.part12_boot_crc16);
|
||||
delete [] tmp_data9; delete [] tmp_data7; delete [] data; fclose(fp);
|
||||
delete [] tmp_data9;
|
||||
delete [] tmp_data7;
|
||||
delete [] data;
|
||||
fclose(fp);
|
||||
return false;
|
||||
}
|
||||
|
||||
// Copy firmware boot codes to their respective locations
|
||||
src = 0;
|
||||
for(u32 i = 0; i < (size9 >> 2); i++)
|
||||
|
|
@ -469,10 +526,21 @@ bool CFIRMWARE::load()
|
|||
ARM7bootAddr = part2ram;
|
||||
|
||||
size9 = decompress(data + part1addr, tmp_data9);
|
||||
if (!tmp_data9) { delete [] data; fclose(fp); return false; };
|
||||
if (!tmp_data9)
|
||||
{
|
||||
delete [] data;
|
||||
fclose(fp);
|
||||
return false;
|
||||
}
|
||||
|
||||
size7 = decompress(data + part2addr, tmp_data7);
|
||||
if (!tmp_data7) { delete [] tmp_data9; delete [] data; fclose(fp); return false; };
|
||||
if (!tmp_data7)
|
||||
{
|
||||
delete [] tmp_data9;
|
||||
delete [] data;
|
||||
fclose(fp);
|
||||
return false;
|
||||
};
|
||||
// Copy firmware boot codes to their respective locations
|
||||
src = 0;
|
||||
for(u32 i = 0; i < (size9 >> 2); i++)
|
||||
|
|
|
|||
Loading…
Reference in New Issue