From 90ff47e8fe70870099a2785ee0167e0e74feb3c9 Mon Sep 17 00:00:00 2001 From: luigi__ Date: Sat, 3 Apr 2010 19:14:44 +0000 Subject: [PATCH] ARM: fix a bug in the instruction table. Fixes issue #2977277 (undefined instruction 0x54F13001). --- desmume/src/instruction_tabdef.inc | 64 +++++++++++++++--------------- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/desmume/src/instruction_tabdef.inc b/desmume/src/instruction_tabdef.inc index 8f6dc9ba8..7053b6bca 100644 --- a/desmume/src/instruction_tabdef.inc +++ b/desmume/src/instruction_tabdef.inc @@ -1399,39 +1399,39 @@ TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0110 1 1111 //------------------------------------------ -TABDECL( OP_UND), //010 0111 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0111 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_STRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0100 0 0000 -TABDECL( OP_UND), //010 0111 1 1111 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0100 0 0000 +TABDECL( OP_LDRB_P_IMM_OFF_POSTIND), //010 0111 1 1111 //------------------------------------------ TABDECL( OP_STR_M_IMM_OFF), //010 1000 0 0000 TABDECL( OP_STR_M_IMM_OFF),