From 81cc43b482f2d492ce1f89707cc67100897cae9f Mon Sep 17 00:00:00 2001
From: shashclp <shashclp@users.sf.net>
Date: Sun, 28 Oct 2007 16:43:13 +0000
Subject: [PATCH] - Patch #1810861 by carlo_bramini

---
 desmume/src/armcpu.c             | 54 +++++++++++++++++++++++++++++++-
 desmume/src/armcpu.h             |  6 ++++
 desmume/src/thumb_instructions.c |  2 +-
 3 files changed, 60 insertions(+), 2 deletions(-)

diff --git a/desmume/src/armcpu.c b/desmume/src/armcpu.c
index 179593d2d..a3071857e 100644
--- a/desmume/src/armcpu.c
+++ b/desmume/src/armcpu.c
@@ -26,6 +26,57 @@
 #include <stdlib.h>
 #include <stdio.h>
 
+const unsigned char arm_cond_table[16*16] = {
+    /* N=0, Z=0, C=0, V=0 */
+    0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,
+    0x00,0xFF,0xFF,0x00,0xFF,0x00,0xFF,0x20,
+    /* N=0, Z=0, C=0, V=1 */
+    0x00,0xFF,0x00,0xFF,0x00,0xFF,0xFF,0x00,
+    0x00,0xFF,0x00,0xFF,0x00,0xFF,0xFF,0x20,
+    /* N=0, Z=0, C=1, V=0 */
+    0x00,0xFF,0xFF,0x00,0x00,0xFF,0x00,0xFF,
+    0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x20,
+    /* N=0, Z=0, C=1, V=1 */
+    0x00,0xFF,0xFF,0x00,0x00,0xFF,0xFF,0x00,
+    0xFF,0x00,0x00,0xFF,0x00,0xFF,0xFF,0x20,
+    /* N=0, Z=1, C=0, V=0 */
+    0xFF,0x00,0x00,0xFF,0x00,0xFF,0x00,0xFF,
+    0x00,0xFF,0xFF,0x00,0x00,0xFF,0xFF,0x20,
+    /* N=0, Z=1, C=0, V=1 */
+    0xFF,0x00,0x00,0xFF,0x00,0xFF,0xFF,0x00,
+    0x00,0xFF,0x00,0xFF,0x00,0xFF,0xFF,0x20,
+    /* N=0, Z=1, C=1, V=0 */
+    0xFF,0x00,0xFF,0x00,0x00,0xFF,0x00,0xFF,
+    0x00,0xFF,0xFF,0x00,0x00,0xFF,0xFF,0x20,
+    /* N=0, Z=1, C=1, V=1 */
+    0xFF,0x00,0xFF,0x00,0x00,0xFF,0xFF,0x00,
+    0x00,0xFF,0x00,0xFF,0x00,0xFF,0xFF,0x20,
+    /* N=1, Z=0, C=0, V=0 */
+    0x00,0xFF,0x00,0xFF,0xFF,0x00,0x00,0xFF,
+    0x00,0xFF,0x00,0xFF,0x00,0xFF,0xFF,0x20,
+    /* N=1, Z=0, C=0, V=1 */
+    0x00,0xFF,0x00,0xFF,0xFF,0x00,0xFF,0x00,
+    0x00,0xFF,0xFF,0x00,0xFF,0x00,0xFF,0x20,
+    /* N=1, Z=0, C=1, V=0 */
+    0x00,0xFF,0xFF,0x00,0xFF,0x00,0x00,0xFF,
+    0xFF,0x00,0x00,0xFF,0x00,0xFF,0xFF,0x20,
+    /* N=1, Z=0, C=1, V=1 */
+    0x00,0xFF,0xFF,0x00,0xFF,0x00,0xFF,0x00,
+    0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x20,
+    /* N=1, Z=1, C=0, V=0 */
+    0xFF,0x00,0x00,0xFF,0xFF,0x00,0x00,0xFF,
+    0x00,0xFF,0x00,0xFF,0x00,0xFF,0xFF,0x20,
+    /* N=1, Z=1, C=0, V=1 */
+    0xFF,0x00,0x00,0xFF,0xFF,0x00,0xFF,0x00,
+    0x00,0xFF,0xFF,0x00,0x00,0xFF,0xFF,0x20,
+    /* N=1, Z=1, C=1, V=0 */
+    0xFF,0x00,0xFF,0x00,0xFF,0x00,0x00,0xFF,
+    0x00,0xFF,0x00,0xFF,0x00,0xFF,0xFF,0x20,
+    /* N=1, Z=1, C=1, V=1 */
+    0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,
+    0x00,0xFF,0xFF,0x00,0x00,0xFF,0xFF,0x20,
+};
+
 armcpu_t NDS_ARM7;
 armcpu_t NDS_ARM9;
 
@@ -496,7 +547,8 @@ u32 armcpu_exec(armcpu_t *armcpu)
 
 	if(armcpu->CPSR.bits.T == 0)
 	{
-		if((TEST_COND(CONDITION(armcpu->instruction), armcpu->CPSR)) || ((CONDITION(armcpu->instruction)==0xF)&&(CODE(armcpu->instruction)==0x5)))
+/*        if((TEST_COND(CONDITION(armcpu->instruction), armcpu->CPSR)) || ((CONDITION(armcpu->instruction)==0xF)&&(CODE(armcpu->instruction)==0x5)))*/
+        if((TEST_COND(CONDITION(armcpu->instruction), CODE(armcpu->instruction), armcpu->CPSR)))
 		{
 			c += arm_instructions_set[INSTRUCTION_INDEX(armcpu->instruction)](armcpu);
 		}
diff --git a/desmume/src/armcpu.h b/desmume/src/armcpu.h
index d7c5ba392..773637eef 100644
--- a/desmume/src/armcpu.h
+++ b/desmume/src/armcpu.h
@@ -69,6 +69,7 @@ extern "C" {
 #define LE	0xD
 #define AL	0xE	
 
+/*
 #define TEST_COND(cond, CPSR)	(((cond)==AL) ||\
 					 (((cond)==EQ) && ( CPSR.bits.Z))||\
 					 (((cond)==NE) && (!CPSR.bits.Z))||\
@@ -84,6 +85,11 @@ extern "C" {
 					 (((cond)==LT) && (CPSR.bits.N!=CPSR.bits.V))||\
 					 (((cond)==GT) && (CPSR.bits.Z==0) && (CPSR.bits.N==CPSR.bits.V))||\
 					 (((cond)==LE) && ((CPSR.bits.Z) || (CPSR.bits.N!=CPSR.bits.V))))
+*/
+
+extern const unsigned char arm_cond_table[16*16];
+
+#define TEST_COND(cond, inst, CPSR)   ((arm_cond_table[((CPSR.val >> 24) & 0xf0)+(cond)] >> (inst)) & 1)
 
 
 enum Mode
diff --git a/desmume/src/thumb_instructions.c b/desmume/src/thumb_instructions.c
index 8a344bcc7..fbe5e31c8 100644
--- a/desmume/src/thumb_instructions.c
+++ b/desmume/src/thumb_instructions.c
@@ -868,7 +868,7 @@ static u32 FASTCALL OP_LDMIA_THUMB(armcpu_t *cpu)
 static u32 FASTCALL OP_B_COND(armcpu_t *cpu)
 {
      u32 i = cpu->instruction;
-     if(!TEST_COND((i>>8)&0xF, cpu->CPSR))
+     if(!TEST_COND((i>>8)&0xF, 0, cpu->CPSR))
           return 1;
      
      cpu->R[15] += ((s32)((s8)(i&0xFF)))<<1;