From 6cf0fff5d48ea5b3ec0b44437841602ea1096e2b Mon Sep 17 00:00:00 2001
From: zeromus <zeromus@users.sf.net>
Date: Sat, 1 May 2010 18:36:13 +0000
Subject: [PATCH] i dont understand why the gdb stub needs these things, but
 we'll leave them for now.

---
 desmume/src/NDSSystem.cpp | 16 +++++++--------
 desmume/src/armcpu.cpp    | 42 +++++++++++++++++++--------------------
 2 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/desmume/src/NDSSystem.cpp b/desmume/src/NDSSystem.cpp
index 8665fce09..9b3151637 100644
--- a/desmume/src/NDSSystem.cpp
+++ b/desmume/src/NDSSystem.cpp
@@ -1936,11 +1936,11 @@ void execHardware_interrupts()
 {
 	if((MMU.reg_IF[0]&MMU.reg_IE[0]) && (MMU.reg_IME[0]))
 	{
-//#ifdef GDB_STUB
-//		if ( armcpu_flagIrq( &NDS_ARM9)) 
-//#else
+#ifdef GDB_STUB
+		if ( armcpu_flagIrq( &NDS_ARM9)) 
+#else
 		if ( armcpu_irqException(&NDS_ARM9))
-//#endif
+#endif
 		{
 			//printf("ARM9 interrupt! flags: %08X ; mask: %08X ; result: %08X\n",MMU.reg_IF[0],MMU.reg_IE[0],MMU.reg_IF[0]&MMU.reg_IE[0]);
 			//nds.ARM9Cycle = nds.cycles;
@@ -1949,11 +1949,11 @@ void execHardware_interrupts()
 
 	if((MMU.reg_IF[1]&MMU.reg_IE[1]) && (MMU.reg_IME[1]))
 	{
-//#ifdef GDB_STUB
-//		if ( armcpu_flagIrq( &NDS_ARM7)) 
-//#else
+#ifdef GDB_STUB
+		if ( armcpu_flagIrq( &NDS_ARM7)) 
+#else
 		if ( armcpu_irqException(&NDS_ARM7))
-//#endif
+#endif
 		{
 			//nds.ARM7Cycle = nds.cycles;
 		}
diff --git a/desmume/src/armcpu.cpp b/desmume/src/armcpu.cpp
index 07ebb15c2..7a987627a 100644
--- a/desmume/src/armcpu.cpp
+++ b/desmume/src/armcpu.cpp
@@ -474,44 +474,44 @@ BOOL armcpu_irqException(armcpu_t *armcpu)
 
 	if(armcpu->CPSR.bits.I) return FALSE;
 
-//#ifdef GDB_STUB
-//	armcpu->irq_flag = 0;
-//#endif
+#ifdef GDB_STUB
+	armcpu->irq_flag = 0;
+#endif
       
 	tmp = armcpu->CPSR;
 	armcpu_switchMode(armcpu, IRQ);
 
-//#ifdef GDB_STUB
-//	armcpu->R[14] = armcpu->next_instruction + 4;
-//#else
+#ifdef GDB_STUB
+	armcpu->R[14] = armcpu->next_instruction + 4;
+#else
 	armcpu->R[14] = armcpu->instruct_adr + 4;
-//#endif
+#endif
 	armcpu->SPSR = tmp;
 	armcpu->CPSR.bits.T = 0;
 	armcpu->CPSR.bits.I = 1;
 	armcpu->next_instruction = armcpu->intVector + 0x18;
 	armcpu->waitIRQ = 0;
 
-//#ifndef GDB_STUB
+#ifndef GDB_STUB
 	armcpu->R[15] = armcpu->next_instruction + 8;
 	armcpu_prefetch(armcpu);
-//#endif
+#endif
 
 	return TRUE;
 }
 
-//BOOL
-//armcpu_flagIrq( armcpu_t *armcpu) {
-//  if(armcpu->CPSR.bits.I) return FALSE;
-//
-//  armcpu->waitIRQ = 0;
-//
-//#ifdef GDB_STUB
-//  armcpu->irq_flag = 1;
-//#endif
-//
-//  return TRUE;
-//}
+BOOL
+armcpu_flagIrq( armcpu_t *armcpu) {
+  if(armcpu->CPSR.bits.I) return FALSE;
+
+  armcpu->waitIRQ = 0;
+
+#ifdef GDB_STUB
+  armcpu->irq_flag = 1;
+#endif
+
+  return TRUE;
+}
 
 template<int PROCNUM>
 u32 armcpu_exec()