diff --git a/desmume/src/arm_instructions.cpp b/desmume/src/arm_instructions.cpp
index 3b57093bb..d2b0f1b9d 100644
--- a/desmume/src/arm_instructions.cpp
+++ b/desmume/src/arm_instructions.cpp
@@ -1162,8 +1162,8 @@ TEMPLATE static u32 FASTCALL  OP_ADC_IMM_VAL()
      }\
      cpu->CPSR.bits.N = BIT31(cpu->R[REG_POS(i,12)]);\
      cpu->CPSR.bits.Z = (cpu->R[REG_POS(i,12)]==0);\
-	 cpu->CPSR.bits.C = !UNSIGNED_UNDERFLOW(tmp, cpu->CPSR.bits.C, cpu->R[REG_POS(i,12)]); \
-	 cpu->CPSR.bits.V = SIGNED_UNDERFLOW(tmp, cpu->CPSR.bits.C, cpu->R[REG_POS(i,12)]); \
+     cpu->CPSR.bits.C = UNSIGNED_OVERFLOW(shift_op, (u32) cpu->CPSR.bits.C, tmp) | UNSIGNED_OVERFLOW(v, tmp, cpu->R[REG_POS(i,12)]);\
+     cpu->CPSR.bits.V = SIGNED_OVERFLOW(shift_op, (u32) cpu->CPSR.bits.C, tmp) | SIGNED_OVERFLOW(v, tmp, cpu->R[REG_POS(i,12)]);\
      return a; \
      }
      
diff --git a/desmume/src/thumb_instructions.cpp b/desmume/src/thumb_instructions.cpp
index e6efdc87b..9b365b14e 100644
--- a/desmume/src/thumb_instructions.cpp
+++ b/desmume/src/thumb_instructions.cpp
@@ -334,8 +334,8 @@ TEMPLATE static  u32 FASTCALL OP_ADC_REG()
      cpu->CPSR.bits.N = BIT31(res);
      cpu->CPSR.bits.Z = res == 0;
      
-     cpu->CPSR.bits.C = !UNSIGNED_UNDERFLOW(a, b, res);
-	 cpu->CPSR.bits.V = SIGNED_UNDERFLOW(a, b, res);
+     cpu->CPSR.bits.C = UNSIGNED_OVERFLOW(b, (u32) cpu->CPSR.bits.C, tmp) | UNSIGNED_OVERFLOW(tmp, a, res);
+     cpu->CPSR.bits.V = SIGNED_OVERFLOW(b, (u32) cpu->CPSR.bits.C, tmp) | SIGNED_OVERFLOW(tmp, a, res);
      
      return 3;
 }