From 2254c143ed12420b2aeb4a73e5b87367d9e0cd17 Mon Sep 17 00:00:00 2001 From: luigi__ Date: Sun, 2 Aug 2009 23:04:26 +0000 Subject: [PATCH] General: merge ARM9_struct contents into MMU_struct and remove ARM9.h. (why was ARM9 mem separated from the rest? plus MAIN_MEM doesn't really belong to the ARM9) --- desmume/src/ARM9.h | 39 ------- desmume/src/GPU.cpp | 84 ++++++++------- desmume/src/GPU.h | 11 +- desmume/src/MMU.cpp | 124 +++++++++++------------ desmume/src/MMU.h | 68 +++++++++---- desmume/src/NDSSystem.cpp | 30 +++--- desmume/src/NDSSystem.h | 4 +- desmume/src/SPU.cpp | 2 +- desmume/src/rasterize.cpp | 6 +- desmume/src/saves.cpp | 16 +-- desmume/src/texcache.cpp | 14 +-- desmume/src/windows/DeSmuME_2008.vcproj | 4 - desmume/src/windows/DeSmuME_2010.vcxproj | 1 - desmume/src/windows/mapView.cpp | 4 +- desmume/src/windows/oamView.cpp | 6 +- desmume/src/windows/palView.cpp | 20 ++-- desmume/src/windows/ram_search.cpp | 2 +- desmume/src/windows/tileView.cpp | 44 ++++---- 18 files changed, 230 insertions(+), 249 deletions(-) delete mode 100644 desmume/src/ARM9.h diff --git a/desmume/src/ARM9.h b/desmume/src/ARM9.h deleted file mode 100644 index 584d03da4..000000000 --- a/desmume/src/ARM9.h +++ /dev/null @@ -1,39 +0,0 @@ -#ifndef ARM9_H -#define ARM9_H - -#include "types.h" - -struct ALIGN(16) ARM9_struct { - //ARM9 mem - u8 ARM9_ITCM[0x8000]; - u8 ARM9_DTCM[0x4000]; - u8 MAIN_MEM[0x800000]; //this has been expanded to 8MB to support debug consoles - u8 ARM9_REG[0x1000000]; - u8 ARM9_BIOS[0x8000]; - u8 ARM9_VMEM[0x800]; - - #include "PACKED.h" - struct { - u8 ARM9_LCD[0xA4000]; - //an extra 128KB for blank memory, directly after arm9_lcd, so that - //we can easily map things to the end of arm9_lcd to represent - //an unmapped state - u8 blank_memory[0x20000]; - }; - #include "PACKED_END.h" - - u8 ARM9_OAM[0x800]; - - u8* ExtPal[2][4]; - u8* ObjExtPal[2][2]; - - struct TextureInfo { - u8* texPalSlot[6]; - u8* textureSlotAddr[4]; - } texInfo; - -}; - -extern ARM9_struct ARM9Mem; - -#endif diff --git a/desmume/src/GPU.cpp b/desmume/src/GPU.cpp index 51d91d0b7..d43bfc4f8 100644 --- a/desmume/src/GPU.cpp +++ b/desmume/src/GPU.cpp @@ -41,8 +41,6 @@ //#define FORCEINLINE //#define SSE2_NOINTRIN -ARM9_struct ARM9Mem; - extern BOOL click; NDS_Screen MainScreen; NDS_Screen SubScreen; @@ -217,17 +215,17 @@ void GPU_Reset(GPU *g, u8 l) if(g->core == GPU_SUB) { - g->oam = (OAM *)(ARM9Mem.ARM9_OAM + ADDRESS_STEP_1KB); - g->sprMem = ARM9MEM_BOBJ; + g->oam = (OAM *)(MMU.ARM9_OAM + ADDRESS_STEP_1KB); + g->sprMem = MMU_BOBJ; // GPU core B - g->dispx_st = (REG_DISPx*)(&ARM9Mem.ARM9_REG[REG_DISPB]); + g->dispx_st = (REG_DISPx*)(&MMU.ARM9_REG[REG_DISPB]); } else { - g->oam = (OAM *)(ARM9Mem.ARM9_OAM); - g->sprMem = ARM9MEM_AOBJ; + g->oam = (OAM *)(MMU.ARM9_OAM); + g->sprMem = MMU_AOBJ; // GPU core A - g->dispx_st = (REG_DISPx*)(&ARM9Mem.ARM9_REG[0]); + g->dispx_st = (REG_DISPx*)(&MMU.ARM9_REG[0]); } } @@ -361,7 +359,7 @@ void GPU_setVideoProp(GPU * gpu, u32 p) case 1: // Display BG and OBJ layers break; case 2: // Display framebuffer - gpu->VRAMaddr = (u8 *)ARM9Mem.ARM9_LCD + (gpu->vramBlock * 0x20000); + gpu->VRAMaddr = (u8 *)MMU.ARM9_LCD + (gpu->vramBlock * 0x20000); break; case 3: // Display from Main RAM // nothing to be done here @@ -394,10 +392,10 @@ void GPU_setVideoProp(GPU * gpu, u32 p) gpu->sprEnable = cnt->OBJ_Enable; - GPU_setBGProp(gpu, 3, T1ReadWord(ARM9Mem.ARM9_REG, gpu->core * ADDRESS_STEP_4KB + 14)); - GPU_setBGProp(gpu, 2, T1ReadWord(ARM9Mem.ARM9_REG, gpu->core * ADDRESS_STEP_4KB + 12)); - GPU_setBGProp(gpu, 1, T1ReadWord(ARM9Mem.ARM9_REG, gpu->core * ADDRESS_STEP_4KB + 10)); - GPU_setBGProp(gpu, 0, T1ReadWord(ARM9Mem.ARM9_REG, gpu->core * ADDRESS_STEP_4KB + 8)); + GPU_setBGProp(gpu, 3, T1ReadWord(MMU.ARM9_REG, gpu->core * ADDRESS_STEP_4KB + 14)); + GPU_setBGProp(gpu, 2, T1ReadWord(MMU.ARM9_REG, gpu->core * ADDRESS_STEP_4KB + 12)); + GPU_setBGProp(gpu, 1, T1ReadWord(MMU.ARM9_REG, gpu->core * ADDRESS_STEP_4KB + 10)); + GPU_setBGProp(gpu, 0, T1ReadWord(MMU.ARM9_REG, gpu->core * ADDRESS_STEP_4KB + 8)); //GPU_resortBGs(gpu); } @@ -414,17 +412,17 @@ void GPU_setBGProp(GPU * gpu, u16 num, u16 p) if(gpu->core == GPU_SUB) { - gpu->BG_tile_ram[num] = ARM9MEM_BBG; - gpu->BG_bmp_ram[num] = ARM9MEM_BBG; - gpu->BG_bmp_large_ram[num] = ARM9MEM_BBG; - gpu->BG_map_ram[num] = ARM9MEM_BBG; + gpu->BG_tile_ram[num] = MMU_BBG; + gpu->BG_bmp_ram[num] = MMU_BBG; + gpu->BG_bmp_large_ram[num] = MMU_BBG; + gpu->BG_map_ram[num] = MMU_BBG; } else { - gpu->BG_tile_ram[num] = ARM9MEM_ABG + dispCnt->CharacBase_Block * ADDRESS_STEP_64KB ; - gpu->BG_bmp_ram[num] = ARM9MEM_ABG; - gpu->BG_bmp_large_ram[num] = ARM9MEM_ABG; - gpu->BG_map_ram[num] = ARM9MEM_ABG + dispCnt->ScreenBase_Block * ADDRESS_STEP_64KB; + gpu->BG_tile_ram[num] = MMU_ABG + dispCnt->CharacBase_Block * ADDRESS_STEP_64KB ; + gpu->BG_bmp_ram[num] = MMU_ABG; + gpu->BG_bmp_large_ram[num] = MMU_ABG; + gpu->BG_map_ram[num] = MMU_ABG + dispCnt->ScreenBase_Block * ADDRESS_STEP_64KB; } gpu->BG_tile_ram[num] += (cnt->CharacBase_Block * ADDRESS_STEP_16KB); @@ -882,7 +880,7 @@ template void lineLarge8bpp(GPU * gpu) u32 tmp_map = gpu->BG_bmp_large_ram[num] + lg * YBG; u8* map = MMU_gpu_map(tmp_map); - u8* pal = ARM9Mem.ARM9_VMEM + gpu->core * ADDRESS_STEP_1KB; + u8* pal = MMU.ARM9_VMEM + gpu->core * ADDRESS_STEP_1KB; for(int x = 0; x < lg; ++x, ++XBG) { @@ -929,7 +927,7 @@ template INLINE void renderline_textBG(GPU * gpu, u16 XBG, u16 YBG, tile = gpu->BG_tile_ram[num]; xoff = XBG; - pal = ARM9Mem.ARM9_VMEM + gpu->core * ADDRESS_STEP_1KB; + pal = MMU.ARM9_VMEM + gpu->core * ADDRESS_STEP_1KB; if(!bgCnt->Palette_256) // color: 16 palette entries { @@ -991,7 +989,7 @@ template INLINE void renderline_textBG(GPU * gpu, u16 XBG, u16 YBG, if(dispCnt->ExBGxPalette_Enable) // color: extended palette { - pal = ARM9Mem.ExtPal[gpu->core][gpu->BGExtPalSlot[num]]; + pal = MMU.ExtPal[gpu->core][gpu->BGExtPalSlot[num]]; if(!pal) return; } @@ -1133,7 +1131,7 @@ FORCEINLINE void apply_rot_fun(GPU * gpu, s32 X, s32 Y, s16 PA, s16 PB, s16 PC, template FORCEINLINE void rotBG2(GPU * gpu, s32 X, s32 Y, s16 PA, s16 PB, s16 PC, s16 PD, u16 LG) { u8 num = gpu->currBgNum; - u8 * pal = ARM9Mem.ARM9_VMEM + gpu->core * 0x400; + u8 * pal = MMU.ARM9_VMEM + gpu->core * 0x400; // printf("rot mode\n"); apply_rot_fun >(gpu,X,Y,PA,PB,PC,PD,LG, gpu->BG_map_ram[num], gpu->BG_tile_ram[num], pal, 0); } @@ -1149,16 +1147,16 @@ template FORCEINLINE void extRotBG2(GPU * gpu, s32 X, s32 Y, s16 PA { case BGType_AffineExt_256x16: if(dispCnt->ExBGxPalette_Enable) - pal = ARM9Mem.ExtPal[gpu->core][gpu->BGExtPalSlot[num]]; + pal = MMU.ExtPal[gpu->core][gpu->BGExtPalSlot[num]]; else - pal = ARM9Mem.ARM9_VMEM + gpu->core * 0x400; + pal = MMU.ARM9_VMEM + gpu->core * 0x400; if (!pal) return; // 16 bit bgmap entries apply_rot_fun >(gpu,X,Y,PA,PB,PC,PD,LG, gpu->BG_map_ram[num], gpu->BG_tile_ram[num], pal, dispCnt->ExBGxPalette_Enable); return; case BGType_AffineExt_256x1: // 256 colors - pal = ARM9Mem.ARM9_VMEM + gpu->core * 0x400; + pal = MMU.ARM9_VMEM + gpu->core * 0x400; apply_rot_fun >(gpu,X,Y,PA,PB,PC,PD,LG, gpu->BG_bmp_ram[num], NULL, pal, 0); return; case BGType_AffineExt_Direct: @@ -1167,7 +1165,7 @@ template FORCEINLINE void extRotBG2(GPU * gpu, s32 X, s32 Y, s16 PA return; case BGType_Large8bpp: // large screen 256 colors - pal = ARM9Mem.ARM9_VMEM + gpu->core * 0x400; + pal = MMU.ARM9_VMEM + gpu->core * 0x400; apply_rot_fun >(gpu,X,Y,PA,PB,PC,PD,LG, gpu->BG_bmp_large_ram[num], NULL, pal, 0); return; default: break; @@ -1581,9 +1579,9 @@ void GPU::_spriteRender(u8 * dst, u8 * dst_alpha, u8 * typeTab, u8 * prioTab) // If extended palettes are set, use them if (dispCnt->ExOBJPalette_Enable) - pal = (ARM9Mem.ObjExtPal[gpu->core][0]+(spriteInfo->PaletteIndex*0x200)); + pal = (MMU.ObjExtPal[gpu->core][0]+(spriteInfo->PaletteIndex*0x200)); else - pal = (ARM9Mem.ARM9_VMEM + 0x200 + gpu->core *0x400); + pal = (MMU.ARM9_VMEM + 0x200 + gpu->core *0x400); for(j = 0; j < lg; ++j, ++sprX) { @@ -1666,12 +1664,12 @@ void GPU::_spriteRender(u8 * dst, u8 * dst_alpha, u8 * typeTab, u8 * prioTab) if(MODE == SPRITE_2D) { src = (u8 *)MMU_gpu_map(gpu->sprMem + (spriteInfo->TileIndex<<5)); - pal = ARM9Mem.ARM9_VMEM + 0x200 + (gpu->core*0x400 + (spriteInfo->PaletteIndex*32)); + pal = MMU.ARM9_VMEM + 0x200 + (gpu->core*0x400 + (spriteInfo->PaletteIndex*32)); } else { src = (u8 *)MMU_gpu_map(gpu->sprMem + (spriteInfo->TileIndex<sprBoundary)); - pal = ARM9Mem.ARM9_VMEM + 0x200 + gpu->core*0x400 + (spriteInfo->PaletteIndex*32); + pal = MMU.ARM9_VMEM + 0x200 + gpu->core*0x400 + (spriteInfo->PaletteIndex*32); } for(j = 0; j < lg; ++j, ++sprX) @@ -1760,9 +1758,9 @@ void GPU::_spriteRender(u8 * dst, u8 * dst_alpha, u8 * typeTab, u8 * prioTab) src = (u8 *)MMU_gpu_map(gpu->sprMem + (spriteInfo->TileIndex<>3)*sprSize.x*8) + ((y&0x7)*8)); if (dispCnt->ExOBJPalette_Enable) - pal = (u16*)(ARM9Mem.ObjExtPal[gpu->core][0]+(spriteInfo->PaletteIndex*0x200)); + pal = (u16*)(MMU.ObjExtPal[gpu->core][0]+(spriteInfo->PaletteIndex*0x200)); else - pal = (u16*)(ARM9Mem.ARM9_VMEM + 0x200 + gpu->core *0x400); + pal = (u16*)(MMU.ARM9_VMEM + 0x200 + gpu->core *0x400); render_sprite_256 (gpu, i, l, dst, src, pal, dst_alpha, typeTab, prioTab, prio, lg, sprX, x, xdir, spriteInfo->Mode == 1); @@ -1779,7 +1777,7 @@ void GPU::_spriteRender(u8 * dst, u8 * dst_alpha, u8 * typeTab, u8 * prioTab) src = (u8 *)MMU_gpu_map(gpu->sprMem + (spriteInfo->TileIndex<>3)*sprSize.x*4) + ((y&0x7)*4)); } - pal = (u16*)(ARM9Mem.ARM9_VMEM + 0x200 + gpu->core * 0x400); + pal = (u16*)(MMU.ARM9_VMEM + 0x200 + gpu->core * 0x400); pal += (spriteInfo->PaletteIndex<<4); @@ -1964,7 +1962,7 @@ void GPU_set_DISPCAPCNT(u32 val) /*INFO("Capture 0x%X:\n EVA=%i, EVB=%i, wBlock=%i, wOffset=%i, capX=%i, capY=%i\n rBlock=%i, rOffset=%i, srcCap=%i, dst=0x%X, src=0x%X\n srcA=%i, srcB=%i\n\n", val, gpu->dispCapCnt.EVA, gpu->dispCapCnt.EVB, gpu->dispCapCnt.writeBlock, gpu->dispCapCnt.writeOffset, gpu->dispCapCnt.capx, gpu->dispCapCnt.capy, gpu->dispCapCnt.readBlock, gpu->dispCapCnt.readOffset, - gpu->dispCapCnt.capSrc, gpu->dispCapCnt.dst - ARM9Mem.ARM9_LCD, gpu->dispCapCnt.src - ARM9Mem.ARM9_LCD, + gpu->dispCapCnt.capSrc, gpu->dispCapCnt.dst - MMU.ARM9_LCD, gpu->dispCapCnt.src - MMU.ARM9_LCD, gpu->dispCapCnt.srcA, gpu->dispCapCnt.srcB);*/ } @@ -1984,7 +1982,7 @@ static void GPU_ligne_layer(NDS_Screen * screen, u16 l) gpu->currentFadeInColors = &fadeInColors[gpu->BLDY_EVY][0]; gpu->currentFadeOutColors = &fadeOutColors[gpu->BLDY_EVY][0]; - u16 backdrop_color = T1ReadWord(ARM9Mem.ARM9_VMEM, gpu->core * 0x400) & 0x7FFF; + u16 backdrop_color = T1ReadWord(MMU.ARM9_VMEM, gpu->core * 0x400) & 0x7FFF; //we need to write backdrop colors in the same way as we do BG pixels in order to do correct window processing //this is currently eating up 2fps or so. it is a reasonable candidate for optimization. @@ -2151,7 +2149,7 @@ template static void GPU_ligne_DispCapture(u16 l) if (gpu->dispCapCnt.val & 0x80000000) { gpu->dispCapCnt.enabled = TRUE; - T1WriteLong(ARM9Mem.ARM9_REG, 0x64, gpu->dispCapCnt.val); + T1WriteLong(MMU.ARM9_REG, 0x64, gpu->dispCapCnt.val); } } @@ -2173,8 +2171,8 @@ template static void GPU_ligne_DispCapture(u16 l) cap_src_adr += gpu->dispCapCnt.readBlock * 0x20000; cap_dst_adr += gpu->dispCapCnt.writeBlock * 0x20000; - u8* cap_src = ARM9Mem.ARM9_LCD + cap_src_adr; - u8* cap_dst = ARM9Mem.ARM9_LCD + cap_dst_adr; + u8* cap_src = MMU.ARM9_LCD + cap_src_adr; + u8* cap_dst = MMU.ARM9_LCD + cap_dst_adr; //we must block captures when the capture dest is not mapped to LCDC if(vramConfiguration.banks[gpu->dispCapCnt.writeBlock].purpose != VramConfiguration::LCDC) @@ -2182,7 +2180,7 @@ template static void GPU_ligne_DispCapture(u16 l) //we must return zero from reads from memory not mapped to lcdc if(vramConfiguration.banks[gpu->dispCapCnt.readBlock].purpose != VramConfiguration::LCDC) - cap_src = ARM9Mem.blank_memory; + cap_src = MMU.blank_memory; if(!skip) if (l < gpu->dispCapCnt.capy) @@ -2308,7 +2306,7 @@ template static void GPU_ligne_DispCapture(u16 l) { gpu->dispCapCnt.enabled = FALSE; gpu->dispCapCnt.val &= 0x7FFFFFFF; - T1WriteLong(ARM9Mem.ARM9_REG, 0x64, gpu->dispCapCnt.val); + T1WriteLong(MMU.ARM9_REG, 0x64, gpu->dispCapCnt.val); return; } } diff --git a/desmume/src/GPU.h b/desmume/src/GPU.h index bdfdd5a22..028695acb 100644 --- a/desmume/src/GPU.h +++ b/desmume/src/GPU.h @@ -25,7 +25,6 @@ #ifndef GPU_H #define GPU_H -#include "ARM9.h" #include #include "mem.h" #include "common.h" @@ -619,11 +618,11 @@ typedef struct ////<-- 256 + 24 //u8 pad2[256-24]; } itemsForPriority_t; -#define ARM9MEM_ABG 0x06000000 -#define ARM9MEM_BBG 0x06200000 -#define ARM9MEM_AOBJ 0x06400000 -#define ARM9MEM_BOBJ 0x06600000 -#define ARM9MEM_LCDC 0x06800000 +#define MMU_ABG 0x06000000 +#define MMU_BBG 0x06200000 +#define MMU_AOBJ 0x06400000 +#define MMU_BOBJ 0x06600000 +#define MMU_LCDC 0x06800000 extern CACHE_ALIGN u8 gpuBlendTable555[17][17][32][32]; diff --git a/desmume/src/MMU.cpp b/desmume/src/MMU.cpp index 66775f925..3a543363e 100644 --- a/desmume/src/MMU.cpp +++ b/desmume/src/MMU.cpp @@ -165,15 +165,15 @@ MMU_struct_new MMU_new; u8 * MMU_struct::MMU_MEM[2][256] = { //arm9 { - /* 0X*/ DUP16(ARM9Mem.ARM9_ITCM), - /* 1X*/ //DUP16(ARM9Mem.ARM9_ITCM) + /* 0X*/ DUP16(MMU.ARM9_ITCM), + /* 1X*/ //DUP16(MMU.ARM9_ITCM) /* 1X*/ DUP16(MMU.UNUSED_RAM), - /* 2X*/ DUP16(ARM9Mem.MAIN_MEM), + /* 2X*/ DUP16(MMU.MAIN_MEM), /* 3X*/ DUP16(MMU.SWIRAM), - /* 4X*/ DUP16(ARM9Mem.ARM9_REG), - /* 5X*/ DUP16(ARM9Mem.ARM9_VMEM), - /* 6X*/ DUP16(ARM9Mem.ARM9_LCD), - /* 7X*/ DUP16(ARM9Mem.ARM9_OAM), + /* 4X*/ DUP16(MMU.ARM9_REG), + /* 5X*/ DUP16(MMU.ARM9_VMEM), + /* 6X*/ DUP16(MMU.ARM9_LCD), + /* 7X*/ DUP16(MMU.ARM9_OAM), /* 8X*/ DUP16(NULL), /* 9X*/ DUP16(NULL), /* AX*/ DUP16(MMU.CART_RAM), @@ -181,19 +181,19 @@ u8 * MMU_struct::MMU_MEM[2][256] = { /* CX*/ DUP16(MMU.UNUSED_RAM), /* DX*/ DUP16(MMU.UNUSED_RAM), /* EX*/ DUP16(MMU.UNUSED_RAM), - /* FX*/ DUP16(ARM9Mem.ARM9_BIOS) + /* FX*/ DUP16(MMU.ARM9_BIOS) }, //arm7 { /* 0X*/ DUP16(MMU.ARM7_BIOS), /* 1X*/ DUP16(MMU.UNUSED_RAM), - /* 2X*/ DUP16(ARM9Mem.MAIN_MEM), + /* 2X*/ DUP16(MMU.MAIN_MEM), /* 3X*/ DUP8(MMU.SWIRAM), DUP8(MMU.ARM7_ERAM), /* 4X*/ DUP8(MMU.ARM7_REG), DUP8(MMU.ARM7_WIRAM), /* 5X*/ DUP16(MMU.UNUSED_RAM), - /* 6X*/ DUP16(ARM9Mem.ARM9_LCD), + /* 6X*/ DUP16(MMU.ARM9_LCD), /* 7X*/ DUP16(MMU.UNUSED_RAM), /* 8X*/ DUP16(NULL), /* 9X*/ DUP16(NULL), @@ -283,7 +283,7 @@ u8 vram_arm9_map[VRAM_ARM9_PAGES]; u8 vram_arm7_map[2]; //-----> -//consider these later, for better recordkeeping, instead of using the u8* in ARM9Mem +//consider these later, for better recordkeeping, instead of using the u8* in MMU ////for each 128KB texture slot, this maps to a 16KB starting page in the LCDC buffer //#define VRAM_TEX_SLOTS 4 @@ -435,7 +435,7 @@ static inline void MMU_vram_arm9(const int bank, const int offset) static inline u8* MMU_vram_physical(const int page) { - return ARM9Mem.ARM9_LCD + (page*ADDRESS_STEP_16KB); + return MMU.ARM9_LCD + (page*ADDRESS_STEP_16KB); } //todo - templateize @@ -489,7 +489,7 @@ static inline void MMU_VRAMmapRefreshBank(const int bank) break; case 3: //texture vramConfiguration.banks[bank].purpose = VramConfiguration::TEX; - ARM9Mem.texInfo.textureSlotAddr[ofs] = MMU_vram_physical(vram_bank_info[bank].page_addr); + MMU.texInfo.textureSlotAddr[ofs] = MMU_vram_physical(vram_bank_info[bank].page_addr); break; default: goto unsupported_mst; } @@ -527,7 +527,7 @@ static inline void MMU_VRAMmapRefreshBank(const int bank) break; case 3: //texture vramConfiguration.banks[bank].purpose = VramConfiguration::TEX; - ARM9Mem.texInfo.textureSlotAddr[ofs] = MMU_vram_physical(vram_bank_info[bank].page_addr); + MMU.texInfo.textureSlotAddr[ofs] = MMU_vram_physical(vram_bank_info[bank].page_addr); break; case 4: //BGB or BOBJ //MMU_vram_lcdc(bank); @@ -564,17 +564,17 @@ static inline void MMU_VRAMmapRefreshBank(const int bank) break; case 3: //texture palette vramConfiguration.banks[bank].purpose = VramConfiguration::TEXPAL; - ARM9Mem.texInfo.texPalSlot[0] = MMU_vram_physical(vram_bank_info[bank].page_addr); - ARM9Mem.texInfo.texPalSlot[1] = MMU_vram_physical(vram_bank_info[bank].page_addr+1); - ARM9Mem.texInfo.texPalSlot[2] = MMU_vram_physical(vram_bank_info[bank].page_addr+2); - ARM9Mem.texInfo.texPalSlot[3] = MMU_vram_physical(vram_bank_info[bank].page_addr+3); + MMU.texInfo.texPalSlot[0] = MMU_vram_physical(vram_bank_info[bank].page_addr); + MMU.texInfo.texPalSlot[1] = MMU_vram_physical(vram_bank_info[bank].page_addr+1); + MMU.texInfo.texPalSlot[2] = MMU_vram_physical(vram_bank_info[bank].page_addr+2); + MMU.texInfo.texPalSlot[3] = MMU_vram_physical(vram_bank_info[bank].page_addr+3); break; case 4: //A BG extended palette vramConfiguration.banks[bank].purpose = VramConfiguration::ABGEXTPAL; - ARM9Mem.ExtPal[0][0] = MMU_vram_physical(vram_bank_info[bank].page_addr); - ARM9Mem.ExtPal[0][1] = ARM9Mem.ExtPal[0][0] + ADDRESS_STEP_8KB; - ARM9Mem.ExtPal[0][2] = ARM9Mem.ExtPal[0][1] + ADDRESS_STEP_8KB; - ARM9Mem.ExtPal[0][3] = ARM9Mem.ExtPal[0][2] + ADDRESS_STEP_8KB; + MMU.ExtPal[0][0] = MMU_vram_physical(vram_bank_info[bank].page_addr); + MMU.ExtPal[0][1] = MMU.ExtPal[0][0] + ADDRESS_STEP_8KB; + MMU.ExtPal[0][2] = MMU.ExtPal[0][1] + ADDRESS_STEP_8KB; + MMU.ExtPal[0][3] = MMU.ExtPal[0][2] + ADDRESS_STEP_8KB; break; default: goto unsupported_mst; } @@ -607,15 +607,15 @@ static inline void MMU_VRAMmapRefreshBank(const int bank) break; case 3: //texture palette vramConfiguration.banks[bank].purpose = VramConfiguration::TEXPAL; - ARM9Mem.texInfo.texPalSlot[pageofs] = MMU_vram_physical(vram_bank_info[bank].page_addr); + MMU.texInfo.texPalSlot[pageofs] = MMU_vram_physical(vram_bank_info[bank].page_addr); break; case 4: //A BG extended palette switch(ofs) { case 0: case 1: vramConfiguration.banks[bank].purpose = VramConfiguration::ABGEXTPAL; - ARM9Mem.ExtPal[0][ofs*2] = MMU_vram_physical(vram_bank_info[bank].page_addr); - ARM9Mem.ExtPal[0][ofs*2+1] = ARM9Mem.ExtPal[0][ofs*2] + ADDRESS_STEP_8KB; + MMU.ExtPal[0][ofs*2] = MMU_vram_physical(vram_bank_info[bank].page_addr); + MMU.ExtPal[0][ofs*2+1] = MMU.ExtPal[0][ofs*2] + ADDRESS_STEP_8KB; break; default: vramConfiguration.banks[bank].purpose = VramConfiguration::INVALID; @@ -625,8 +625,8 @@ static inline void MMU_VRAMmapRefreshBank(const int bank) break; case 5: //A OBJ extended palette vramConfiguration.banks[bank].purpose = VramConfiguration::AOBJEXTPAL; - ARM9Mem.ObjExtPal[0][0] = MMU_vram_physical(vram_bank_info[bank].page_addr); - ARM9Mem.ObjExtPal[0][1] = ARM9Mem.ObjExtPal[0][1] + ADDRESS_STEP_8KB; + MMU.ObjExtPal[0][0] = MMU_vram_physical(vram_bank_info[bank].page_addr); + MMU.ObjExtPal[0][1] = MMU.ObjExtPal[0][1] + ADDRESS_STEP_8KB; if(ofs != 0) PROGINFO("Bank %i: MST %i OFS %i\n", mst, ofs); break; default: goto unsupported_mst; @@ -651,10 +651,10 @@ static inline void MMU_VRAMmapRefreshBank(const int bank) break; case 2: //B BG extended palette vramConfiguration.banks[bank].purpose = VramConfiguration::BBGEXTPAL; - ARM9Mem.ExtPal[1][0] = MMU_vram_physical(vram_bank_info[bank].page_addr); - ARM9Mem.ExtPal[1][1] = ARM9Mem.ExtPal[1][0] + ADDRESS_STEP_8KB; - ARM9Mem.ExtPal[1][2] = ARM9Mem.ExtPal[1][1] + ADDRESS_STEP_8KB; - ARM9Mem.ExtPal[1][3] = ARM9Mem.ExtPal[1][2] + ADDRESS_STEP_8KB; + MMU.ExtPal[1][0] = MMU_vram_physical(vram_bank_info[bank].page_addr); + MMU.ExtPal[1][1] = MMU.ExtPal[1][0] + ADDRESS_STEP_8KB; + MMU.ExtPal[1][2] = MMU.ExtPal[1][1] + ADDRESS_STEP_8KB; + MMU.ExtPal[1][3] = MMU.ExtPal[1][2] + ADDRESS_STEP_8KB; break; default: goto unsupported_mst; } @@ -682,8 +682,8 @@ static inline void MMU_VRAMmapRefreshBank(const int bank) break; case 3: //B OBJ extended palette vramConfiguration.banks[bank].purpose = VramConfiguration::BOBJEXTPAL; - ARM9Mem.ObjExtPal[1][0] = MMU_vram_physical(vram_bank_info[bank].page_addr); - ARM9Mem.ObjExtPal[1][1] = ARM9Mem.ObjExtPal[1][1] + ADDRESS_STEP_8KB; + MMU.ObjExtPal[1][0] = MMU_vram_physical(vram_bank_info[bank].page_addr); + MMU.ObjExtPal[1][1] = MMU.ObjExtPal[1][1] + ADDRESS_STEP_8KB; break; default: goto unsupported_mst; } @@ -715,20 +715,20 @@ void MMU_VRAM_unmap_all() for (int i = 0; i < 4; i++) { - ARM9Mem.ExtPal[0][i] = ARM9Mem.blank_memory; - ARM9Mem.ExtPal[1][i] = ARM9Mem.blank_memory; + MMU.ExtPal[0][i] = MMU.blank_memory; + MMU.ExtPal[1][i] = MMU.blank_memory; } - ARM9Mem.ObjExtPal[0][0] = ARM9Mem.blank_memory; - ARM9Mem.ObjExtPal[0][1] = ARM9Mem.blank_memory; - ARM9Mem.ObjExtPal[1][0] = ARM9Mem.blank_memory; - ARM9Mem.ObjExtPal[1][1] = ARM9Mem.blank_memory; + MMU.ObjExtPal[0][0] = MMU.blank_memory; + MMU.ObjExtPal[0][1] = MMU.blank_memory; + MMU.ObjExtPal[1][0] = MMU.blank_memory; + MMU.ObjExtPal[1][1] = MMU.blank_memory; for(int i=0;i<6;i++) - ARM9Mem.texInfo.texPalSlot[i] = ARM9Mem.blank_memory; + MMU.texInfo.texPalSlot[i] = MMU.blank_memory; for(int i=0;i<4;i++) - ARM9Mem.texInfo.textureSlotAddr[i] = ARM9Mem.blank_memory; + MMU.texInfo.textureSlotAddr[i] = MMU.blank_memory; } static inline void MMU_VRAMmapControl(u8 block, u8 VRAMBankCnt) @@ -740,7 +740,7 @@ static inline void MMU_VRAMmapControl(u8 block, u8 VRAMBankCnt) } //first, save the texture info so we can check it for changes and trigger purges of the texcache - ARM9_struct::TextureInfo oldTexInfo = ARM9Mem.texInfo; + MMU_struct::TextureInfo oldTexInfo = MMU.texInfo; //unmap everything MMU_VRAM_unmap_all(); @@ -759,7 +759,7 @@ static inline void MMU_VRAMmapControl(u8 block, u8 VRAMBankCnt) //printf(vramConfiguration.describe().c_str()); //if texInfo changed, trigger notifications - if(memcmp(&oldTexInfo,&ARM9Mem.texInfo,sizeof(ARM9_struct::TextureInfo))) + if(memcmp(&oldTexInfo,&MMU.texInfo,sizeof(MMU_struct::TextureInfo))) { //if(!nds.isIn3dVblank()) // PROGINFO("Changing texture or texture palette mappings outside of 3d vblank\n"); @@ -888,15 +888,15 @@ u32 DMADst[2][4] = {{0, 0, 0, 0}, {0, 0, 0, 0}}; void MMU_Reset() { - memset(ARM9Mem.ARM9_DTCM, 0, sizeof(ARM9Mem.ARM9_DTCM)); - memset(ARM9Mem.ARM9_ITCM, 0, sizeof(ARM9Mem.ARM9_ITCM)); - memset(ARM9Mem.ARM9_LCD, 0, sizeof(ARM9Mem.ARM9_LCD)); - memset(ARM9Mem.ARM9_OAM, 0, sizeof(ARM9Mem.ARM9_OAM)); - memset(ARM9Mem.ARM9_REG, 0, sizeof(ARM9Mem.ARM9_REG)); - memset(ARM9Mem.ARM9_VMEM, 0, sizeof(ARM9Mem.ARM9_VMEM)); - memset(ARM9Mem.MAIN_MEM, 0, sizeof(ARM9Mem.MAIN_MEM)); + memset(MMU.ARM9_DTCM, 0, sizeof(MMU.ARM9_DTCM)); + memset(MMU.ARM9_ITCM, 0, sizeof(MMU.ARM9_ITCM)); + memset(MMU.ARM9_LCD, 0, sizeof(MMU.ARM9_LCD)); + memset(MMU.ARM9_OAM, 0, sizeof(MMU.ARM9_OAM)); + memset(MMU.ARM9_REG, 0, sizeof(MMU.ARM9_REG)); + memset(MMU.ARM9_VMEM, 0, sizeof(MMU.ARM9_VMEM)); + memset(MMU.MAIN_MEM, 0, sizeof(MMU.MAIN_MEM)); - memset(ARM9Mem.blank_memory, 0, sizeof(ARM9Mem.blank_memory)); + memset(MMU.blank_memory, 0, sizeof(MMU.blank_memory)); memset(MMU.ARM7_ERAM, 0, sizeof(MMU.ARM7_ERAM)); memset(MMU.ARM7_REG, 0, sizeof(MMU.ARM7_REG)); @@ -1672,7 +1672,7 @@ void FASTCALL _MMU_ARM9_write08(u32 adr, u8 val) if(adr < 0x02000000) { - T1WriteByte(ARM9Mem.ARM9_ITCM, adr&0x7FFF, val); + T1WriteByte(MMU.ARM9_ITCM, adr&0x7FFF, val); return; } @@ -1880,7 +1880,7 @@ void FASTCALL _MMU_ARM9_write16(u32 adr, u16 val) if (adr < 0x02000000) { - T1WriteWord(ARM9Mem.ARM9_ITCM, adr&0x7FFF, val); + T1WriteWord(MMU.ARM9_ITCM, adr&0x7FFF, val); return; } @@ -2358,7 +2358,7 @@ void FASTCALL _MMU_ARM9_write32(u32 adr, u32 val) if(adr<0x02000000) { - T1WriteLong(ARM9Mem.ARM9_ITCM, adr&0x7FFF, val); + T1WriteLong(MMU.ARM9_ITCM, adr&0x7FFF, val); return ; } @@ -2707,29 +2707,29 @@ void FASTCALL _MMU_ARM9_write32(u32 adr, u32 val) case REG_DISPA_DISPCAPCNT : //INFO("MMU write32: REG_DISPA_DISPCAPCNT 0x%X\n", val); GPU_set_DISPCAPCNT(val); - T1WriteLong(ARM9Mem.ARM9_REG, 0x64, val); + T1WriteLong(MMU.ARM9_REG, 0x64, val); return; case REG_DISPA_BG0CNT : GPU_setBGProp(MainScreen.gpu, 0, (val&0xFFFF)); GPU_setBGProp(MainScreen.gpu, 1, (val>>16)); //if((val>>16)==0x400) emu_halt(); - T1WriteLong(ARM9Mem.ARM9_REG, 8, val); + T1WriteLong(MMU.ARM9_REG, 8, val); return; case REG_DISPA_BG2CNT : GPU_setBGProp(MainScreen.gpu, 2, (val&0xFFFF)); GPU_setBGProp(MainScreen.gpu, 3, (val>>16)); - T1WriteLong(ARM9Mem.ARM9_REG, 0xC, val); + T1WriteLong(MMU.ARM9_REG, 0xC, val); return; case REG_DISPB_BG0CNT : GPU_setBGProp(SubScreen.gpu, 0, (val&0xFFFF)); GPU_setBGProp(SubScreen.gpu, 1, (val>>16)); - T1WriteLong(ARM9Mem.ARM9_REG, 0x1008, val); + T1WriteLong(MMU.ARM9_REG, 0x1008, val); return; case REG_DISPB_BG2CNT : GPU_setBGProp(SubScreen.gpu, 2, (val&0xFFFF)); GPU_setBGProp(SubScreen.gpu, 3, (val>>16)); - T1WriteLong(ARM9Mem.ARM9_REG, 0x100C, val); + T1WriteLong(MMU.ARM9_REG, 0x100C, val); return; case REG_DISPA_DISPMMEMFIFO: { @@ -2756,7 +2756,7 @@ u8 FASTCALL _MMU_ARM9_read08(u32 adr) mmu_log_debug_ARM9(adr, "(read08) %0x%X", MMU.MMU_MEM[ARMCPU_ARM9][(adr>>20)&0xFF][adr&MMU.MMU_MASK[ARMCPU_ARM9][(adr>>20)&0xFF]]); if(adr<0x02000000) - return T1ReadByte(ARM9Mem.ARM9_ITCM, adr&0x7FFF); + return T1ReadByte(MMU.ARM9_ITCM, adr&0x7FFF); if ( (adr >= 0x08000000) && (adr < 0x0A010000) ) return addon.read08(adr); @@ -2774,7 +2774,7 @@ u16 FASTCALL _MMU_ARM9_read16(u32 adr) mmu_log_debug_ARM9(adr, "(read16) %0x%X", T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20) & 0xFF])); if(adr<0x02000000) - return T1ReadWord(ARM9Mem.ARM9_ITCM, adr & 0x7FFF); + return T1ReadWord(MMU.ARM9_ITCM, adr & 0x7FFF); if ( (adr >= 0x08000000) && (adr < 0x0A010000) ) return addon.read16(adr); @@ -2844,7 +2844,7 @@ u32 FASTCALL _MMU_ARM9_read32(u32 adr) mmu_log_debug_ARM9(adr, "(read32) %0x%X", T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], adr & MMU.MMU_MASK[ARMCPU_ARM9][(adr >> 20)])); if(adr<0x02000000) - return T1ReadLong(ARM9Mem.ARM9_ITCM, adr&0x7FFF); + return T1ReadLong(MMU.ARM9_ITCM, adr&0x7FFF); if ( (adr >= 0x08000000) && (adr < 0x0A010000) ) return addon.read32(adr); diff --git a/desmume/src/MMU.h b/desmume/src/MMU.h index 6cb1ec1fc..c54b3fd03 100644 --- a/desmume/src/MMU.h +++ b/desmume/src/MMU.h @@ -28,7 +28,6 @@ #include "FIFO.h" #include "mem.h" -#include "ARM9.h" #include "mc.h" #define ARMCPU_ARM7 1 @@ -56,7 +55,36 @@ typedef struct } nds_dscard; -struct MMU_struct { +struct MMU_struct +{ + //ARM9 mem + u8 ARM9_ITCM[0x8000]; + u8 ARM9_DTCM[0x4000]; + u8 MAIN_MEM[0x800000]; //this has been expanded to 8MB to support debug consoles + u8 ARM9_REG[0x1000000]; + u8 ARM9_BIOS[0x8000]; + u8 ARM9_VMEM[0x800]; + + #include "PACKED.h" + struct { + u8 ARM9_LCD[0xA4000]; + //an extra 128KB for blank memory, directly after arm9_lcd, so that + //we can easily map things to the end of arm9_lcd to represent + //an unmapped state + u8 blank_memory[0x20000]; + }; + #include "PACKED_END.h" + + u8 ARM9_OAM[0x800]; + + u8* ExtPal[2][4]; + u8* ObjExtPal[2][2]; + + struct TextureInfo { + u8* texPalSlot[6]; + u8* textureSlotAddr[4]; + } texInfo; + //ARM7 mem u8 ARM7_BIOS[0x4000]; u8 ARM7_ERAM[0x10000]; @@ -260,7 +288,7 @@ FORCEINLINE void* MMU_gpu_map(u32 vram_addr) vram_page = vram_arm9_map[vram_page]; //blank pages are handled by the extra 16KB of blank memory at the end of ARM9_LCD //and the fact that blank pages are mapped to appear at that location - return ARM9Mem.ARM9_LCD + (vram_page<<14) + ofs; + return MMU.ARM9_LCD + (vram_page<<14) + ofs; } @@ -338,11 +366,11 @@ FORCEINLINE u8 _MMU_read08(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u3 if((addr&(~0x3FFF)) == MMU.DTCMRegion) { //Returns data from DTCM (ARM9 only) - return T1ReadByte(ARM9Mem.ARM9_DTCM, addr & 0x3FFF); + return T1ReadByte(MMU.ARM9_DTCM, addr & 0x3FFF); } if ( (addr & 0x0F000000) == 0x02000000) - return T1ReadByte( ARM9Mem.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); + return T1ReadByte( MMU.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); if(PROCNUM==ARMCPU_ARM9) return _MMU_ARM9_read08(addr); else return _MMU_ARM7_read08(addr); @@ -361,10 +389,10 @@ FORCEINLINE u16 _MMU_read16(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u if(PROCNUM==ARMCPU_ARM9 && AT == MMU_AT_CODE) { if ((addr & 0x0F000000) == 0x02000000) - return T1ReadWord_guaranteedAligned( ARM9Mem.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); + return T1ReadWord_guaranteedAligned( MMU.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); if(addr<0x02000000) - return T1ReadWord_guaranteedAligned(ARM9Mem.ARM9_ITCM, addr&0x7FFF); + return T1ReadWord_guaranteedAligned(MMU.ARM9_ITCM, addr&0x7FFF); goto dunno; } @@ -373,11 +401,11 @@ FORCEINLINE u16 _MMU_read16(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u if((addr&(~0x3FFF)) == MMU.DTCMRegion) { //Returns data from DTCM (ARM9 only) - return T1ReadWord(ARM9Mem.ARM9_DTCM, addr & 0x3FFF); + return T1ReadWord(MMU.ARM9_DTCM, addr & 0x3FFF); } if ( (addr & 0x0F000000) == 0x02000000) - return T1ReadWord( ARM9Mem.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); + return T1ReadWord( MMU.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); dunno: if(PROCNUM==ARMCPU_ARM9) return _MMU_ARM9_read16(addr); @@ -397,10 +425,10 @@ FORCEINLINE u32 _MMU_read32(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u if(PROCNUM==ARMCPU_ARM9 && AT == MMU_AT_CODE) { if ( (addr & 0x0F000000) == 0x02000000) - return T1ReadLong_guaranteedAligned( ARM9Mem.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); + return T1ReadLong_guaranteedAligned( MMU.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); if(addr<0x02000000) - return T1ReadLong_guaranteedAligned(ARM9Mem.ARM9_ITCM, addr&0x7FFF); + return T1ReadLong_guaranteedAligned(MMU.ARM9_ITCM, addr&0x7FFF); goto dunno; } @@ -409,7 +437,7 @@ FORCEINLINE u32 _MMU_read32(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u if(PROCNUM==ARMCPU_ARM7) { if ( (addr & 0x0F000000) == 0x02000000) - return T1ReadLong_guaranteedAligned( ARM9Mem.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); + return T1ReadLong_guaranteedAligned( MMU.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); else if((addr & 0xFF800000) == 0x03800000) return T1ReadLong_guaranteedAligned(MMU.ARM7_ERAM, addr&0xFFFF); else if((addr & 0xFF800000) == 0x03000000) @@ -423,11 +451,11 @@ FORCEINLINE u32 _MMU_read32(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u if((addr&(~0x3FFF)) == MMU.DTCMRegion) { //Returns data from DTCM (ARM9 only) - return T1ReadLong(ARM9Mem.ARM9_DTCM, addr & 0x3FFF); + return T1ReadLong(MMU.ARM9_DTCM, addr & 0x3FFF); } if ( (addr & 0x0F000000) == 0x02000000) - return T1ReadLong( ARM9Mem.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); + return T1ReadLong( MMU.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK); } dunno: @@ -447,12 +475,12 @@ FORCEINLINE void _MMU_write08(const int PROCNUM, const MMU_ACCESS_TYPE AT, const if(PROCNUM==ARMCPU_ARM9) if((addr&(~0x3FFF)) == MMU.DTCMRegion) { - T1WriteByte(ARM9Mem.ARM9_DTCM, addr & 0x3FFF, val); + T1WriteByte(MMU.ARM9_DTCM, addr & 0x3FFF, val); return; } if ( (addr & 0x0F000000) == 0x02000000) { - T1WriteByte( ARM9Mem.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK, val); + T1WriteByte( MMU.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK, val); return; } @@ -472,12 +500,12 @@ FORCEINLINE void _MMU_write16(const int PROCNUM, const MMU_ACCESS_TYPE AT, const if(PROCNUM==ARMCPU_ARM9) if((addr&(~0x3FFF)) == MMU.DTCMRegion) { - T1WriteWord(ARM9Mem.ARM9_DTCM, addr & 0x3FFF, val); + T1WriteWord(MMU.ARM9_DTCM, addr & 0x3FFF, val); return; } if ( (addr & 0x0F000000) == 0x02000000) { - T1WriteWord( ARM9Mem.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK, val); + T1WriteWord( MMU.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK, val); return; } @@ -497,12 +525,12 @@ FORCEINLINE void _MMU_write32(const int PROCNUM, const MMU_ACCESS_TYPE AT, const if(PROCNUM==ARMCPU_ARM9) if((addr&(~0x3FFF)) == MMU.DTCMRegion) { - T1WriteLong(ARM9Mem.ARM9_DTCM, addr & 0x3FFF, val); + T1WriteLong(MMU.ARM9_DTCM, addr & 0x3FFF, val); return; } if ( (addr & 0x0F000000) == 0x02000000) { - T1WriteLong( ARM9Mem.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK, val); + T1WriteLong( MMU.MAIN_MEM, addr & _MMU_MAIN_MEM_MASK, val); return; } diff --git a/desmume/src/NDSSystem.cpp b/desmume/src/NDSSystem.cpp index a276d48a8..6b9274f4f 100644 --- a/desmume/src/NDSSystem.cpp +++ b/desmume/src/NDSSystem.cpp @@ -1616,7 +1616,7 @@ template struct TSequenceItem_Timer : public TSequenceItem FORCEINLINE void exec() { u64 timer = nds_timer; - u8* regs = procnum==0?ARM9Mem.ARM9_REG:MMU.ARM7_REG; + u8* regs = procnum==0?MMU.ARM9_REG:MMU.ARM7_REG; bool first = true, over; //we'll need to check chained timers.. for(int i=num;i<4;i++) @@ -1678,7 +1678,7 @@ template struct TSequenceItem_DMA : public TSequenceItem { if (MMU.DMACompleted[procnum][chan]) { - u8* regs = procnum==0?ARM9Mem.ARM9_REG:MMU.ARM7_REG; + u8* regs = procnum==0?MMU.ARM9_REG:MMU.ARM7_REG; T1WriteLong(regs, 0xB8 + (0xC*chan), T1ReadLong(regs, 0xB8 + (0xC*chan)) & 0x7FFFFFFF); if((MMU.DMACrt[procnum][chan])&(1<<30)) { if(procnum==0) NDS_makeARM9Int(8+chan); @@ -1870,7 +1870,7 @@ void Sequencer::init() static void execHardware_hblank() { //turn on hblank status bit - T1WriteWord(ARM9Mem.ARM9_REG, 4, T1ReadWord(ARM9Mem.ARM9_REG, 4) | 2); + T1WriteWord(MMU.ARM9_REG, 4, T1ReadWord(MMU.ARM9_REG, 4) | 2); T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) | 2); //fire hblank interrupts if necessary @@ -1909,14 +1909,14 @@ static void execHardware_hstart_vblankEnd() sequencer.reschedule = true; //turn off vblank status bit - T1WriteWord(ARM9Mem.ARM9_REG, 4, T1ReadWord(ARM9Mem.ARM9_REG, 4) & 0xFFFE); + T1WriteWord(MMU.ARM9_REG, 4, T1ReadWord(MMU.ARM9_REG, 4) & 0xFFFE); T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) & 0xFFFE); } static void execHardware_hstart_vblankStart() { //turn on vblank status bit - T1WriteWord(ARM9Mem.ARM9_REG, 4, T1ReadWord(ARM9Mem.ARM9_REG, 4) | 1); + T1WriteWord(MMU.ARM9_REG, 4, T1ReadWord(MMU.ARM9_REG, 4) | 1); T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) | 1); //fire vblank interrupts if necessary @@ -1939,15 +1939,15 @@ static void execHardware_hstart_vblankStart() void execHardware_hstart_vcount() { - u16 vmatch = T1ReadWord(ARM9Mem.ARM9_REG, 4); + u16 vmatch = T1ReadWord(MMU.ARM9_REG, 4); if(nds.VCount==((vmatch>>8)|((vmatch<<1)&(1<<8)))) { - T1WriteWord(ARM9Mem.ARM9_REG, 4, T1ReadWord(ARM9Mem.ARM9_REG, 4) | 4); - if(T1ReadWord(ARM9Mem.ARM9_REG, 4) & 32) + T1WriteWord(MMU.ARM9_REG, 4, T1ReadWord(MMU.ARM9_REG, 4) | 4); + if(T1ReadWord(MMU.ARM9_REG, 4) & 32) NDS_makeARM9Int(2); } else - T1WriteWord(ARM9Mem.ARM9_REG, 4, T1ReadWord(ARM9Mem.ARM9_REG, 4) & 0xFFFB); + T1WriteWord(MMU.ARM9_REG, 4, T1ReadWord(MMU.ARM9_REG, 4) & 0xFFFB); vmatch = T1ReadWord(MMU.ARM7_REG, 4); if(nds.VCount==((vmatch>>8)|((vmatch<<1)&(1<<8)))) @@ -1973,13 +1973,13 @@ static void execHardware_hstart() } //write the new vcount - T1WriteWord(ARM9Mem.ARM9_REG, 6, nds.VCount); - T1WriteWord(ARM9Mem.ARM9_REG, 0x1006, nds.VCount); + T1WriteWord(MMU.ARM9_REG, 6, nds.VCount); + T1WriteWord(MMU.ARM9_REG, 0x1006, nds.VCount); T1WriteWord(MMU.ARM7_REG, 6, nds.VCount); T1WriteWord(MMU.ARM7_REG, 0x1006, nds.VCount); //turn off hblank status bit - T1WriteWord(ARM9Mem.ARM9_REG, 4, T1ReadWord(ARM9Mem.ARM9_REG, 4) & 0xFFFD); + T1WriteWord(MMU.ARM9_REG, 4, T1ReadWord(MMU.ARM9_REG, 4) & 0xFFFD); T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) & 0xFFFD); //handle vcount status @@ -2338,10 +2338,10 @@ void NDS_Reset() inf = fopen(CommonSettings.ARM9BIOS,"rb"); else inf = NULL; - //memcpy(ARM9Mem.ARM9_BIOS + 0x20, gba_header_data_0x04, 156); + //memcpy(MMU.ARM9_BIOS + 0x20, gba_header_data_0x04, 156); if(inf) { - fread(ARM9Mem.ARM9_BIOS,1,4096,inf); + fread(MMU.ARM9_BIOS,1,4096,inf); fclose(inf); if(CommonSettings.SWIFromBIOS == true) NDS_ARM9.swi_tab = 0; else NDS_ARM9.swi_tab = ARM9_swi_tab; @@ -2645,7 +2645,7 @@ void NDS_setPad(bool R,bool L,bool D,bool U,bool T,bool S,bool B,bool A,bool Y,b ((e) << 1) | ((w) << 2)) ; - ((u16 *)ARM9Mem.ARM9_REG)[0x130>>1] = (u16)pad; + ((u16 *)MMU.ARM9_REG)[0x130>>1] = (u16)pad; ((u16 *)MMU.ARM7_REG)[0x130>>1] = (u16)pad; if (!f && !countLid) diff --git a/desmume/src/NDSSystem.h b/desmume/src/NDSSystem.h index fc361a1fc..123941353 100644 --- a/desmume/src/NDSSystem.h +++ b/desmume/src/NDSSystem.h @@ -339,7 +339,7 @@ extern int lagframecounter; static INLINE void NDS_ARM9HBlankInt(void) { - if(T1ReadWord(ARM9Mem.ARM9_REG, 4) & 0x10) + if(T1ReadWord(MMU.ARM9_REG, 4) & 0x10) { //MMU.reg_IF[0] |= 2;// & (MMU.reg_IME[0] << 1);// (MMU.reg_IE[0] & (1<<1)); setIF(0, 2); @@ -359,7 +359,7 @@ static INLINE void NDS_ARM7HBlankInt(void) static INLINE void NDS_ARM9VBlankInt(void) { - if(T1ReadWord(ARM9Mem.ARM9_REG, 4) & 0x8) + if(T1ReadWord(MMU.ARM9_REG, 4) & 0x8) { // MMU.reg_IF[0] |= 1;// & (MMU.reg_IME[0]);// (MMU.reg_IE[0] & 1); setIF(0, 1); diff --git a/desmume/src/SPU.cpp b/desmume/src/SPU.cpp index 5a744ade2..bbc0b92b4 100644 --- a/desmume/src/SPU.cpp +++ b/desmume/src/SPU.cpp @@ -33,7 +33,6 @@ #endif #include "debug.h" -#include "ARM9.h" #include "MMU.h" #include "SPU.h" #include "mem.h" @@ -1039,6 +1038,7 @@ void SPU_Emulate_user() if (audiosize > 0) { + //printf("mix %i samples\n", audiosize); if (audiosize > SPU_user->bufsize) audiosize = SPU_user->bufsize; SPU_MixAudio(SPU_user,audiosize); diff --git a/desmume/src/rasterize.cpp b/desmume/src/rasterize.cpp index 6928825b7..376a1b3a1 100644 --- a/desmume/src/rasterize.cpp +++ b/desmume/src/rasterize.cpp @@ -1266,12 +1266,12 @@ static void SoftRastRender() if(gfx3d.enableClearImage) { - u16* clearImage = (u16*)ARM9Mem.texInfo.textureSlotAddr[2]; - u16* clearDepth = (u16*)ARM9Mem.texInfo.textureSlotAddr[3]; + u16* clearImage = (u16*)MMU.texInfo.textureSlotAddr[2]; + u16* clearDepth = (u16*)MMU.texInfo.textureSlotAddr[3]; //the lion, the witch, and the wardrobe (thats book 1, suck it you new-school numberers) //uses the scroll registers in the main game engine - u16 scroll = T1ReadWord(ARM9Mem.ARM9_REG,0x356); //CLRIMAGE_OFFSET + u16 scroll = T1ReadWord(MMU.ARM9_REG,0x356); //CLRIMAGE_OFFSET u16 xscroll = scroll&0xFF; u16 yscroll = (scroll>>8)&0xFF; diff --git a/desmume/src/saves.cpp b/desmume/src/saves.cpp index 2b366a44c..3777708c2 100644 --- a/desmume/src/saves.cpp +++ b/desmume/src/saves.cpp @@ -143,23 +143,23 @@ SFORMAT SF_ARM9[]={ }; SFORMAT SF_MEM[]={ - { "ITCM", 1, sizeof(ARM9Mem.ARM9_ITCM), ARM9Mem.ARM9_ITCM}, - { "DTCM", 1, sizeof(ARM9Mem.ARM9_DTCM), ARM9Mem.ARM9_DTCM}, + { "ITCM", 1, sizeof(MMU.ARM9_ITCM), MMU.ARM9_ITCM}, + { "DTCM", 1, sizeof(MMU.ARM9_DTCM), MMU.ARM9_DTCM}, //for legacy purposes, WRAX is a separate variable. shouldnt be a problem. - { "WRAM", 1, 0x400000, ARM9Mem.MAIN_MEM}, - { "WRAX", 1, 0x400000, ARM9Mem.MAIN_MEM+0x400000}, + { "WRAM", 1, 0x400000, MMU.MAIN_MEM}, + { "WRAX", 1, 0x400000, MMU.MAIN_MEM+0x400000}, //NOTE - this is not as large as the allocated memory. //the memory is overlarge due to the way our memory map system is setup //but there are actually no more registers than this - { "9REG", 1, 0x2000, ARM9Mem.ARM9_REG}, + { "9REG", 1, 0x2000, MMU.ARM9_REG}, - { "VMEM", 1, sizeof(ARM9Mem.ARM9_VMEM), ARM9Mem.ARM9_VMEM}, - { "OAMS", 1, sizeof(ARM9Mem.ARM9_OAM), ARM9Mem.ARM9_OAM}, + { "VMEM", 1, sizeof(MMU.ARM9_VMEM), MMU.ARM9_VMEM}, + { "OAMS", 1, sizeof(MMU.ARM9_OAM), MMU.ARM9_OAM}, //this size is specially chosen to avoid saving the blank space at the end - { "LCDM", 1, 0xA4000, ARM9Mem.ARM9_LCD}, + { "LCDM", 1, 0xA4000, MMU.ARM9_LCD}, { 0 } }; diff --git a/desmume/src/texcache.cpp b/desmume/src/texcache.cpp index cb22799cc..18af01ed2 100644 --- a/desmume/src/texcache.cpp +++ b/desmume/src/texcache.cpp @@ -119,9 +119,9 @@ static MemSpan MemSpan_TexMem(u32 ofs, u32 len) len -= curr.len; ofs += curr.len; currofs += curr.len; - u8* ptr = ARM9Mem.texInfo.textureSlotAddr[slot]; + u8* ptr = MMU.texInfo.textureSlotAddr[slot]; - if(ptr == ARM9Mem.blank_memory) { + if(ptr == MMU.blank_memory) { PROGINFO("Tried to reference unmapped texture memory: slot %d\n",slot); } curr.ptr = ptr + curr.start; @@ -150,9 +150,9 @@ static MemSpan MemSpan_TexPalette(u32 ofs, u32 len) //if(len != 0) //here is an actual test case of bank spanning currofs += curr.len; - u8* ptr = ARM9Mem.texInfo.texPalSlot[slot]; + u8* ptr = MMU.texInfo.texPalSlot[slot]; - if(ptr == ARM9Mem.blank_memory) { + if(ptr == MMU.blank_memory) { PROGINFO("Tried to reference unmapped texture palette memory: 16k slot #%d\n",slot); } curr.ptr = ptr + curr.start; @@ -443,7 +443,7 @@ REJECT: //this check isnt necessary since the addressing is tied to the texture data which will also run out: //if(msIndex.numItems != 1) PROGINFO("Your 4x4 texture index has overrun its slot.\n"); -#define PAL4X4(offset) ( *(u16*)( ARM9Mem.texInfo.texPalSlot[((paletteAddress + (offset)*2)>>14)] + ((paletteAddress + (offset)*2)&0x3FFF) ) ) +#define PAL4X4(offset) ( *(u16*)( MMU.texInfo.texPalSlot[((paletteAddress + (offset)*2)>>14)] + ((paletteAddress + (offset)*2)&0x3FFF) ) ) u16* slot1; u32* map = (u32*)ms.items[0].ptr; @@ -451,9 +451,9 @@ REJECT: u32 d = 0; if ( (texcache[tx].frm & 0xc000) == 0x8000) // texel are in slot 2 - slot1=(u16*)&ARM9Mem.texInfo.textureSlotAddr[1][((texcache[tx].frm & 0x3FFF)<<2)+0x010000]; + slot1=(u16*)&MMU.texInfo.textureSlotAddr[1][((texcache[tx].frm & 0x3FFF)<<2)+0x010000]; else - slot1=(u16*)&ARM9Mem.texInfo.textureSlotAddr[1][(texcache[tx].frm & 0x3FFF)<<2]; + slot1=(u16*)&MMU.texInfo.textureSlotAddr[1][(texcache[tx].frm & 0x3FFF)<<2]; u16 yTmpSize = (texcache[tx].sizeY>>2); u16 xTmpSize = (texcache[tx].sizeX>>2); diff --git a/desmume/src/windows/DeSmuME_2008.vcproj b/desmume/src/windows/DeSmuME_2008.vcproj index 56b65f8a0..68a061993 100644 --- a/desmume/src/windows/DeSmuME_2008.vcproj +++ b/desmume/src/windows/DeSmuME_2008.vcproj @@ -883,10 +883,6 @@ RelativePath="..\addons.h" > - - diff --git a/desmume/src/windows/DeSmuME_2010.vcxproj b/desmume/src/windows/DeSmuME_2010.vcxproj index d77c6206d..3b8cfdbc4 100644 --- a/desmume/src/windows/DeSmuME_2010.vcxproj +++ b/desmume/src/windows/DeSmuME_2010.vcxproj @@ -300,7 +300,6 @@ - diff --git a/desmume/src/windows/mapView.cpp b/desmume/src/windows/mapView.cpp index 911cb556a..776dbbbd1 100644 --- a/desmume/src/windows/mapView.cpp +++ b/desmume/src/windows/mapView.cpp @@ -76,8 +76,8 @@ LRESULT MapView_OnPaint(mapview_struct * win, HWND hwnd, WPARAM wParam, LPARAM l HDC hdc; PAINTSTRUCT ps; char text[80]; - u32 dispcnt = ((volatile u32 *)ARM9Mem.ARM9_REG)[(win->lcd*0x400)]; - u32 bgcnt = ((volatile u16 *)ARM9Mem.ARM9_REG)[(8 + (win->map<<1) + (win->lcd*0x1000))>>1]; + u32 dispcnt = ((volatile u32 *)MMU.ARM9_REG)[(win->lcd*0x400)]; + u32 bgcnt = ((volatile u16 *)MMU.ARM9_REG)[(8 + (win->map<<1) + (win->lcd*0x1000))>>1]; BITMAPV4HEADER bmi; u16 lg; u16 ht; diff --git a/desmume/src/windows/oamView.cpp b/desmume/src/windows/oamView.cpp index 6f38b00f3..1d592d35a 100644 --- a/desmume/src/windows/oamView.cpp +++ b/desmume/src/windows/oamView.cpp @@ -224,7 +224,7 @@ BOOL CALLBACK ViewOAMProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam { OAMView = new oamview_struct; memset(OAMView, 0, sizeof(oamview_struct)); - OAMView->oam = (OAM *)(ARM9Mem.ARM9_OAM); + OAMView->oam = (OAM *)(MMU.ARM9_OAM); OAMView->gpu = MainScreen.gpu; OAMView->autoup_secs = 1; @@ -326,12 +326,12 @@ BOOL CALLBACK ViewOAMProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam switch(sel) { case 0 : - OAMView->oam = (OAM *)ARM9Mem.ARM9_OAM; + OAMView->oam = (OAM *)MMU.ARM9_OAM; OAMView->num = 0; OAMView->gpu = MainScreen.gpu; break; case 1 : - OAMView->oam = (OAM *)(ARM9Mem.ARM9_OAM+0x400); + OAMView->oam = (OAM *)(MMU.ARM9_OAM+0x400); OAMView->num = 0; OAMView->gpu = SubScreen.gpu; break; diff --git a/desmume/src/windows/palView.cpp b/desmume/src/windows/palView.cpp index 73db477c0..e9dd6f889 100644 --- a/desmume/src/windows/palView.cpp +++ b/desmume/src/windows/palView.cpp @@ -95,7 +95,7 @@ BOOL CALLBACK ViewPalProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam { PalView = new palview_struct; memset(PalView, 0, sizeof(palview_struct)); - PalView->adr = (u16 *)ARM9Mem.ARM9_VMEM; + PalView->adr = (u16 *)MMU.ARM9_VMEM; PalView->autoup_secs = 1; SendMessage(GetDlgItem(hwnd, IDC_AUTO_UPDATE_SPIN), UDM_SETRANGE, 0, MAKELONG(99, 1)); @@ -216,25 +216,25 @@ BOOL CALLBACK ViewPalProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam switch(sel) { case 0 : - PalView->adr = (u16 *)ARM9Mem.ARM9_VMEM; + PalView->adr = (u16 *)MMU.ARM9_VMEM; PalView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_SCROLLER), SW_HIDE); EnableWindow(GetDlgItem(hwnd, IDC_SCROLLER), FALSE); break; case 1 : - PalView->adr = ((u16 *)ARM9Mem.ARM9_VMEM) + 0x200; + PalView->adr = ((u16 *)MMU.ARM9_VMEM) + 0x200; PalView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_SCROLLER), SW_HIDE); EnableWindow(GetDlgItem(hwnd, IDC_SCROLLER), FALSE); break; case 2 : - PalView->adr = (u16 *)ARM9Mem.ARM9_VMEM + 0x100; + PalView->adr = (u16 *)MMU.ARM9_VMEM + 0x100; PalView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_SCROLLER), SW_HIDE); EnableWindow(GetDlgItem(hwnd, IDC_SCROLLER), FALSE); break; case 3 : - PalView->adr = ((u16 *)ARM9Mem.ARM9_VMEM) + 0x300; + PalView->adr = ((u16 *)MMU.ARM9_VMEM) + 0x300; PalView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_SCROLLER), SW_HIDE); EnableWindow(GetDlgItem(hwnd, IDC_SCROLLER), FALSE); @@ -243,7 +243,7 @@ BOOL CALLBACK ViewPalProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam case 5 : case 6 : case 7 : - PalView->adr = ((u16 *)(ARM9Mem.ExtPal[0][sel-4])); + PalView->adr = ((u16 *)(MMU.ExtPal[0][sel-4])); PalView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_SCROLLER), SW_SHOW); EnableWindow(GetDlgItem(hwnd, IDC_SCROLLER), TRUE); @@ -252,21 +252,21 @@ BOOL CALLBACK ViewPalProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam case 9 : case 10 : case 11 : - PalView->adr = ((u16 *)(ARM9Mem.ExtPal[1][sel-8])); + PalView->adr = ((u16 *)(MMU.ExtPal[1][sel-8])); PalView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_SCROLLER), SW_SHOW); EnableWindow(GetDlgItem(hwnd, IDC_SCROLLER), TRUE); break; case 12 : case 13 : - PalView->adr = ((u16 *)(ARM9Mem.ObjExtPal[0][sel-12])); + PalView->adr = ((u16 *)(MMU.ObjExtPal[0][sel-12])); PalView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_SCROLLER), SW_SHOW); EnableWindow(GetDlgItem(hwnd, IDC_SCROLLER), TRUE); break; case 14 : case 15 : - PalView->adr = ((u16 *)(ARM9Mem.ObjExtPal[1][sel-14])); + PalView->adr = ((u16 *)(MMU.ObjExtPal[1][sel-14])); PalView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_SCROLLER), SW_SHOW); EnableWindow(GetDlgItem(hwnd, IDC_SCROLLER), TRUE); @@ -275,7 +275,7 @@ BOOL CALLBACK ViewPalProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam case 17 : case 18 : case 19 : - PalView->adr = ((u16 *)(ARM9Mem.texInfo.texPalSlot[sel-16])); + PalView->adr = ((u16 *)(MMU.texInfo.texPalSlot[sel-16])); PalView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_SCROLLER), SW_SHOW); EnableWindow(GetDlgItem(hwnd, IDC_SCROLLER), TRUE); diff --git a/desmume/src/windows/ram_search.cpp b/desmume/src/windows/ram_search.cpp index e07d7099e..884aafda6 100644 --- a/desmume/src/windows/ram_search.cpp +++ b/desmume/src/windows/ram_search.cpp @@ -77,7 +77,7 @@ static BOOL s_itemIndicesInvalid = true; // if true, the link from listbox items static BOOL s_prevValuesNeedUpdate = true; // if true, the "prev" values should be updated using the "cur" values on the next frame update signaled static unsigned int s_maxItemIndex = 0; // max currently valid item index, the listbox sometimes tries to update things past the end of the list so we need to know this to ignore those attempts -static const MemoryRegion s_prgRegion = { 0x02000000, 0x400000, (unsigned char*)ARM9Mem.MAIN_MEM, false}; +static const MemoryRegion s_prgRegion = { 0x02000000, 0x400000, (unsigned char*)MMU.MAIN_MEM, false}; /* static const MemoryRegion s_prgRegion = { 0x020000, SEGACD_RAM_PRG_SIZE, (unsigned char*)Ram_Prg, true}; diff --git a/desmume/src/windows/tileView.cpp b/desmume/src/windows/tileView.cpp index b11c5ad5f..d12415463 100644 --- a/desmume/src/windows/tileView.cpp +++ b/desmume/src/windows/tileView.cpp @@ -80,8 +80,8 @@ LRESULT TileViewBox_Direct(HWND hwnd, tileview_struct * win, WPARAM wParam, LPAR FillRect(mem_dc, &rect, (HBRUSH)GetStockObject(WHITE_BRUSH)); u8* mem; - if(win->target >= ARM9MEM_LCDC) - mem = ARM9Mem.ARM9_LCD + win->target - ARM9MEM_LCDC; + if(win->target >= MMU_LCDC) + mem = MMU.ARM9_LCD + win->target - MMU_LCDC; else mem = (u8*)MMU_gpu_map(win->target); if(mem) @@ -141,8 +141,8 @@ LRESULT TileViewBox_Pal256(HWND hwnd, tileview_struct * win, WPARAM wParam, LPAR u32 num2, num, y, x; u8* mem; - if(win->target >= ARM9MEM_LCDC) - mem = ARM9Mem.ARM9_LCD + win->target - ARM9MEM_LCDC; + if(win->target >= MMU_LCDC) + mem = MMU.ARM9_LCD + win->target - MMU_LCDC; else mem = (u8*)MMU_gpu_map(win->target); if(mem) @@ -212,8 +212,8 @@ LRESULT TileViewBox_Pal16(HWND hwnd, tileview_struct * win, WPARAM wParam, LPARA if(win->pal) { u8* mem; - if(win->target >= ARM9MEM_LCDC) - mem = ARM9Mem.ARM9_LCD + win->target - ARM9MEM_LCDC; + if(win->target >= MMU_LCDC) + mem = MMU.ARM9_LCD + win->target - MMU_LCDC; else mem = (u8*)MMU_gpu_map(win->target); @@ -347,8 +347,8 @@ BOOL CALLBACK ViewTilesProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lPar TileView = new tileview_struct; memset(TileView, 0, sizeof(tileview_struct)); TileView->hwnd = hwnd; - TileView->target = ARM9MEM_ABG; - TileView->pal = ((u16 *)ARM9Mem.ARM9_VMEM); + TileView->target = MMU_ABG; + TileView->pal = ((u16 *)MMU.ARM9_VMEM); TileView->autoup_secs = 1; SendMessage(GetDlgItem(hwnd, IDC_AUTO_UPDATE_SPIN), UDM_SETRANGE, 0, MAKELONG(99, 1)); @@ -514,21 +514,21 @@ BOOL CALLBACK ViewTilesProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lPar case 5 : case 6 : case 7 : - TileView->target = ARM9MEM_ABG + 0x10000*sel; + TileView->target = MMU_ABG + 0x10000*sel; break; case 8 : case 9 : - TileView->target = ARM9MEM_BBG + 0x10000*(sel-8); + TileView->target = MMU_BBG + 0x10000*(sel-8); break; case 10 : case 11 : case 12 : case 13 : - TileView->target = ARM9MEM_AOBJ + 0x10000*(sel-10); + TileView->target = MMU_AOBJ + 0x10000*(sel-10); break; case 14 : case 15 : - TileView->target = ARM9MEM_BOBJ + 0x10000*(sel-14); + TileView->target = MMU_BOBJ + 0x10000*(sel-14); break; case 16 : case 17 : @@ -540,7 +540,7 @@ BOOL CALLBACK ViewTilesProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lPar case 23 : case 24 : case 25 : - TileView->target = ARM9MEM_LCDC + 0x10000*(sel-16); + TileView->target = MMU_LCDC + 0x10000*(sel-16); break; default : return 1; @@ -560,25 +560,25 @@ BOOL CALLBACK ViewTilesProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lPar switch(sel) { case 0 : - TileView->pal = (u16 *)ARM9Mem.ARM9_VMEM; + TileView->pal = (u16 *)MMU.ARM9_VMEM; TileView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_16COUL), SW_SHOW); EnableWindow(GetDlgItem(hwnd, IDC_16COUL), TRUE); break; case 1 : - TileView->pal = ((u16 *)ARM9Mem.ARM9_VMEM) + 0x200; + TileView->pal = ((u16 *)MMU.ARM9_VMEM) + 0x200; TileView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_16COUL), SW_SHOW); EnableWindow(GetDlgItem(hwnd, IDC_16COUL), TRUE); break; case 2 : - TileView->pal = (u16 *)ARM9Mem.ARM9_VMEM + 0x100; + TileView->pal = (u16 *)MMU.ARM9_VMEM + 0x100; TileView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_16COUL), SW_SHOW); EnableWindow(GetDlgItem(hwnd, IDC_16COUL), TRUE); break; case 3 : - TileView->pal = ((u16 *)ARM9Mem.ARM9_VMEM) + 0x300; + TileView->pal = ((u16 *)MMU.ARM9_VMEM) + 0x300; TileView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_16COUL), SW_SHOW); EnableWindow(GetDlgItem(hwnd, IDC_16COUL), TRUE); @@ -587,7 +587,7 @@ BOOL CALLBACK ViewTilesProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lPar case 5 : case 6 : case 7 : - TileView->pal = ((u16 *)(ARM9Mem.ExtPal[0][sel-4])); + TileView->pal = ((u16 *)(MMU.ExtPal[0][sel-4])); TileView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_16COUL), SW_HIDE); EnableWindow(GetDlgItem(hwnd, IDC_16COUL), FALSE); @@ -602,7 +602,7 @@ BOOL CALLBACK ViewTilesProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lPar case 9 : case 10 : case 11 : - TileView->pal = ((u16 *)(ARM9Mem.ExtPal[1][sel-8])); + TileView->pal = ((u16 *)(MMU.ExtPal[1][sel-8])); TileView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_16COUL), SW_HIDE); EnableWindow(GetDlgItem(hwnd, IDC_16COUL), FALSE); @@ -615,7 +615,7 @@ BOOL CALLBACK ViewTilesProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lPar break; case 12 : case 13 : - TileView->pal = ((u16 *)(ARM9Mem.ObjExtPal[0][sel-12])); + TileView->pal = ((u16 *)(MMU.ObjExtPal[0][sel-12])); TileView->palnum = 0; if(TileView->coul == 2) { @@ -626,7 +626,7 @@ BOOL CALLBACK ViewTilesProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lPar break; case 14 : case 15 : - TileView->pal = ((u16 *)(ARM9Mem.ObjExtPal[1][sel-14])); + TileView->pal = ((u16 *)(MMU.ObjExtPal[1][sel-14])); TileView->palnum = 0; if(TileView->coul == 2) { @@ -639,7 +639,7 @@ BOOL CALLBACK ViewTilesProc (HWND hwnd, UINT message, WPARAM wParam, LPARAM lPar case 17 : case 18 : case 19 : - TileView->pal = ((u16 *)(ARM9Mem.texInfo.texPalSlot[sel-16])); + TileView->pal = ((u16 *)(MMU.texInfo.texPalSlot[sel-16])); TileView->palnum = 0; ShowWindow(GetDlgItem(hwnd, IDC_16COUL), SW_SHOW); EnableWindow(GetDlgItem(hwnd, IDC_16COUL), TRUE);