mirror of https://github.com/bsnes-emu/bsnes.git
173 lines
3.4 KiB
C++
173 lines
3.4 KiB
C++
//00 addb mem,reg
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//01 addw mem,reg
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auto V30MZ::opAddMemReg(Size size) {
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modRM();
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setMem(size, alAdd(size, getMem(size), getReg(size)));
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}
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//02 addb reg,mem
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//03 addw reg,mem
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auto V30MZ::opAddRegMem(Size size) {
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modRM();
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setReg(size, alAdd(size, getReg(size), getMem(size)));
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}
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//04 add al,#imm
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//05 add ax,#imm
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auto V30MZ::opAddAccImm(Size size) {
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setAcc(size, alAdd(size, getAcc(size), fetch(size)));
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}
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//08 orb mem,reg
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//09 orb mem,reg
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auto V30MZ::opOrMemReg(Size size) {
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modRM();
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setMem(size, alOr(size, getMem(size), getReg(size)));
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}
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//0a orb reg,mem
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//0b orb reg,mem
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auto V30MZ::opOrRegMem(Size size) {
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modRM();
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setReg(size, alOr(size, getReg(size), getMem(size)));
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}
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//0c or al,#imm
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//0d or ax,#imm
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auto V30MZ::opOrAccImm(Size size) {
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setAcc(size, alOr(size, getAcc(size), fetch(size)));
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}
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auto V30MZ::opAdcMemReg(Size size) {
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modRM();
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setMem(size, alAdc(size, getMem(size), getReg(size)));
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}
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auto V30MZ::opAdcRegMem(Size size) {
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modRM();
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setReg(size, alAdc(size, getReg(size), getMem(size)));
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}
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auto V30MZ::opAdcAccImm(Size size) {
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setAcc(size, alAdc(size, getAcc(size), fetch(size)));
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}
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auto V30MZ::opSbbMemReg(Size size) {
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modRM();
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setMem(size, alSbb(size, getMem(size), getReg(size)));
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}
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auto V30MZ::opSbbRegMem(Size size) {
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modRM();
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setReg(size, alSbb(size, getReg(size), getMem(size)));
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}
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auto V30MZ::opSbbAccImm(Size size) {
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setAcc(size, alSbb(size, getAcc(size), fetch(size)));
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}
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auto V30MZ::opAndMemReg(Size size) {
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modRM();
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setMem(size, alAnd(size, getMem(size), getReg(size)));
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}
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auto V30MZ::opAndRegMem(Size size) {
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modRM();
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setReg(size, alAnd(size, getReg(size), getMem(size)));
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}
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auto V30MZ::opAndAccImm(Size size) {
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setAcc(size, alAnd(size, getAcc(size), fetch(size)));
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}
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auto V30MZ::opSubMemReg(Size size) {
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modRM();
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setMem(size, alSub(size, getMem(size), getReg(size)));
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}
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auto V30MZ::opSubRegMem(Size size) {
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modRM();
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setReg(size, alSub(size, getReg(size), getMem(size)));
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}
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auto V30MZ::opSubAccImm(Size size) {
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setAcc(size, alSub(size, getAcc(size), fetch(size)));
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}
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auto V30MZ::opXorMemReg(Size size) {
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modRM();
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setMem(size, alXor(size, getMem(size), getReg(size)));
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}
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auto V30MZ::opXorRegMem(Size size) {
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modRM();
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setReg(size, alXor(size, getReg(size), getMem(size)));
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}
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auto V30MZ::opXorAccImm(Size size) {
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setAcc(size, alXor(size, getAcc(size), fetch(size)));
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}
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auto V30MZ::opCmpMemReg(Size size) {
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modRM();
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alSub(size, getMem(size), getReg(size));
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}
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auto V30MZ::opCmpRegMem(Size size) {
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modRM();
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alSub(size, getReg(size), getMem(size));
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}
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auto V30MZ::opCmpAccImm(Size size) {
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alSub(size, getAcc(size), fetch(size));
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}
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auto V30MZ::opTestAcc(Size size) {
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alAnd(size, getAcc(size), fetch(size));
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}
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auto V30MZ::opTestMemReg(Size size) {
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modRM();
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alAnd(size, getMem(size), getReg(size));
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}
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auto V30MZ::opMultiplySignedRegMemImm(Size size) {
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wait(2);
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modRM();
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setReg(size, alMuli(size, getMem(size), size == Word ? (int16_t)fetch(Word) : (int8_t)fetch(Byte)));
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}
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//40 inc ax
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//41 inc cx
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//42 inc dx
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//43 inc bx
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//44 inc sp
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//45 inc bp
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//46 inc si
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//47 inc di
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auto V30MZ::opIncReg(uint16_t& reg) {
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reg++;
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}
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//48 dec ax
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//49 dec cx
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//4a dec dx
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//4b dec bx
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//4c dec sp
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//4d dec bp
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//4e dec si
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//4f dec di
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auto V30MZ::opDecReg(uint16_t& reg) {
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reg--;
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}
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//98 cbw
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auto V30MZ::opSignExtendByte() {
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setAcc(Word, (int8)getAcc(Byte));
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}
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//99 cwd
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auto V30MZ::opSignExtendWord() {
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setAcc(Long, (int16)getAcc(Word));
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}
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