mirror of https://github.com/bsnes-emu/bsnes.git
64 lines
2.1 KiB
C++
64 lines
2.1 KiB
C++
auto WDC65816::interrupt() -> void {
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read(PC);
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idle();
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N push(db(PC));
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push(hi(PC));
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push(lo(PC));
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push(EF ? P & ~0x10 : P);
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IF = 1;
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DF = 0;
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lo(PC) = read(r.vector + 0);
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hi(PC) = read(r.vector + 1);
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db(PC) = 0x00;
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}
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//both the accumulator and index registers can independently be in either 8-bit or 16-bit mode.
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//controlled via the M/X flags, this changes the execution details of various instructions.
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//rather than implement four instruction tables for all possible combinations of these bits,
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//instead use macro abuse to generate all four tables based off of a single template table.
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auto WDC65816::instruction() -> void {
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//a = instructions unaffected by M/X flags
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//m = instructions affected by M flag (1 = 8-bit; 0 = 16-bit)
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//x = instructions affected by X flag (1 = 8-bit; 0 = 16-bit)
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#define opA(id, name, ...) case id: return instruction##name(__VA_ARGS__);
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if(MF) {
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#define opM(id, name, ...) case id: return instruction##name##8(__VA_ARGS__);
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#define m(name) &WDC65816::algorithm##name##8
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if(XF) {
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#define opX(id, name, ...) case id: return instruction##name##8(__VA_ARGS__);
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#define x(name) &WDC65816::algorithm##name##8
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#include "instruction.hpp"
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#undef opX
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#undef x
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} else {
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#define opX(id, name, ...) case id: return instruction##name##16(__VA_ARGS__);
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#define x(name) &WDC65816::algorithm##name##16
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#include "instruction.hpp"
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#undef opX
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#undef x
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}
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#undef opM
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#undef m
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} else {
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#define opM(id, name, ...) case id: return instruction##name##16(__VA_ARGS__);
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#define m(name) &WDC65816::algorithm##name##16
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if(XF) {
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#define opX(id, name, ...) case id: return instruction##name##8(__VA_ARGS__);
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#define x(name) &WDC65816::algorithm##name##8
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#include "instruction.hpp"
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#undef opX
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#undef x
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} else {
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#define opX(id, name, ...) case id: return instruction##name##16(__VA_ARGS__);
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#define x(name) &WDC65816::algorithm##name##16
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#include "instruction.hpp"
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#undef opX
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#undef x
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}
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#undef opM
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#undef m
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}
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#undef opA
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}
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