mirror of https://github.com/bsnes-emu/bsnes.git
722 lines
18 KiB
C++
722 lines
18 KiB
C++
auto PPU::read(uint24 addr, uint8 data) -> uint8 {
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cpu.synchronizePPU();
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switch(addr & 0xffff) {
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case 0x2104: case 0x2105: case 0x2106: case 0x2108:
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case 0x2109: case 0x210a: case 0x2114: case 0x2115:
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case 0x2116: case 0x2118: case 0x2119: case 0x211a:
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case 0x2124: case 0x2125: case 0x2126: case 0x2128:
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case 0x2129: case 0x212a: {
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return regs.ppu1_mdr;
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}
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//MPYL
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case 0x2134: {
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unsigned result = ((int16)regs.m7a * (int8)(regs.m7b >> 8));
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regs.ppu1_mdr = (result >> 0);
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return regs.ppu1_mdr;
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}
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//MPYM
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case 0x2135: {
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unsigned result = ((int16)regs.m7a * (int8)(regs.m7b >> 8));
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regs.ppu1_mdr = (result >> 8);
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return regs.ppu1_mdr;
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}
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//MPYH
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case 0x2136: {
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unsigned result = ((int16)regs.m7a * (int8)(regs.m7b >> 8));
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regs.ppu1_mdr = (result >> 16);
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return regs.ppu1_mdr;
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}
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//SLHV
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case 0x2137: {
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if(cpu.pio() & 0x80) latchCounters();
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return cpu.regs.mdr;
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}
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//OAMDATAREAD
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case 0x2138: {
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uint10 addr = regs.oam_addr++;
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if(!regs.display_disable && vcounter() < vdisp()) addr = regs.oam_iaddr;
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if(addr & 0x0200) addr &= 0x021f;
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regs.ppu1_mdr = oamRead(addr);
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sprite.set_first_sprite();
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return regs.ppu1_mdr;
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}
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//VMDATALREAD
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case 0x2139: {
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uint16 addr = getVramAddress() + 0;
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regs.ppu1_mdr = regs.vram_readbuffer >> 0;
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if(regs.vram_incmode == 0) {
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addr &= ~1;
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regs.vram_readbuffer = vramRead(addr + 0) << 0;
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regs.vram_readbuffer |= vramRead(addr + 1) << 8;
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regs.vram_addr += regs.vram_incsize;
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}
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return regs.ppu1_mdr;
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}
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//VMDATAHREAD
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case 0x213a: {
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uint16 addr = getVramAddress() + 1;
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regs.ppu1_mdr = regs.vram_readbuffer >> 8;
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if(regs.vram_incmode == 1) {
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addr &= ~1;
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regs.vram_readbuffer = vramRead(addr + 0) << 0;
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regs.vram_readbuffer |= vramRead(addr + 1) << 8;
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regs.vram_addr += regs.vram_incsize;
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}
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return regs.ppu1_mdr;
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}
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//CGDATAREAD
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case 0x213b: {
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bool latch = regs.cgram_addr & 1;
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uint9 addr = regs.cgram_addr++;
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if(!regs.display_disable
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&& vcounter() > 0 && vcounter() < vdisp()
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&& hcounter() >= 88 && hcounter() < 1096
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) addr = regs.cgram_iaddr;
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if(latch == 0) {
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regs.ppu2_mdr = cgramRead(addr);
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} else {
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regs.ppu2_mdr &= 0x80;
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regs.ppu2_mdr |= cgramRead(addr);
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}
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return regs.ppu2_mdr;
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}
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//OPHCT
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case 0x213c: {
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if(regs.latch_hcounter == 0) {
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regs.ppu2_mdr = (regs.hcounter >> 0);
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} else {
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regs.ppu2_mdr &= 0xfe;
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regs.ppu2_mdr |= (regs.hcounter >> 8) & 1;
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}
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regs.latch_hcounter ^= 1;
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return regs.ppu2_mdr;
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}
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//OPVCT
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case 0x213d: {
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if(regs.latch_vcounter == 0) {
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regs.ppu2_mdr = (regs.vcounter >> 0);
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} else {
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regs.ppu2_mdr &= 0xfe;
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regs.ppu2_mdr |= (regs.vcounter >> 8) & 1;
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}
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regs.latch_vcounter ^= 1;
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return regs.ppu2_mdr;
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}
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//STAT77
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case 0x213e: {
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regs.ppu1_mdr &= 0x10;
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regs.ppu1_mdr |= sprite.regs.time_over << 7;
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regs.ppu1_mdr |= sprite.regs.range_over << 6;
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regs.ppu1_mdr |= ppu1_version & 0x0f;
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return regs.ppu1_mdr;
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}
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//STAT78
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case 0x213f: {
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regs.latch_hcounter = 0;
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regs.latch_vcounter = 0;
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regs.ppu2_mdr &= 0x20;
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regs.ppu2_mdr |= field() << 7;
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if((cpu.pio() & 0x80) == 0) {
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regs.ppu2_mdr |= 0x40;
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} else if(regs.counters_latched) {
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regs.ppu2_mdr |= 0x40;
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regs.counters_latched = false;
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}
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regs.ppu2_mdr |= (system.region() == System::Region::NTSC ? 0 : 1) << 4;
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regs.ppu2_mdr |= ppu2_version & 0x0f;
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return regs.ppu2_mdr;
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}
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}
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return data;
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}
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auto PPU::write(uint24 addr, uint8 data) -> void {
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cpu.synchronizePPU();
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switch(addr & 0xffff) {
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//INIDISP
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case 0x2100: {
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if(regs.display_disable && vcounter() == vdisp()) sprite.address_reset();
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regs.display_disable = data & 0x80;
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regs.display_brightness = data & 0x0f;
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return;
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}
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//OBSEL
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case 0x2101: {
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sprite.regs.base_size = (data >> 5) & 7;
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sprite.regs.nameselect = (data >> 3) & 3;
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sprite.regs.tiledata_addr = (data & 3) << 14;
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return;
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}
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//OAMADDL
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case 0x2102: {
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regs.oam_baseaddr = (regs.oam_baseaddr & 0x0200) | (data << 1);
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sprite.address_reset();
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return;
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}
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//OAMADDH
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case 0x2103: {
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regs.oam_priority = data & 0x80;
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regs.oam_baseaddr = ((data & 0x01) << 9) | (regs.oam_baseaddr & 0x01fe);
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sprite.address_reset();
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return;
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}
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//OAMDATA
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case 0x2104: {
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bool latch = regs.oam_addr & 1;
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uint10 addr = regs.oam_addr++;
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if(!regs.display_disable && vcounter() < vdisp()) addr = regs.oam_iaddr;
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if(addr & 0x0200) addr &= 0x021f;
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if(latch == 0) regs.oam_latchdata = data;
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if(addr & 0x0200) {
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oamWrite(addr, data);
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} else if(latch == 1) {
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oamWrite((addr & ~1) + 0, regs.oam_latchdata);
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oamWrite((addr & ~1) + 1, data);
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}
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sprite.set_first_sprite();
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return;
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}
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//BGMODE
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case 0x2105: {
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bg4.regs.tile_size = (data & 0x80);
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bg3.regs.tile_size = (data & 0x40);
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bg2.regs.tile_size = (data & 0x20);
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bg1.regs.tile_size = (data & 0x10);
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regs.bg3_priority = (data & 0x08);
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regs.bgmode = (data & 0x07);
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updateVideoMode();
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return;
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}
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//MOSAIC
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case 0x2106: {
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unsigned mosaic_size = (data >> 4) & 15;
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bg4.regs.mosaic = (data & 0x08 ? mosaic_size : 0);
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bg3.regs.mosaic = (data & 0x04 ? mosaic_size : 0);
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bg2.regs.mosaic = (data & 0x02 ? mosaic_size : 0);
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bg1.regs.mosaic = (data & 0x01 ? mosaic_size : 0);
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return;
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}
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//BG1SC
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case 0x2107: {
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bg1.regs.screen_addr = (data & 0x7c) << 9;
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bg1.regs.screen_size = data & 3;
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return;
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}
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//BG2SC
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case 0x2108: {
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bg2.regs.screen_addr = (data & 0x7c) << 9;
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bg2.regs.screen_size = data & 3;
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return;
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}
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//BG3SC
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case 0x2109: {
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bg3.regs.screen_addr = (data & 0x7c) << 9;
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bg3.regs.screen_size = data & 3;
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return;
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}
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//BG4SC
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case 0x210a: {
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bg4.regs.screen_addr = (data & 0x7c) << 9;
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bg4.regs.screen_size = data & 3;
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return;
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}
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//BG12NBA
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case 0x210b: {
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bg1.regs.tiledata_addr = (data & 0x07) << 13;
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bg2.regs.tiledata_addr = (data & 0x70) << 9;
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return;
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}
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//BG34NBA
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case 0x210c: {
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bg3.regs.tiledata_addr = (data & 0x07) << 13;
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bg4.regs.tiledata_addr = (data & 0x70) << 9;
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return;
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}
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//BG1HOFS
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case 0x210d: {
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regs.mode7_hoffset = (data << 8) | regs.mode7_latchdata;
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regs.mode7_latchdata = data;
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bg1.regs.hoffset = (data << 8) | (regs.bgofs_latchdata & ~7) | ((bg1.regs.hoffset >> 8) & 7);
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regs.bgofs_latchdata = data;
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return;
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}
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//BG1VOFS
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case 0x210e: {
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regs.mode7_voffset = (data << 8) | regs.mode7_latchdata;
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regs.mode7_latchdata = data;
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bg1.regs.voffset = (data << 8) | regs.bgofs_latchdata;
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regs.bgofs_latchdata = data;
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return;
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}
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//BG2HOFS
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case 0x210f: {
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bg2.regs.hoffset = (data << 8) | (regs.bgofs_latchdata & ~7) | ((bg2.regs.hoffset >> 8) & 7);
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regs.bgofs_latchdata = data;
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return;
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}
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//BG2VOFS
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case 0x2110: {
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bg2.regs.voffset = (data << 8) | regs.bgofs_latchdata;
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regs.bgofs_latchdata = data;
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return;
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}
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//BG3HOFS
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case 0x2111: {
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bg3.regs.hoffset = (data << 8) | (regs.bgofs_latchdata & ~7) | ((bg3.regs.hoffset >> 8) & 7);
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regs.bgofs_latchdata = data;
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return;
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}
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//BG3VOFS
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case 0x2112: {
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bg3.regs.voffset = (data << 8) | regs.bgofs_latchdata;
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regs.bgofs_latchdata = data;
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return;
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}
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//BG4HOFS
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case 0x2113: {
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bg4.regs.hoffset = (data << 8) | (regs.bgofs_latchdata & ~7) | ((bg4.regs.hoffset >> 8) & 7);
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regs.bgofs_latchdata = data;
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return;
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}
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//BG4VOFS
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case 0x2114: {
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bg4.regs.voffset = (data << 8) | regs.bgofs_latchdata;
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regs.bgofs_latchdata = data;
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return;
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}
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//VMAIN
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case 0x2115: {
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regs.vram_incmode = data & 0x80;
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regs.vram_mapping = (data >> 2) & 3;
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switch(data & 3) {
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case 0: regs.vram_incsize = 1; break;
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case 1: regs.vram_incsize = 32; break;
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case 2: regs.vram_incsize = 128; break;
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case 3: regs.vram_incsize = 128; break;
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}
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return;
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}
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//VMADDL
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case 0x2116: {
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regs.vram_addr &= 0xff00;
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regs.vram_addr |= (data << 0);
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uint16 addr = getVramAddress();
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regs.vram_readbuffer = vramRead(addr + 0) << 0;
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regs.vram_readbuffer |= vramRead(addr + 1) << 8;
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return;
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}
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//VMADDH
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case 0x2117: {
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regs.vram_addr &= 0x00ff;
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regs.vram_addr |= (data << 8);
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uint16 addr = getVramAddress();
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regs.vram_readbuffer = vramRead(addr + 0) << 0;
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regs.vram_readbuffer |= vramRead(addr + 1) << 8;
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return;
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}
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//VMDATAL
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case 0x2118: {
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uint16 addr = getVramAddress() + 0;
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vramWrite(addr, data);
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if(regs.vram_incmode == 0) regs.vram_addr += regs.vram_incsize;
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return;
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}
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//VMDATAH
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case 0x2119: {
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uint16 addr = getVramAddress() + 1;
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vramWrite(addr, data);
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if(regs.vram_incmode == 1) regs.vram_addr += regs.vram_incsize;
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return;
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}
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//M7SEL
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case 0x211a: {
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regs.mode7_repeat = (data >> 6) & 3;
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regs.mode7_vflip = data & 0x02;
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regs.mode7_hflip = data & 0x01;
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return;
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}
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//M7A
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case 0x211b: {
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regs.m7a = (data << 8) | regs.mode7_latchdata;
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regs.mode7_latchdata = data;
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return;
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}
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//M7B
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case 0x211c: {
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regs.m7b = (data << 8) | regs.mode7_latchdata;
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regs.mode7_latchdata = data;
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return;
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}
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//M7C
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case 0x211d: {
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regs.m7c = (data << 8) | regs.mode7_latchdata;
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regs.mode7_latchdata = data;
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return;
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}
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//M7D
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case 0x211e: {
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regs.m7d = (data << 8) | regs.mode7_latchdata;
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regs.mode7_latchdata = data;
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return;
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}
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//M7X
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case 0x211f: {
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regs.m7x = (data << 8) | regs.mode7_latchdata;
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regs.mode7_latchdata = data;
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return;
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}
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//M7Y
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case 0x2120: {
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regs.m7y = (data << 8) | regs.mode7_latchdata;
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regs.mode7_latchdata = data;
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return;
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}
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//CGADD
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case 0x2121: {
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regs.cgram_addr = data << 1;
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return;
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}
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//CGDATA
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case 0x2122: {
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bool latch = regs.cgram_addr & 1;
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uint9 addr = regs.cgram_addr++;
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if(!regs.display_disable
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&& vcounter() > 0 && vcounter() < vdisp()
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&& hcounter() >= 88 && hcounter() < 1096
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) addr = regs.cgram_iaddr;
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if(latch == 0) {
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regs.cgram_latchdata = data;
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} else {
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cgramWrite((addr & ~1) + 0, regs.cgram_latchdata);
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cgramWrite((addr & ~1) + 1, data & 0x7f);
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}
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return;
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}
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//W12SEL
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case 0x2123: {
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window.regs.bg2_two_enable = data & 0x80;
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window.regs.bg2_two_invert = data & 0x40;
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window.regs.bg2_one_enable = data & 0x20;
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window.regs.bg2_one_invert = data & 0x10;
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window.regs.bg1_two_enable = data & 0x08;
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window.regs.bg1_two_invert = data & 0x04;
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window.regs.bg1_one_enable = data & 0x02;
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window.regs.bg1_one_invert = data & 0x01;
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return;
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}
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//W34SEL
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case 0x2124: {
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window.regs.bg4_two_enable = data & 0x80;
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window.regs.bg4_two_invert = data & 0x40;
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window.regs.bg4_one_enable = data & 0x20;
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window.regs.bg4_one_invert = data & 0x10;
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window.regs.bg3_two_enable = data & 0x08;
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window.regs.bg3_two_invert = data & 0x04;
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window.regs.bg3_one_enable = data & 0x02;
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window.regs.bg3_one_invert = data & 0x01;
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return;
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}
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//WOBJSEL
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case 0x2125: {
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window.regs.col_two_enable = data & 0x80;
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window.regs.col_two_invert = data & 0x40;
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window.regs.col_one_enable = data & 0x20;
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window.regs.col_one_invert = data & 0x10;
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window.regs.oam_two_enable = data & 0x08;
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window.regs.oam_two_invert = data & 0x04;
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window.regs.oam_one_enable = data & 0x02;
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window.regs.oam_one_invert = data & 0x01;
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return;
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}
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//WH0
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case 0x2126: {
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window.regs.one_left = data;
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return;
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}
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|
//WH1
|
|
case 0x2127: {
|
|
window.regs.one_right = data;
|
|
return;
|
|
}
|
|
|
|
//WH2
|
|
case 0x2128: {
|
|
window.regs.two_left = data;
|
|
return;
|
|
}
|
|
|
|
//WH3
|
|
case 0x2129: {
|
|
window.regs.two_right = data;
|
|
return;
|
|
}
|
|
|
|
//WBGLOG
|
|
case 0x212a: {
|
|
window.regs.bg4_mask = (data >> 6) & 3;
|
|
window.regs.bg3_mask = (data >> 4) & 3;
|
|
window.regs.bg2_mask = (data >> 2) & 3;
|
|
window.regs.bg1_mask = (data >> 0) & 3;
|
|
return;
|
|
}
|
|
|
|
//WOBJLOG
|
|
case 0x212b: {
|
|
window.regs.col_mask = (data >> 2) & 3;
|
|
window.regs.oam_mask = (data >> 0) & 3;
|
|
return;
|
|
}
|
|
|
|
//TM
|
|
case 0x212c: {
|
|
sprite.regs.main_enable = data & 0x10;
|
|
bg4.regs.main_enable = data & 0x08;
|
|
bg3.regs.main_enable = data & 0x04;
|
|
bg2.regs.main_enable = data & 0x02;
|
|
bg1.regs.main_enable = data & 0x01;
|
|
return;
|
|
}
|
|
|
|
//TS
|
|
case 0x212d: {
|
|
sprite.regs.sub_enable = data & 0x10;
|
|
bg4.regs.sub_enable = data & 0x08;
|
|
bg3.regs.sub_enable = data & 0x04;
|
|
bg2.regs.sub_enable = data & 0x02;
|
|
bg1.regs.sub_enable = data & 0x01;
|
|
return;
|
|
}
|
|
|
|
//TMW
|
|
case 0x212e: {
|
|
window.regs.oam_main_enable = data & 0x10;
|
|
window.regs.bg4_main_enable = data & 0x08;
|
|
window.regs.bg3_main_enable = data & 0x04;
|
|
window.regs.bg2_main_enable = data & 0x02;
|
|
window.regs.bg1_main_enable = data & 0x01;
|
|
return;
|
|
}
|
|
|
|
//TSW
|
|
case 0x212f: {
|
|
window.regs.oam_sub_enable = data & 0x10;
|
|
window.regs.bg4_sub_enable = data & 0x08;
|
|
window.regs.bg3_sub_enable = data & 0x04;
|
|
window.regs.bg2_sub_enable = data & 0x02;
|
|
window.regs.bg1_sub_enable = data & 0x01;
|
|
return;
|
|
}
|
|
|
|
//CGWSEL
|
|
case 0x2130: {
|
|
window.regs.col_main_mask = (data >> 6) & 3;
|
|
window.regs.col_sub_mask = (data >> 4) & 3;
|
|
screen.regs.addsub_mode = data & 0x02;
|
|
screen.regs.direct_color = data & 0x01;
|
|
return;
|
|
}
|
|
|
|
//CGADDSUB
|
|
case 0x2131: {
|
|
screen.regs.color_mode = data & 0x80;
|
|
screen.regs.color_halve = data & 0x40;
|
|
screen.regs.back_color_enable = data & 0x20;
|
|
screen.regs.oam_color_enable = data & 0x10;
|
|
screen.regs.bg4_color_enable = data & 0x08;
|
|
screen.regs.bg3_color_enable = data & 0x04;
|
|
screen.regs.bg2_color_enable = data & 0x02;
|
|
screen.regs.bg1_color_enable = data & 0x01;
|
|
return;
|
|
}
|
|
|
|
//COLDATA
|
|
case 0x2132: {
|
|
if(data & 0x80) screen.regs.color_b = data & 0x1f;
|
|
if(data & 0x40) screen.regs.color_g = data & 0x1f;
|
|
if(data & 0x20) screen.regs.color_r = data & 0x1f;
|
|
return;
|
|
}
|
|
|
|
//SETINI
|
|
case 0x2133: {
|
|
regs.mode7_extbg = data & 0x40;
|
|
regs.pseudo_hires = data & 0x08;
|
|
regs.overscan = data & 0x04;
|
|
sprite.regs.interlace = data & 0x02;
|
|
regs.interlace = data & 0x01;
|
|
updateVideoMode();
|
|
return;
|
|
}
|
|
|
|
}
|
|
}
|
|
|
|
auto PPU::latchCounters() -> void {
|
|
cpu.synchronizePPU();
|
|
regs.hcounter = hdot();
|
|
regs.vcounter = vcounter();
|
|
regs.counters_latched = true;
|
|
}
|
|
|
|
auto PPU::updateVideoMode() -> void {
|
|
switch(regs.bgmode) {
|
|
case 0:
|
|
bg1.regs.mode = Background::Mode::BPP2; bg1.regs.priority0 = 8; bg1.regs.priority1 = 11;
|
|
bg2.regs.mode = Background::Mode::BPP2; bg2.regs.priority0 = 7; bg2.regs.priority1 = 10;
|
|
bg3.regs.mode = Background::Mode::BPP2; bg3.regs.priority0 = 2; bg3.regs.priority1 = 5;
|
|
bg4.regs.mode = Background::Mode::BPP2; bg4.regs.priority0 = 1; bg4.regs.priority1 = 4;
|
|
sprite.regs.priority0 = 3; sprite.regs.priority1 = 6; sprite.regs.priority2 = 9; sprite.regs.priority3 = 12;
|
|
break;
|
|
|
|
case 1:
|
|
bg1.regs.mode = Background::Mode::BPP4;
|
|
bg2.regs.mode = Background::Mode::BPP4;
|
|
bg3.regs.mode = Background::Mode::BPP2;
|
|
bg4.regs.mode = Background::Mode::Inactive;
|
|
if(regs.bg3_priority) {
|
|
bg1.regs.priority0 = 5; bg1.regs.priority1 = 8;
|
|
bg2.regs.priority0 = 4; bg2.regs.priority1 = 7;
|
|
bg3.regs.priority0 = 1; bg3.regs.priority1 = 10;
|
|
sprite.regs.priority0 = 2; sprite.regs.priority1 = 3; sprite.regs.priority2 = 6; sprite.regs.priority3 = 9;
|
|
} else {
|
|
bg1.regs.priority0 = 6; bg1.regs.priority1 = 9;
|
|
bg2.regs.priority0 = 5; bg2.regs.priority1 = 8;
|
|
bg3.regs.priority0 = 1; bg3.regs.priority1 = 3;
|
|
sprite.regs.priority0 = 2; sprite.regs.priority1 = 4; sprite.regs.priority2 = 7; sprite.regs.priority3 = 10;
|
|
}
|
|
break;
|
|
|
|
case 2:
|
|
bg1.regs.mode = Background::Mode::BPP4;
|
|
bg2.regs.mode = Background::Mode::BPP4;
|
|
bg3.regs.mode = Background::Mode::Inactive;
|
|
bg4.regs.mode = Background::Mode::Inactive;
|
|
bg1.regs.priority0 = 3; bg1.regs.priority1 = 7;
|
|
bg2.regs.priority0 = 1; bg2.regs.priority1 = 5;
|
|
sprite.regs.priority0 = 2; sprite.regs.priority1 = 4; sprite.regs.priority2 = 6; sprite.regs.priority3 = 8;
|
|
break;
|
|
|
|
case 3:
|
|
bg1.regs.mode = Background::Mode::BPP8;
|
|
bg2.regs.mode = Background::Mode::BPP4;
|
|
bg3.regs.mode = Background::Mode::Inactive;
|
|
bg4.regs.mode = Background::Mode::Inactive;
|
|
bg1.regs.priority0 = 3; bg1.regs.priority1 = 7;
|
|
bg2.regs.priority0 = 1; bg2.regs.priority1 = 5;
|
|
sprite.regs.priority0 = 2; sprite.regs.priority1 = 4; sprite.regs.priority2 = 6; sprite.regs.priority3 = 8;
|
|
break;
|
|
|
|
case 4:
|
|
bg1.regs.mode = Background::Mode::BPP8;
|
|
bg2.regs.mode = Background::Mode::BPP2;
|
|
bg3.regs.mode = Background::Mode::Inactive;
|
|
bg4.regs.mode = Background::Mode::Inactive;
|
|
bg1.regs.priority0 = 3; bg1.regs.priority1 = 7;
|
|
bg2.regs.priority0 = 1; bg2.regs.priority1 = 5;
|
|
sprite.regs.priority0 = 2; sprite.regs.priority1 = 4; sprite.regs.priority2 = 6; sprite.regs.priority3 = 8;
|
|
break;
|
|
|
|
case 5:
|
|
bg1.regs.mode = Background::Mode::BPP4;
|
|
bg2.regs.mode = Background::Mode::BPP2;
|
|
bg3.regs.mode = Background::Mode::Inactive;
|
|
bg4.regs.mode = Background::Mode::Inactive;
|
|
bg1.regs.priority0 = 3; bg1.regs.priority1 = 7;
|
|
bg2.regs.priority0 = 1; bg2.regs.priority1 = 5;
|
|
sprite.regs.priority0 = 2; sprite.regs.priority1 = 4; sprite.regs.priority2 = 6; sprite.regs.priority3 = 8;
|
|
break;
|
|
|
|
case 6:
|
|
bg1.regs.mode = Background::Mode::BPP4;
|
|
bg2.regs.mode = Background::Mode::Inactive;
|
|
bg3.regs.mode = Background::Mode::Inactive;
|
|
bg4.regs.mode = Background::Mode::Inactive;
|
|
bg1.regs.priority0 = 2; bg1.regs.priority1 = 5;
|
|
sprite.regs.priority0 = 1; sprite.regs.priority1 = 3; sprite.regs.priority2 = 4; sprite.regs.priority3 = 6;
|
|
break;
|
|
|
|
case 7:
|
|
if(regs.mode7_extbg == false) {
|
|
bg1.regs.mode = Background::Mode::Mode7;
|
|
bg2.regs.mode = Background::Mode::Inactive;
|
|
bg3.regs.mode = Background::Mode::Inactive;
|
|
bg4.regs.mode = Background::Mode::Inactive;
|
|
bg1.regs.priority0 = 2; bg1.regs.priority1 = 2;
|
|
sprite.regs.priority0 = 1; sprite.regs.priority1 = 3; sprite.regs.priority2 = 4; sprite.regs.priority3 = 5;
|
|
} else {
|
|
bg1.regs.mode = Background::Mode::Mode7;
|
|
bg2.regs.mode = Background::Mode::Mode7;
|
|
bg3.regs.mode = Background::Mode::Inactive;
|
|
bg4.regs.mode = Background::Mode::Inactive;
|
|
bg1.regs.priority0 = 3; bg1.regs.priority1 = 3;
|
|
bg2.regs.priority0 = 1; bg2.regs.priority1 = 5;
|
|
sprite.regs.priority0 = 2; sprite.regs.priority1 = 4; sprite.regs.priority2 = 6; sprite.regs.priority3 = 7;
|
|
}
|
|
break;
|
|
}
|
|
}
|