bsnes is a Super Nintendo (SNES) emulator focused on performance, features, and ease of use.
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Tim Allen 95d0020297 Update to v106r75 release.
byuu says:

So tired ... so much left to do still ... sigh.

If someone's up for some code golf, open to suggestions on how to handle
the INTNEST control register. It's the only pure 16-bit register on the
system, and it breaks my `map`/`load`/`store<uint8,16,32>` abstraction.
Basically what I suspect happens is when you access INTNEST in 32-bit
mode, the upper 16-bits are just undefined (probably zero.) But
`map<uint32>(INTNEST)` must return a uint32& or nothing at all. So for the
time being, I'm just making store(ControlRegister) check if it's the
INTNEST ID, and clearing the upper bits of the written byte in that
case. It's hacky, but ... it's the best I can think of.

I added LDX, which is a 900H-only instruction, and the control register
map is for the 900/H CPU. I found the detailed differences between the
CPUs, and it doesn't look likely that I'm gonna support the 900 or
900/H1 at all. Not that there was a reason to anyway, but it's nice to
support more stuff when possible. Oh well.

The 4-byte instruction fetch queue is going to have to get implemented
inside fetch, or just not implemented at all ... not like I'd be able to
figure out the details of it anyway.

The manual isn't clear on how the MULA flags are calculated, but since
MUL doesn't set any flags, I assume the flags are based on the addition
after the multiplication, eg:

    uint32 a = indirect<int16>(XDE) * indirect<int16>(XHL);
    uint32 b = reg16; //opcode parameter
    uint32 c = a + b; //flags set based on a+b

No idea if it's right or not. It doesn't set carry or half-carry, so
it's not just simply the same as calling algorithmAdd.

Up to almost 70KB, not even halfway done, don't even have a disassembler
started yet. There's a real chance this could overtake the 68K for the
biggest CPU core in higan, although at this point I'm still thinking the
68K will end up larger.
2019-01-10 13:21:18 +11:00
docs Document that we now require GCC7 and/or C++17 features. 2019-01-03 20:43:08 +11:00
genius Update to v106r68 release. 2018-12-22 21:28:15 +11:00
higan Update to v106r75 release. 2019-01-10 13:21:18 +11:00
hiro Update to v106r70 release. 2019-01-03 21:05:20 +11:00
icarus Update to v106r70 release. 2019-01-03 21:05:20 +11:00
libco Update to v105r1 release. 2017-11-07 09:05:54 +11:00
nall Update to v106r73 release. 2019-01-07 18:59:04 +11:00
ruby Update to v106r66 release. 2018-12-20 11:55:47 +11:00
shaders Install shaders somewhere that higan will find them. 2017-08-23 20:46:24 +10:00
.gitignore Update .gitignore. 2018-12-20 12:15:34 +11:00
.gitlab-ci.yml Build with Ubuntu LTS instead of Debian Stable. 2019-01-03 20:37:30 +11:00
CONTRIBUTING.md docs: Review and update docs for v107. 2018-11-16 16:09:30 +11:00
GPLv3.txt Update version and license 2017-10-24 23:37:22 -04:00
LICENSE.txt Add icarus to LICENSE.txt 2017-10-25 18:22:10 -04:00
README.md docs: Review and update docs for v107. 2018-11-16 16:09:30 +11:00
README.txt docs: Review and update docs for v107. 2018-11-16 16:09:30 +11:00
mkdocs.yml Add credits from Talarubi's README.TXT to the docs. 2017-11-12 17:10:37 +11:00

README.md

The unofficial higan repository

higan emulates a number of classic video-game consoles of the 1980s and 1990s, allowing you to play classic games on a modern general-purpose computer.

This repository includes the source-code for stable and WIP releases of higan, starting during the development of v068. It also includes community-maintained documentation.

Basically, apart from .gitignore files, anything in the higan, hiro, icarus, libco, nall, ruby, or shaders directories should be exactly as it appeared in official releases. Everything else has been added for various reasons.

Official higan resources

Unofficial higan resources