bsnes/higan/processor/m68k
Tim Allen 7ccfbe0206 Update to v100r11 release.
byuu says:

I split the Register class and read/write handlers into DataRegister and
AddressRegister, given that they have different behaviors on byte/word
accesses (data tends to preserve the upper bits; address tends to
sign-extend things.)

I expanded EA to EffectiveAddress. No sense in abbreviating things
to death.

I've now implemented 26 instructions. But the new ones are just all the
stupid from/to ccr/sr instructions.

Ryphecha confirmed that you can't set the undefined bits, so I don't
think the BitField concept is appropriate for the CCR/SR. Instead, I'm
just storing direct flags and have (read,write)(CCR,SR) instead. This
isn't like the 65816 where you have subroutines that push and pop the
flag register. It's much more common to access individual flags. Doesn't
match the consistency angle of the other CPU cores, but ... I think this
is the right thing to for the 68K specifically.
2016-07-23 12:32:35 +10:00
..
disassembler.cpp Update to v100r11 release. 2016-07-23 12:32:35 +10:00
effective-address.cpp Update to v100r11 release. 2016-07-23 12:32:35 +10:00
instruction.cpp Update to v100r11 release. 2016-07-23 12:32:35 +10:00
instructions.cpp Update to v100r11 release. 2016-07-23 12:32:35 +10:00
m68k.cpp Update to v100r11 release. 2016-07-23 12:32:35 +10:00
m68k.hpp Update to v100r11 release. 2016-07-23 12:32:35 +10:00
memory.cpp Update to v100r11 release. 2016-07-23 12:32:35 +10:00
registers.cpp Update to v100r11 release. 2016-07-23 12:32:35 +10:00