mirror of https://github.com/bsnes-emu/bsnes.git
262 lines
7.3 KiB
C++
262 lines
7.3 KiB
C++
auto M68K::trap() -> void {
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instructionsExecuted--;
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r.pc -= 2;
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print("[M68K] unimplemented instruction: ", hex(r.pc, 6L), " = ", hex(opcode, 4L), "\n");
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print("[M68K] instructions executed: ", instructionsExecuted, "\n");
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while(true) step(5);
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}
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auto M68K::instruction() -> void {
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instructionsExecuted++;
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//print(disassembleRegisters(), "\n");
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//print(disassemble(r.pc), "\n");
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//print("\n");
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opcode = readPC();
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return instructionTable[opcode]();
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}
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M68K::M68K() {
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#define bind(id, name, ...) { \
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assert(!instructionTable[id]); \
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instructionTable[id] = [=] { return instruction##name(__VA_ARGS__); }; \
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disassembleTable[id] = [=] { return disassemble##name(__VA_ARGS__); }; \
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}
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#define unbind(id) { \
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instructionTable[id].reset(); \
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disassembleTable[id].reset(); \
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}
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#define pattern(s) \
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std::integral_constant<uint16_t, bit::test(s)>::value
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//ADD
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for(uint3 dreg : range(8))
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for(uint1 direction : range(2))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("1101 ---- ++-- ----") | dreg << 9 | direction << 8 | mode << 3 | reg << 0;
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if(direction == 1 && (mode == 0 || mode == 1 || (mode == 7 && reg >= 2))) continue;
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Register rd{D0 + dreg};
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EA ea{mode, reg};
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bind(opcode | 0 << 6, ADD<Byte>, rd, direction, ea);
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bind(opcode | 1 << 6, ADD<Word>, rd, direction, ea);
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bind(opcode | 2 << 6, ADD<Long>, rd, direction, ea);
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if(direction == 0 && mode == 1) unbind(opcode | 0 << 6);
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}
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//ANDI
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("0000 0010 ++-- ----") | mode << 3 | reg << 0;
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if(mode == 1 || (mode == 7 && reg >= 2)) continue;
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EA ea{mode, reg};
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bind(opcode | 0 << 6, ANDI<Byte>, ea);
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bind(opcode | 1 << 6, ANDI<Word>, ea);
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bind(opcode | 2 << 6, ANDI<Long>, ea);
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}
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//BCC
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for(uint4 condition : range( 16))
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for(uint8 displacement : range(256)) {
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auto opcode = pattern("0110 ---- ---- ----") | condition << 8 | displacement << 0;
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bind(opcode, BCC, condition, displacement);
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}
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//BTST (register)
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for(uint3 dreg : range(8))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("0000 ---1 00-- ----") | dreg << 9 | mode << 3 | reg << 0;
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if(mode == 1) continue;
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Register rd{D0 + dreg};
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EA ea{mode, reg};
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if(mode == 0) bind(opcode, BTST<Long>, rd, ea);
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if(mode != 0) bind(opcode, BTST<Byte>, rd, ea);
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}
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//BTST (immediate)
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("0000 1000 00-- ----") | mode << 3 | reg << 0;
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if(mode == 1 || (mode == 7 && reg == 2)) continue;
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EA ea{mode, reg};
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if(mode == 0) bind(opcode, BTST<Long>, ea);
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if(mode != 0) bind(opcode, BTST<Byte>, ea);
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}
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//CLR
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("0100 0010 ++-- ----") | mode << 3 | reg << 0;
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if(mode == 1 || (mode == 7 && reg >= 2)) continue;
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EA ea{mode, reg};
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bind(opcode | 0 << 6, CLR<Byte>, ea);
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bind(opcode | 1 << 6, CLR<Word>, ea);
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bind(opcode | 2 << 6, CLR<Long>, ea);
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}
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//CMP
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for(uint3 dreg : range(8))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("1011 ---0 ++-- ----") | dreg << 9 | mode << 3 | reg << 0;
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Register rd{D0 + dreg};
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EA ea{mode, reg};
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bind(opcode | 0 << 6, CMP<Byte>, rd, ea);
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bind(opcode | 1 << 6, CMP<Word>, rd, ea);
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bind(opcode | 2 << 6, CMP<Long>, rd, ea);
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if(mode == 1) unbind(opcode | 0 << 6);
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}
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//DBCC
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for(uint4 condition : range(16))
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for(uint3 dreg : range( 8)) {
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auto opcode = pattern("0101 ---- 1100 1---") | condition << 8 | dreg << 0;
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Register rd{D0 + dreg};
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bind(opcode, DBCC, condition, rd);
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}
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//LEA
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for(uint3 areg : range(8))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("0100 ---1 11-- ----") | areg << 9 | mode << 3 | reg << 0;
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if(mode <= 1 || mode == 3 || mode == 4 || (mode == 7 && reg == 4)) continue;
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Register ra{A0 + areg};
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EA ea{mode, reg};
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bind(opcode, LEA, ra, ea);
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}
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//MOVE
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for(uint3 toReg : range(8))
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for(uint3 toMode : range(8))
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for(uint3 fromMode : range(8))
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for(uint3 fromReg : range(8)) {
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auto opcode = pattern("00++ ---- ---- ----") | toReg << 9 | toMode << 6 | fromMode << 3 | fromReg << 0;
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if(toMode == 1 || (toMode == 7 && toReg >= 2)) continue;
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EA to{toMode, toReg};
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EA from{fromMode, fromReg};
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bind(opcode | 1 << 12, MOVE<Byte>, to, from);
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bind(opcode | 3 << 12, MOVE<Word>, to, from);
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bind(opcode | 2 << 12, MOVE<Long>, to, from);
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if(fromMode == 1) unbind(opcode | 1 << 12);
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}
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//MOVEA
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for(uint3 areg : range(8))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("00++ ---0 01-- ----") | areg << 9 | mode << 3 | reg << 0;
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Register ra{A0 + areg};
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EA ea{mode, reg};
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bind(opcode | 3 << 12, MOVEA<Word>, ra, ea);
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bind(opcode | 2 << 12, MOVEA<Long>, ra, ea);
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}
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//MOVEM
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for(uint1 direction : range(2))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("0100 1-00 1+-- ----") | direction << 10 | mode << 3 | reg << 0;
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if(direction == 0 && (mode <= 1 || mode == 3 || (mode == 7 && reg >= 2)));
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if(direction == 1 && (mode <= 1 || mode == 4 || (mode == 7 && reg == 4)));
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EA ea{mode, reg};
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bind(opcode | 0 << 6, MOVEM<Word>, direction, ea);
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bind(opcode | 1 << 6, MOVEM<Long>, direction, ea);
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}
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//MOVEQ
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for(uint3 dreg : range( 8))
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for(uint8 immediate : range(256)) {
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auto opcode = pattern("0111 ---0 ---- ----") | dreg << 9 | immediate << 0;
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Register rd{D0 + dreg};
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bind(opcode, MOVEQ, rd, immediate);
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}
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//MOVE_FROM_SR
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("0100 0000 11-- ----") | mode << 3 | reg << 0;
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if(mode == 1 || (mode == 7 && reg >= 2)) continue;
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EA ea{mode, reg};
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bind(opcode, MOVE_FROM_SR, ea);
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}
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//MOVE_TO_SR
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("0100 0110 11-- ----") | mode << 3 | reg << 0;
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if(mode == 1) continue;
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EA ea{mode, reg};
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bind(opcode, MOVE_TO_SR, ea);
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}
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//MOVE_USP
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for(uint1 direction : range(2))
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for(uint3 areg : range(8)) {
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auto opcode = pattern("0100 1110 0110 ----") | direction << 3 | areg << 0;
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Register ra{A0 + areg};
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bind(opcode, MOVE_USP, direction, ra);
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}
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//NOP
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{ auto opcode = pattern("0100 1110 0111 0001");
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bind(opcode, NOP);
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}
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//RTS
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{ auto opcode = pattern("0100 1110 0111 0101");
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bind(opcode, RTS);
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}
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//TST
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("0100 1010 ++-- ----") | mode << 3 | reg << 0;
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if(mode == 7 && reg >= 2) continue;
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EA ea{mode, reg};
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bind(opcode | 0 << 6, TST<Byte>, ea);
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bind(opcode | 1 << 6, TST<Word>, ea);
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bind(opcode | 2 << 6, TST<Long>, ea);
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if(mode == 1) unbind(opcode | 0 << 6);
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}
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#undef bind
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#undef unbind
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#undef pattern
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uint unimplemented = 0;
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for(uint16 opcode : range(65536)) {
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if(instructionTable[opcode]) continue;
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instructionTable[opcode] = [=] { trap(); };
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disassembleTable[opcode] = [=] { return string{"???"}; };
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unimplemented++;
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}
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print("[M68K] unimplemented opcodes: ", unimplemented, "\n");
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}
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