bsnes/higan/md
Tim Allen 4b897ba791 Update to v100r10 release.
byuu says:

Redesigned the handling of reading/writing registers to be about eight
times faster than the old system. More work may be needed ... it seems
data registers tend to preserve their upper bits upon assignment; whereas
address registers tend to sign-extend values into them. It may make
sense to have DataRegister and AddressRegister classes with separate
read/write handlers. I'd have to hold two Register objects inside the
EffectiveAddress (EA) class if we do that.

Implemented 19 opcodes now (out of somewhere between 60 and 90.) That gets
the first ~530,000 instructions in Sonic the Hedgehog running (though
probably wrong. But we can run a lot thanks to large initialization
loops.)

If I force the core to loop back to the reset vector on an invalid opcode,
I'm getting about 1500fps with a dumb 320x240 blit 60 times a second and
just the 68K running alone (no Z80, PSG, VDP, YM2612.) I don't know if
that's good or not. I guess we'll find out.

I had to stop tonight because the final opcode I execute is an RTS
(return from subroutine) that's branching back to address 0; which is
invalid ... meaning something went terribly wrong and the system crashed.
2016-07-22 22:03:25 +10:00
..
apu Update to v100r03 release. 2016-07-10 15:28:26 +10:00
cartridge Update to v100r07 release. 2016-07-17 13:24:28 +10:00
cpu Update to v100r10 release. 2016-07-22 22:03:25 +10:00
interface Update to v100r04 release. 2016-07-12 20:19:31 +10:00
psg Update to v100r03 release. 2016-07-10 15:28:26 +10:00
system Update to v100r04 release. 2016-07-12 20:19:31 +10:00
vdp Update to v100r03 release. 2016-07-10 15:28:26 +10:00
ym2612 Update to v100r03 release. 2016-07-10 15:28:26 +10:00
GNUmakefile Update to v100r03 release. 2016-07-10 15:28:26 +10:00
md.hpp Update to v100r03 release. 2016-07-10 15:28:26 +10:00