mirror of https://github.com/bsnes-emu/bsnes.git
339 lines
6.1 KiB
C++
Executable File
339 lines
6.1 KiB
C++
Executable File
#ifdef CPUCORE_CPP
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void CPUcore::op_nop() {
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L op_io_irq();
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}
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void CPUcore::op_wdm() {
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L op_readpc();
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}
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void CPUcore::op_xba() {
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op_io();
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L op_io();
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regs.a.l ^= regs.a.h;
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regs.a.h ^= regs.a.l;
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regs.a.l ^= regs.a.h;
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regs.p.n = (regs.a.l & 0x80);
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regs.p.z = (regs.a.l == 0);
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}
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template<int adjust> void CPUcore::op_move_b() {
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dp = op_readpc();
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sp = op_readpc();
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regs.db = dp;
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rd.l = op_readlong((sp << 16) | regs.x.w);
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op_writelong((dp << 16) | regs.y.w, rd.l);
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op_io();
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regs.x.l += adjust;
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regs.y.l += adjust;
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L op_io();
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if(regs.a.w--) regs.pc.w -= 3;
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}
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template<int adjust> void CPUcore::op_move_w() {
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dp = op_readpc();
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sp = op_readpc();
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regs.db = dp;
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rd.l = op_readlong((sp << 16) | regs.x.w);
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op_writelong((dp << 16) | regs.y.w, rd.l);
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op_io();
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regs.x.w += adjust;
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regs.y.w += adjust;
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L op_io();
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if(regs.a.w--) regs.pc.w -= 3;
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}
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template<int vectorE, int vectorN> void CPUcore::op_interrupt_e() {
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op_readpc();
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op_writestack(regs.pc.h);
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op_writestack(regs.pc.l);
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op_writestack(regs.p);
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rd.l = op_readlong(vectorE + 0);
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regs.pc.b = 0;
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regs.p.i = 1;
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regs.p.d = 0;
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L rd.h = op_readlong(vectorE + 1);
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regs.pc.w = rd.w;
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}
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template<int vectorE, int vectorN> void CPUcore::op_interrupt_n() {
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op_readpc();
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op_writestack(regs.pc.b);
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op_writestack(regs.pc.h);
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op_writestack(regs.pc.l);
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op_writestack(regs.p);
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rd.l = op_readlong(vectorN + 0);
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regs.pc.b = 0x00;
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regs.p.i = 1;
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regs.p.d = 0;
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L rd.h = op_readlong(vectorN + 1);
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regs.pc.w = rd.w;
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}
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void CPUcore::op_stp() {
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while(regs.wai = true) {
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L op_io();
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}
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}
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void CPUcore::op_wai() {
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regs.wai = true;
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while(regs.wai) {
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L op_io();
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}
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op_io();
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}
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void CPUcore::op_xce() {
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L op_io_irq();
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bool carry = regs.p.c;
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regs.p.c = regs.e;
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regs.e = carry;
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if(regs.e) {
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regs.p |= 0x30;
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regs.s.h = 0x01;
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}
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if(regs.p.x) {
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regs.x.h = 0x00;
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regs.y.h = 0x00;
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}
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update_table();
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}
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template<int mask, int value> void CPUcore::op_flag() {
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L op_io_irq();
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regs.p = (regs.p & ~mask) | value;
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}
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template<int mode> void CPUcore::op_pflag_e() {
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rd.l = op_readpc();
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L op_io();
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regs.p = (mode ? regs.p | rd.l : regs.p & ~rd.l);
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regs.p |= 0x30;
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if(regs.p.x) {
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regs.x.h = 0x00;
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regs.y.h = 0x00;
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}
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update_table();
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}
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template<int mode> void CPUcore::op_pflag_n() {
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rd.l = op_readpc();
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L op_io();
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regs.p = (mode ? regs.p | rd.l : regs.p & ~rd.l);
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if(regs.p.x) {
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regs.x.h = 0x00;
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regs.y.h = 0x00;
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}
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update_table();
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}
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template<int from, int to> void CPUcore::op_transfer_b() {
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L op_io_irq();
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regs.r[to].l = regs.r[from].l;
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regs.p.n = (regs.r[to].l & 0x80);
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regs.p.z = (regs.r[to].l == 0);
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}
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template<int from, int to> void CPUcore::op_transfer_w() {
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L op_io_irq();
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regs.r[to].w = regs.r[from].w;
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regs.p.n = (regs.r[to].w & 0x8000);
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regs.p.z = (regs.r[to].w == 0);
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}
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void CPUcore::op_tcs_e() {
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L op_io_irq();
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regs.s.l = regs.a.l;
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}
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void CPUcore::op_tcs_n() {
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L op_io_irq();
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regs.s.w = regs.a.w;
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}
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void CPUcore::op_tsx_b() {
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L op_io_irq();
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regs.x.l = regs.s.l;
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regs.p.n = (regs.x.l & 0x80);
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regs.p.z = (regs.x.l == 0);
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}
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void CPUcore::op_tsx_w() {
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L op_io_irq();
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regs.x.w = regs.s.w;
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regs.p.n = (regs.x.w & 0x8000);
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regs.p.z = (regs.x.w == 0);
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}
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void CPUcore::op_txs_e() {
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L op_io_irq();
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regs.s.l = regs.x.l;
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}
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void CPUcore::op_txs_n() {
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L op_io_irq();
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regs.s.w = regs.x.w;
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}
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template<int n> void CPUcore::op_push_b() {
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op_io();
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L op_writestack(regs.r[n].l);
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}
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template<int n> void CPUcore::op_push_w() {
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op_io();
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op_writestack(regs.r[n].h);
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L op_writestack(regs.r[n].l);
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}
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void CPUcore::op_phd_e() {
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op_io();
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op_writestackn(regs.d.h);
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L op_writestackn(regs.d.l);
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regs.s.h = 0x01;
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}
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void CPUcore::op_phd_n() {
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op_io();
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op_writestackn(regs.d.h);
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L op_writestackn(regs.d.l);
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}
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void CPUcore::op_phb() {
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op_io();
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L op_writestack(regs.db);
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}
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void CPUcore::op_phk() {
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op_io();
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L op_writestack(regs.pc.b);
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}
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void CPUcore::op_php() {
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op_io();
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L op_writestack(regs.p);
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}
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template<int n> void CPUcore::op_pull_b() {
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op_io();
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op_io();
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L regs.r[n].l = op_readstack();
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regs.p.n = (regs.r[n].l & 0x80);
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regs.p.z = (regs.r[n].l == 0);
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}
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template<int n> void CPUcore::op_pull_w() {
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op_io();
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op_io();
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regs.r[n].l = op_readstack();
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L regs.r[n].h = op_readstack();
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regs.p.n = (regs.r[n].w & 0x8000);
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regs.p.z = (regs.r[n].w == 0);
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}
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void CPUcore::op_pld_e() {
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op_io();
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op_io();
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regs.d.l = op_readstackn();
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L regs.d.h = op_readstackn();
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regs.p.n = (regs.d.w & 0x8000);
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regs.p.z = (regs.d.w == 0);
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regs.s.h = 0x01;
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}
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void CPUcore::op_pld_n() {
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op_io();
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op_io();
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regs.d.l = op_readstackn();
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L regs.d.h = op_readstackn();
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regs.p.n = (regs.d.w & 0x8000);
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regs.p.z = (regs.d.w == 0);
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}
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void CPUcore::op_plb() {
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op_io();
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op_io();
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L regs.db = op_readstack();
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regs.p.n = (regs.db & 0x80);
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regs.p.z = (regs.db == 0);
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}
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void CPUcore::op_plp_e() {
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op_io();
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op_io();
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L regs.p = op_readstack() | 0x30;
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if(regs.p.x) {
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regs.x.h = 0x00;
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regs.y.h = 0x00;
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}
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update_table();
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}
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void CPUcore::op_plp_n() {
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op_io();
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op_io();
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L regs.p = op_readstack();
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if(regs.p.x) {
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regs.x.h = 0x00;
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regs.y.h = 0x00;
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}
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update_table();
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}
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void CPUcore::op_pea_e() {
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aa.l = op_readpc();
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aa.h = op_readpc();
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op_writestackn(aa.h);
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L op_writestackn(aa.l);
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regs.s.h = 0x01;
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}
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void CPUcore::op_pea_n() {
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aa.l = op_readpc();
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aa.h = op_readpc();
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op_writestackn(aa.h);
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L op_writestackn(aa.l);
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}
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void CPUcore::op_pei_e() {
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dp = op_readpc();
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op_io_cond2();
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aa.l = op_readdp(dp + 0);
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aa.h = op_readdp(dp + 1);
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op_writestackn(aa.h);
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L op_writestackn(aa.l);
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regs.s.h = 0x01;
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}
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void CPUcore::op_pei_n() {
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dp = op_readpc();
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op_io_cond2();
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aa.l = op_readdp(dp + 0);
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aa.h = op_readdp(dp + 1);
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op_writestackn(aa.h);
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L op_writestackn(aa.l);
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}
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void CPUcore::op_per_e() {
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aa.l = op_readpc();
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aa.h = op_readpc();
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op_io();
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rd.w = regs.pc.d + (int16)aa.w;
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op_writestackn(rd.h);
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L op_writestackn(rd.l);
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regs.s.h = 0x01;
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}
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void CPUcore::op_per_n() {
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aa.l = op_readpc();
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aa.h = op_readpc();
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op_io();
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rd.w = regs.pc.d + (int16)aa.w;
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op_writestackn(rd.h);
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L op_writestackn(rd.l);
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}
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#endif
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