mirror of https://github.com/bsnes-emu/bsnes.git
107 lines
2.8 KiB
C++
Executable File
107 lines
2.8 KiB
C++
Executable File
#ifdef CPU_CPP
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//called once every four clock cycles;
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//as NMI steps by scanlines (divisible by 4) and IRQ by PPU 4-cycle dots.
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//
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//ppu.(vh)counter(n) returns the value of said counters n-clocks before current time;
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//it is used to emulate hardware communication delay between opcode and interrupt units.
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void CPU::poll_interrupts() {
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//NMI hold
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if(status.nmi_hold) {
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status.nmi_hold = false;
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if(status.nmi_enabled) status.nmi_transition = true;
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}
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//NMI test
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bool nmi_valid = (vcounter(2) >= (!ppu.overscan() ? 225 : 240));
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if(!status.nmi_valid && nmi_valid) {
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//0->1 edge sensitive transition
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status.nmi_line = true;
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status.nmi_hold = true; //hold /NMI for four cycles
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} else if(status.nmi_valid && !nmi_valid) {
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//1->0 edge sensitive transition
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status.nmi_line = false;
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}
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status.nmi_valid = nmi_valid;
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//IRQ hold
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status.irq_hold = false;
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if(status.irq_line) {
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if(status.virq_enabled || status.hirq_enabled) status.irq_transition = true;
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}
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//IRQ test
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bool irq_valid = (status.virq_enabled || status.hirq_enabled);
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if(irq_valid) {
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if((status.virq_enabled && vcounter(10) != (status.virq_pos))
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|| (status.hirq_enabled && hcounter(10) != (status.hirq_pos + 1) * 4)
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|| (status.virq_pos && vcounter(6) == 0) //IRQs cannot trigger on last dot of field
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) irq_valid = false;
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}
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if(!status.irq_valid && irq_valid) {
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//0->1 edge sensitive transition
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status.irq_line = true;
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status.irq_hold = true; //hold /IRQ for four cycles
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}
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status.irq_valid = irq_valid;
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}
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void CPU::nmitimen_update(uint8 data) {
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bool nmi_enabled = status.nmi_enabled;
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bool virq_enabled = status.virq_enabled;
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bool hirq_enabled = status.hirq_enabled;
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status.nmi_enabled = data & 0x80;
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status.virq_enabled = data & 0x20;
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status.hirq_enabled = data & 0x10;
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//0->1 edge sensitive transition
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if(!nmi_enabled && status.nmi_enabled && status.nmi_line) {
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status.nmi_transition = true;
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}
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//?->1 level sensitive transition
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if(status.virq_enabled && !status.hirq_enabled && status.irq_line) {
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status.irq_transition = true;
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}
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if(!status.virq_enabled && !status.hirq_enabled) {
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status.irq_line = false;
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status.irq_transition = false;
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}
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status.irq_lock = true;
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}
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bool CPU::rdnmi() {
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bool result = status.nmi_line;
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if(!status.nmi_hold) {
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status.nmi_line = false;
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}
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return result;
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}
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bool CPU::timeup() {
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bool result = status.irq_line;
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if(!status.irq_hold) {
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status.irq_line = false;
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status.irq_transition = false;
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}
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return result;
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}
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bool CPU::nmi_test() {
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if(!status.nmi_transition) return false;
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status.nmi_transition = false;
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regs.wai = false;
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return true;
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}
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bool CPU::irq_test() {
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if(!status.irq_transition && !regs.irq) return false;
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status.irq_transition = false;
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regs.wai = false;
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return !regs.p.i;
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}
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#endif
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