mirror of https://github.com/bsnes-emu/bsnes.git
142 lines
2.9 KiB
C++
Executable File
142 lines
2.9 KiB
C++
Executable File
#include <snes.hpp>
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#define CPU_CPP
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namespace SNES {
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#if defined(DEBUGGER)
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#include "debugger/debugger.cpp"
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CPUDebugger cpu;
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#else
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CPU cpu;
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#endif
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#include "serialization.cpp"
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#include "dma/dma.cpp"
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#include "memory/memory.cpp"
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#include "mmio/mmio.cpp"
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#include "timing/timing.cpp"
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void CPU::step(unsigned clocks) {
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smp.clock -= clocks * (uint64)smp.frequency;
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ppu.clock -= clocks;
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for(unsigned i = 0; i < coprocessors.size(); i++) {
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Processor &chip = *coprocessors[i];
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chip.clock -= clocks * (uint64)chip.frequency;
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}
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}
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void CPU::synchronize_smp() {
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if(smp.clock < 0) co_switch(smp.thread);
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}
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void CPU::synchronize_ppu() {
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if(ppu.clock < 0) co_switch(ppu.thread);
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}
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void CPU::synchronize_coprocessor() {
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for(unsigned i = 0; i < coprocessors.size(); i++) {
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Processor &chip = *coprocessors[i];
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if(chip.clock < 0) co_switch(chip.thread);
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}
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}
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void CPU::Enter() { cpu.enter(); }
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void CPU::enter() {
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while(true) {
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if(scheduler.sync == Scheduler::SynchronizeMode::CPU) {
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scheduler.sync = Scheduler::SynchronizeMode::All;
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scheduler.exit(Scheduler::ExitReason::SynchronizeEvent);
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}
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if(status.interrupt_pending) {
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status.interrupt_pending = false;
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if(status.nmi_pending) {
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status.nmi_pending = false;
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status.interrupt_vector = (regs.e == false ? 0xffea : 0xfffa);
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op_irq();
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} else if(status.irq_pending) {
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status.irq_pending = false;
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status.interrupt_vector = (regs.e == false ? 0xffee : 0xfffe);
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op_irq();
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} else if(status.reset_pending) {
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status.reset_pending = false;
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add_clocks(186);
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regs.pc.l = bus.read(0xfffc);
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regs.pc.h = bus.read(0xfffd);
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}
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}
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op_step();
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}
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}
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void CPU::op_step() {
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(this->*opcode_table[op_readpc()])();
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}
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void CPU::op_irq() {
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op_read(regs.pc.d);
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op_io();
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if(!regs.e) op_writestack(regs.pc.b);
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op_writestack(regs.pc.h);
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op_writestack(regs.pc.l);
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op_writestack(regs.e ? (regs.p & ~0x10) : regs.p);
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rd.l = op_read(status.interrupt_vector + 0);
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regs.pc.b = 0x00;
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regs.p.i = 1;
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regs.p.d = 0;
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rd.h = op_read(status.interrupt_vector + 1);
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regs.pc.w = rd.w;
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}
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void CPU::power() {
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cpu_version = config.cpu.version;
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regs.a = regs.x = regs.y = 0x0000;
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regs.s = 0x01ff;
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mmio_power();
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dma_power();
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timing_power();
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reset();
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}
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void CPU::reset() {
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create(Enter, system.cpu_frequency());
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coprocessors.reset();
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PPUcounter::reset();
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//note: some registers are not fully reset by SNES
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regs.pc = 0x000000;
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regs.x.h = 0x00;
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regs.y.h = 0x00;
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regs.s.h = 0x01;
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regs.d = 0x0000;
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regs.db = 0x00;
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regs.p = 0x34;
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regs.e = 1;
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regs.mdr = 0x00;
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regs.wai = false;
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update_table();
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mmio_reset();
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dma_reset();
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timing_reset();
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apu_port[0] = 0x00;
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apu_port[1] = 0x00;
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apu_port[2] = 0x00;
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apu_port[3] = 0x00;
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}
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CPU::CPU() {
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PPUcounter::scanline = { &CPU::scanline, this };
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}
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CPU::~CPU() {
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}
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}
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