mirror of https://github.com/bsnes-emu/bsnes.git
c2d0ed4ca8
byuu says: Changelog: - sfc/cx4: added missing instructions [info from Overload] - sfc/cx4: added instruction cache emulation [info from ikari] - sfc/sa1: don't let CPU access SA1-only I/O registers, and vice versa - sfc/sa1: fixed IRQs that were broken from the recent WIP - sfc/sa1: significantly improved bus conflict emulation - all tests match hardware now, other than HDMA ROM↔ROM, which is 0.5 - 0.8% too fast - sfc/cpu: fixed a bug with DMA→CPU alignment timing - sfc/cpu: removed the DMA pipe; performs writes on the same cycles as reads [info from nocash] - sfc/memory: fix a crashing bug due to not clearing Memory size field [hex_usr] - bsnes/gb: use .rtc for real-time clock file extensions on the Game Boy [hex_usr] - ruby/cgl: compilation fix [Sintendo] Now let's see if I can accept being off by ~0.65% on one of twelve SA1 timing tests for the time being and prioritize much more important things or not. |
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memory-inline.hpp | ||
memory.cpp | ||
memory.hpp | ||
protectable.hpp | ||
readable.hpp | ||
writable.hpp |