66 Commits

Author	SHA1	Message	Date
Lior Halphon	22c34e1095	Serial API	2016-11-12 01:58:53 +02:00
Lior Halphon	2d51d13479	Various optimizations	2016-10-22 02:18:29 +03:00
Lior Halphon	f88c9d299b	Merge branch 'master' into rateless_apu	2016-09-20 20:05:03 +03:00
Lior Halphon	71d4ba21f2	Added a tick-counting debugger command	2016-09-16 11:58:31 +03:00
Lior Halphon	b95860c034	Making the APU independent of sample rate	2016-09-13 16:55:26 +03:00
Lior Halphon	603b8969ab	Correct (disconnected) serial emulation.	2016-09-06 13:13:14 +03:00
Lior Halphon	ee4907949b	Support for RTC latching. Fixes #4.	2016-08-21 22:33:57 +03:00
Lior Halphon	0f98ac5ff9	Emulate TIMA reloading	2016-08-06 13:56:29 +03:00
Lior Halphon	55cbe5d4d0	Accuracy improvements to timers	2016-08-06 00:24:12 +03:00
Lior Halphon	47e3300b66	Improved DMA accuracy, mooneyegb test ROMs no longer crash miserably. (but still fail)	2016-08-03 23:31:10 +03:00
Lior Halphon	185e71fe12	Improvements to IR API, since timing is VERY important	2016-07-21 01:03:13 +03:00
Lior Halphon	aa6438fa06	Async debugger commands	2016-07-18 00:46:45 +03:00
Lior Halphon	70bd90740a	Mass name and type changes. Save states are now compatible between 32- and 64-bit systems. Maybe.	2016-06-18 20:29:11 +03:00
Lior Halphon	0a09fba091	Correcting DIV and TIMA speed in CGB's double speed mode	2016-04-09 16:48:37 +03:00
Lior Halphon	af7309b98d	Moved the call to display_run to advance_cycle. ... This fixes games with delicate timings such as X/Ekkusu, that expect STAT to change *during* an opcode.	2016-04-02 19:15:07 +03:00
Lior Halphon	f1e9623371	Initial public commit	2016-04-01 21:27:01 +03:00