diff --git a/bsnes/emulator/emulator.hpp b/bsnes/emulator/emulator.hpp
index 650ab3eb..eed7c283 100644
--- a/bsnes/emulator/emulator.hpp
+++ b/bsnes/emulator/emulator.hpp
@@ -29,7 +29,7 @@ using namespace nall;
 
 namespace Emulator {
   static const string Name    = "bsnes";
-  static const string Version = "108.12";
+  static const string Version = "108.13";
   static const string Author  = "byuu";
   static const string License = "GPLv3";
   static const string Website = "https://byuu.org";
diff --git a/bsnes/sfc/cpu/cpu.hpp b/bsnes/sfc/cpu/cpu.hpp
index 77543b36..a22b9fef 100644
--- a/bsnes/sfc/cpu/cpu.hpp
+++ b/bsnes/sfc/cpu/cpu.hpp
@@ -40,7 +40,6 @@ struct CPU : Processor::WDC65816, Thread, PPUcounter {
   auto writeDMA(uint address, uint8 data) -> void;
 
   //timing.cpp
-  inline auto dmaClocks() const -> uint;
   inline auto dmaCounter() const -> uint;
   inline auto joypadCounter() const -> uint;
 
diff --git a/bsnes/sfc/cpu/dma.cpp b/bsnes/sfc/cpu/dma.cpp
index 9f7ac473..9f4a10f8 100644
--- a/bsnes/sfc/cpu/dma.cpp
+++ b/bsnes/sfc/cpu/dma.cpp
@@ -14,6 +14,7 @@ auto CPU::hdmaActive() -> bool {
 }
 
 auto CPU::dmaRun() -> void {
+  counter.dma += 8;
   step<8,0>();
   dmaEdge();
   for(auto& channel : channels) channel.dmaRun();
@@ -25,12 +26,14 @@ auto CPU::hdmaReset() -> void {
 }
 
 auto CPU::hdmaSetup() -> void {
+  counter.dma += 8;
   step<8,0>();
   for(auto& channel : channels) channel.hdmaSetup();
   status.irqLock = true;
 }
 
 auto CPU::hdmaRun() -> void {
+  counter.dma += 8;
   step<8,0>();
   for(auto& channel : channels) channel.hdmaTransfer();
   for(auto& channel : channels) channel.hdmaAdvance();
@@ -40,8 +43,14 @@ auto CPU::hdmaRun() -> void {
 //
 
 template<uint Clocks, bool Synchronize>
-auto CPU::Channel::step() -> void { return cpu.step<Clocks, Synchronize>(); }
-auto CPU::Channel::edge() -> void { return cpu.dmaEdge(); }
+auto CPU::Channel::step() -> void {
+  cpu.counter.dma += Clocks;
+  cpu.step<Clocks, Synchronize>();
+}
+
+auto CPU::Channel::edge() -> void {
+  cpu.dmaEdge();
+}
 
 auto CPU::Channel::validA(uint24 address) -> bool {
   //A-bus cannot access the B-bus or CPU I/O registers
diff --git a/bsnes/sfc/cpu/timing.cpp b/bsnes/sfc/cpu/timing.cpp
index bae67c8e..2b2e3b5e 100644
--- a/bsnes/sfc/cpu/timing.cpp
+++ b/bsnes/sfc/cpu/timing.cpp
@@ -1,12 +1,3 @@
-//the number of clock cycles that have elapsed since (H)DMA began
-auto CPU::dmaClocks() const -> uint {
-  if(counter.cpu >= counter.dma) {
-    return counter.cpu - counter.dma;
-  } else {
-    return 0 - counter.cpu + counter.dma;
-  }
-}
-
 //DMA clock divider
 auto CPU::dmaCounter() const -> uint {
   return counter.cpu & 7;
@@ -150,12 +141,11 @@ auto CPU::dmaEdge() -> void {
       status.hdmaPending = false;
       if(hdmaEnable()) {
         if(!dmaEnable()) {
-          counter.dma = counter.cpu;
-          step(8 - dmaCounter());
+          step(counter.dma = 8 - dmaCounter());
         }
         status.hdmaMode == 0 ? hdmaSetup() : hdmaRun();
         if(!dmaEnable()) {
-          step(status.clockCount - dmaClocks() % status.clockCount);
+          step(status.clockCount - counter.dma % status.clockCount);
           status.dmaActive = false;
         }
       }
@@ -164,10 +154,9 @@ auto CPU::dmaEdge() -> void {
     if(status.dmaPending) {
       status.dmaPending = false;
       if(dmaEnable()) {
-        counter.dma = counter.cpu;
-        step(8 - dmaCounter());
+        step(counter.dma = 8 - dmaCounter());
         dmaRun();
-        step(status.clockCount - dmaClocks() % status.clockCount);
+        step(status.clockCount - counter.dma % status.clockCount);
         status.dmaActive = false;
       }
     }