mirror of https://github.com/bsnes-emu/bsnes.git
Update to v068r04 release.
(there was no r03 release posted to the WIP thread) byuu says: This should provide hardware-accurate mosaic support in the accurate renderer, with the exception that I'm still not sure what mid-frame vertical mosaic or mid-scanline horizontal mosaic writes do. Either the code I have is correct, or it bypasses the mosaic adjust and gives the exact H/V positions. I've also renamed the fast folder to alternative (thinking about naming it simply alt instead), and started on a brand new PPU renderer. So far it's just a barebones setup with some MMIO support and VRAM/OAM/CGRAM writing. I'm not even confident that I can get this to be faster than the current scanline renderer, but it's the only avenue that we have left for any kind of significant bsnes speedup, so I have to try. I'm going to finish up the MMIO stuff first, that way we have a clean slate with no actual rendering. And then from here we can try various different approaches.
This commit is contained in:
parent
39b1acb177
commit
c434e8a0d5
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@ -87,6 +87,6 @@ clean: ui_clean
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-@$(call delete,*.manifest)
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archive-all:
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tar -cjf bsnes-`date +%Y%m%d`.tar.bz2 launcher libco nall obj out qt ruby snes Makefile sync.sh cc.bat clean.bat
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tar -cjf bsnes.tar.bz2 launcher libco nall obj out qt ruby snes Makefile sync.sh cc.bat clean.bat
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help:;
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@ -20,14 +20,14 @@ else ifeq ($(profile),compatibility)
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flags += -DPROFILE_COMPATIBILITY
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snescpu := $(snes)/cpu
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snessmp := $(snes)/smp
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snesdsp := $(snes)/fast/dsp
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snesppu := $(snes)/fast/ppu
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snesdsp := $(snes)/alternative/dsp
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snesppu := $(snes)/alternative/ppu
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else ifeq ($(profile),performance)
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flags += -DPROFILE_PERFORMANCE
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snescpu := $(snes)/fast/cpu
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snescpu := $(snes)/alternative/cpu
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snessmp := $(snes)/smp
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snesdsp := $(snes)/fast/dsp
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snesppu := $(snes)/fast/ppu
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snesdsp := $(snes)/alternative/dsp
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snesppu := $(snes)/alternative/ppu-fast
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endif
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obj/libco.o : libco/libco.c libco/*
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@ -0,0 +1,3 @@
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#ifdef PPU_CPP
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#endif
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@ -0,0 +1,7 @@
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#ifdef PPU_CPP
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bool PPUDebugger::property(unsigned id, string &name, string &value) {
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return false;
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}
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#endif
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@ -0,0 +1,10 @@
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class PPUDebugger : public PPU, public ChipDebugger {
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public:
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bool property(unsigned id, string &name, string &value);
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bool bg1_enabled[2];
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bool bg2_enabled[2];
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bool bg3_enabled[2];
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bool bg4_enabled[2];
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bool oam_enabled[4];
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};
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@ -0,0 +1,48 @@
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#ifdef PPU_CPP
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void PPU::latch_counters() {
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}
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uint16 PPU::get_vram_addr() {
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uint16 addr = regs.vram_addr;
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switch(regs.vram_mapping) {
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case 0: break;
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case 1: addr = (addr & 0xff00) | ((addr & 0x001f) << 3) | ((addr >> 5) & 7); break;
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case 2: addr = (addr & 0xfe00) | ((addr & 0x003f) << 3) | ((addr >> 6) & 7); break;
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case 3: addr = (addr & 0xfc00) | ((addr & 0x007f) << 3) | ((addr >> 7) & 7); break;
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}
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return (addr << 1);
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}
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uint8 PPU::vram_read(unsigned addr) {
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if(regs.display_disabled == true) return memory::vram[addr];
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if(cpu.vcounter() >= regs.height) return memory::vram[addr];
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return 0x00;
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}
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void PPU::vram_write(unsigned addr, uint8 data) {
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if(regs.display_disabled == true) { memory::vram[addr] = data; return; }
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if(cpu.vcounter() >= regs.height) { memory::vram[addr] = data; return; }
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}
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uint8 PPU::oam_read(unsigned addr) {
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if(regs.display_disabled == true) return memory::oam[addr];
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if(cpu.vcounter() >= regs.height) return memory::oam[addr];
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return memory::oam[0x0218];
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}
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void PPU::oam_write(unsigned addr, uint8 data) {
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if(regs.display_disabled == true) { memory::oam[addr] = data; return; }
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if(cpu.vcounter() >= regs.height) { memory::oam[addr] = data; return; }
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memory::oam[0x0218] = data;
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}
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uint8 PPU::cgram_read(unsigned addr) {
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return memory::cgram[addr];
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}
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void PPU::cgram_write(unsigned addr, uint8 data) {
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memory::cgram[addr] = data;
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}
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#endif
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@ -0,0 +1,227 @@
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#ifdef PPU_CPP
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uint8 PPU::mmio_read(unsigned addr) {
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switch(addr & 0xffff) {
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}
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return 0x00;
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}
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void PPU::mmio_write(unsigned addr, uint8 data) {
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switch(addr & 0xffff) {
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case 0x2100: {
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regs.display_disabled = data & 0x80;
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regs.display_brightness = data & 0x0f;
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return;
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}
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case 0x2101: {
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regs.oam_basesize = (data >> 5) & 7;
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regs.oam_nameselect = (data >> 3) & 3;
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regs.oam_tdaddr = (data & 3) << 14;
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return;
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}
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case 0x2102: {
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regs.oam_baseaddr = (regs.oam_baseaddr & 0xff00) | (data << 0);
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regs.oam_baseaddr &= 0x01ff;
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regs.oam_addr = regs.oam_baseaddr << 1;
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regs.oam_firstsprite = (regs.oam_priority == false ? 0 : (regs.oam_addr >> 2) & 127);
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return;
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}
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case 0x2103: {
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regs.oam_priority = data & 0x80;
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regs.oam_baseaddr = (data << 8) | (regs.oam_baseaddr & 0x00ff);
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regs.oam_baseaddr &= 0x01ff;
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regs.oam_addr = regs.oam_baseaddr << 1;
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regs.oam_firstsprite = (regs.oam_priority == false ? 0 : (regs.oam_addr >> 2) & 127);
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return;
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}
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case 0x2104: {
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if(regs.oam_addr & 0x0200) {
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oam_write(regs.oam_addr, data);
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} else if((regs.oam_addr & 1) == 0) {
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regs.oam_latchdata = data;
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} else {
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oam_write((regs.oam_addr & ~1) + 0, regs.oam_latchdata);
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oam_write((regs.oam_addr & ~1) + 1, data);
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}
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regs.oam_addr = (regs.oam_addr + 1) & 0x03ff;
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regs.oam_firstsprite = (regs.oam_priority == false ? 0 : (regs.oam_addr >> 2) & 127);
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return;
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}
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case 0x2105: {
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regs.bg_tilesize[BG4] = data & 0x80;
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regs.bg_tilesize[BG3] = data & 0x40;
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regs.bg_tilesize[BG2] = data & 0x20;
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regs.bg_tilesize[BG1] = data & 0x10;
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regs.bg3_priority = data & 0x08;
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regs.bg_mode = data & 0x07;
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return;
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}
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case 0x2106: {
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regs.mosaic_size = (data >> 4) & 15;
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regs.mosaic_enabled[BG4] = data & 0x08;
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regs.mosaic_enabled[BG3] = data & 0x04;
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regs.mosaic_enabled[BG2] = data & 0x02;
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regs.mosaic_enabled[BG1] = data & 0x01;
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return;
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}
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case 0x2107: {
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regs.bg_scaddr[BG1] = (data & 0x7c) << 9;
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regs.bg_scsize[BG1] = (data & 0x03);
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return;
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}
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case 0x2108: {
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regs.bg_scaddr[BG2] = (data & 0x7c) << 9;
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regs.bg_scsize[BG2] = (data & 0x03);
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return;
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}
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case 0x2109: {
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regs.bg_scaddr[BG3] = (data & 0x7c) << 9;
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regs.bg_scsize[BG3] = (data & 0x03);
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return;
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}
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case 0x210a: {
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regs.bg_scaddr[BG4] = (data & 0x7c) << 9;
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regs.bg_scsize[BG4] = (data & 0x03);
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return;
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}
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case 0x210b: {
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regs.bg_tdaddr[BG1] = (data & 0x07) << 13;
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regs.bg_tdaddr[BG2] = (data & 0x70) << 9;
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return;
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}
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case 0x210c: {
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regs.bg_tdaddr[BG3] = (data & 0x07) << 13;
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regs.bg_tdaddr[BG4] = (data & 0x70) << 9;
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return;
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}
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case 0x2115: {
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regs.vram_incmode = data & 0x80;
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regs.vram_mapping = (data >> 2) & 3;
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switch(data & 3) {
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case 0: regs.vram_incsize = 1; break;
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case 1: regs.vram_incsize = 32; break;
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case 2: regs.vram_incsize = 128; break;
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case 3: regs.vram_incsize = 128; break;
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}
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return;
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}
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case 0x2116: {
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regs.vram_addr = (regs.vram_addr & 0xff00) | (data << 0);
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uint16 addr = get_vram_addr();
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regs.vram_readbuffer = vram_read(addr + 0) << 0;
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regs.vram_readbuffer |= vram_read(addr + 1) << 8;
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return;
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}
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case 0x2117: {
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regs.vram_addr = (data << 8) | (regs.vram_addr & 0x00ff);
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uint16 addr = get_vram_addr();
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regs.vram_readbuffer = vram_read(addr + 0) << 0;
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regs.vram_readbuffer |= vram_read(addr + 1) << 8;
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return;
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}
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case 0x2118: {
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uint16 addr = get_vram_addr() + 0;
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vram_write(addr, data);
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if(regs.vram_incmode == 0) regs.vram_addr += regs.vram_incsize;
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return;
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}
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case 0x2119: {
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uint16 addr = get_vram_addr() + 1;
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vram_write(addr, data);
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if(regs.vram_incmode == 1) regs.vram_addr += regs.vram_incsize;
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return;
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}
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case 0x2121: {
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regs.cgram_addr = data << 1;
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return;
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}
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case 0x2122: {
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if((regs.cgram_addr & 1) == 0) {
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regs.cgram_latchdata = data;
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} else {
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cgram_write((regs.cgram_addr & ~1) + 0, regs.cgram_latchdata);
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cgram_write((regs.cgram_addr & ~1) + 1, data & 0x7f);
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}
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regs.cgram_addr = (regs.cgram_addr + 1) & 0x01ff;
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return;
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}
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}
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}
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void PPU::mmio_reset() {
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//internal
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regs.width = 256;
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regs.height = 225;
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//$2100
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regs.display_disabled = true;
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regs.display_brightness = 0;
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//$2101
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regs.oam_basesize = 0;
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regs.oam_nameselect = 0;
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regs.oam_tdaddr = 0;
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//$2102-$2103
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regs.oam_baseaddr = 0;
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regs.oam_addr = 0;
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regs.oam_priority = 0;
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regs.oam_firstsprite = 0;
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//$2104
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regs.oam_latchdata = 0;
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//$2105
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for(unsigned i = 0; i < 4; i++) regs.bg_tilesize[i] = 0;
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regs.bg3_priority = 0;
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regs.bg_mode = 0;
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//$2106
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regs.mosaic_size = 0;
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for(unsigned i = 0; i < 4; i++) regs.mosaic_enabled[i] = 0;
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//$2107-$210a
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for(unsigned i = 0; i < 4; i++) regs.bg_scaddr[i] = 0;
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for(unsigned i = 0; i < 4; i++) regs.bg_scsize[i] = 0;
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//$210b-$210c
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for(unsigned i = 0; i < 4; i++) regs.bg_tdaddr[i] = 0;
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//$2115
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regs.vram_incmode = 0;
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regs.vram_mapping = 0;
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regs.vram_incsize = 0;
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//$2116-$2117
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regs.vram_addr = 0;
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//$2121
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regs.cgram_addr = 0;
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//$2122
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regs.cgram_latchdata = 0;
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//$2139-$213a
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regs.vram_readbuffer = 0;
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}
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#endif
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@ -0,0 +1,124 @@
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#include <snes.hpp>
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#define PPU_CPP
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namespace SNES {
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#if defined(DEBUGGER)
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#include "debugger/debugger.cpp"
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PPUDebugger ppu;
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#else
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PPU ppu;
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#endif
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#include "background.cpp"
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#include "memory.cpp"
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#include "mmio.cpp"
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#include "screen.cpp"
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void PPU::step(unsigned clocks) {
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clock += clocks;
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}
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void PPU::synchronize_cpu() {
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if(CPU::Threaded == true) {
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if(clock >= 0 && scheduler.sync != Scheduler::SynchronizeMode::All) co_switch(cpu.thread);
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} else {
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while(clock >= 0) cpu.enter();
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}
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}
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void PPU::Enter() { ppu.enter(); }
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void PPU::enter() {
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while(true) {
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if(scheduler.sync == Scheduler::SynchronizeMode::All) {
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scheduler.exit(Scheduler::ExitReason::SynchronizeEvent);
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}
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scanline();
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add_clocks(512);
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if(vcounter() < regs.height) render_scanline();
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add_clocks(lineclocks() - 512);
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}
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}
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|
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void PPU::add_clocks(unsigned clocks) {
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tick(clocks);
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step(clocks);
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synchronize_cpu();
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}
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void PPU::scanline() {
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if(vcounter() == 0) frame();
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regs.width = !hires() ? 256 : 512;
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regs.height = !overscan() ? 225 : 240;
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}
|
||||
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void PPU::frame() {
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system.frame();
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}
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||||
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void PPU::render_scanline() {
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screen_render();
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}
|
||||
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void PPU::power() {
|
||||
for(unsigned i = 0; i < memory::vram.size(); i++) memory::vram[i] = 0x00;
|
||||
for(unsigned i = 0; i < memory::oam.size(); i++) memory::oam[i] = 0x00;
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||||
for(unsigned i = 0; i < memory::cgram.size(); i++) memory::cgram[i] = 0x00;
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reset();
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||||
}
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||||
|
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void PPU::reset() {
|
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create(Enter, system.cpu_frequency());
|
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PPUcounter::reset();
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memset(surface, 0, 512 * 512 * sizeof(uint16));
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||||
|
||||
mmio_reset();
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||||
}
|
||||
|
||||
PPU::PPU() {
|
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surface = new uint16[512 * 512];
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output = surface + 16 * 512;
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||||
|
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light_table = new uint16*[16];
|
||||
for(unsigned l = 0; l < 16; l++) {
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||||
light_table[l] = new uint16[32768];
|
||||
for(unsigned r = 0; r < 32; r++) {
|
||||
for(unsigned g = 0; g < 32; g++) {
|
||||
for(unsigned b = 0; b < 32; b++) {
|
||||
double luma = (double)l / 15.0;
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unsigned ar = (luma * r + 0.5);
|
||||
unsigned ag = (luma * g + 0.5);
|
||||
unsigned ab = (luma * b + 0.5);
|
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light_table[l][(r << 10) + (g << 5) + (b << 0)] = (ab << 10) + (ag << 5) + (ar << 0);
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||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
PPU::~PPU() {
|
||||
delete[] surface;
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||||
}
|
||||
|
||||
bool PPU::interlace() const { return false; }
|
||||
bool PPU::overscan() const { return false; }
|
||||
bool PPU::hires() const { return false; }
|
||||
|
||||
void PPUcounter::serialize(serializer &s) {
|
||||
s.integer(status.interlace);
|
||||
s.integer(status.field);
|
||||
s.integer(status.vcounter);
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||||
s.integer(status.hcounter);
|
||||
|
||||
s.array(history.field);
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||||
s.array(history.vcounter);
|
||||
s.array(history.hcounter);
|
||||
s.integer(history.index);
|
||||
}
|
||||
|
||||
void PPU::serialize(serializer &s) {
|
||||
}
|
||||
|
||||
}
|
|
@ -0,0 +1,118 @@
|
|||
class PPU : public Processor, public PPUcounter, public MMIO {
|
||||
public:
|
||||
enum : bool { Threaded = true };
|
||||
alwaysinline void step(unsigned clocks);
|
||||
alwaysinline void synchronize_cpu();
|
||||
|
||||
void latch_counters();
|
||||
bool interlace() const;
|
||||
bool overscan() const;
|
||||
bool hires() const;
|
||||
|
||||
uint8 mmio_read(unsigned addr);
|
||||
void mmio_write(unsigned addr, uint8 data);
|
||||
|
||||
void enter();
|
||||
void power();
|
||||
void reset();
|
||||
|
||||
void serialize(serializer&);
|
||||
PPU();
|
||||
~PPU();
|
||||
|
||||
private:
|
||||
enum : unsigned { BG1 = 0, BG2 = 1, BG3 = 2, BG4 = 3, OAM = 4, COL = 5, BACK = 5 };
|
||||
uint16 *surface;
|
||||
uint16 *output;
|
||||
|
||||
//background.cpp
|
||||
|
||||
//memory.cpp
|
||||
uint16 get_vram_addr();
|
||||
uint8 vram_read(unsigned addr);
|
||||
void vram_write(unsigned addr, uint8 data);
|
||||
uint8 oam_read(unsigned addr);
|
||||
void oam_write(unsigned addr, uint8 data);
|
||||
uint8 cgram_read(unsigned addr);
|
||||
void cgram_write(unsigned addr, uint8 data);
|
||||
|
||||
//mmio.cpp
|
||||
struct Regs {
|
||||
//internal
|
||||
unsigned width;
|
||||
unsigned height;
|
||||
|
||||
//$2100
|
||||
bool display_disabled;
|
||||
unsigned display_brightness;
|
||||
|
||||
//$2101
|
||||
unsigned oam_basesize;
|
||||
unsigned oam_nameselect;
|
||||
uint16 oam_tdaddr;
|
||||
|
||||
//$2102-$2103
|
||||
uint16 oam_baseaddr;
|
||||
uint16 oam_addr;
|
||||
bool oam_priority;
|
||||
unsigned oam_firstsprite;
|
||||
|
||||
//$2104
|
||||
uint8 oam_latchdata;
|
||||
|
||||
//$2105
|
||||
bool bg_tilesize[4];
|
||||
bool bg3_priority;
|
||||
unsigned bg_mode;
|
||||
|
||||
//$2106
|
||||
unsigned mosaic_size;
|
||||
bool mosaic_enabled[4];
|
||||
|
||||
//$2107-$210a
|
||||
uint16 bg_scaddr[4];
|
||||
unsigned bg_scsize[4];
|
||||
|
||||
//$210b-$210c
|
||||
uint16 bg_tdaddr[4];
|
||||
|
||||
//$2115
|
||||
bool vram_incmode;
|
||||
unsigned vram_mapping;
|
||||
unsigned vram_incsize;
|
||||
|
||||
//$2116-$2117
|
||||
uint16 vram_addr;
|
||||
|
||||
//$2121
|
||||
uint16 cgram_addr;
|
||||
|
||||
//$2122
|
||||
uint8 cgram_latchdata;
|
||||
|
||||
//$2139-$213a
|
||||
uint16 vram_readbuffer;
|
||||
} regs;
|
||||
|
||||
void mmio_reset();
|
||||
|
||||
//ppu.cpp
|
||||
static void Enter();
|
||||
void add_clocks(unsigned clocks);
|
||||
void scanline();
|
||||
void frame();
|
||||
void render_scanline();
|
||||
|
||||
//screen.cpp
|
||||
uint16 **light_table;
|
||||
void screen_render();
|
||||
|
||||
friend class Video;
|
||||
};
|
||||
|
||||
#if defined(DEBUGGER)
|
||||
#include "debugger/debugger.hpp"
|
||||
extern PPUDebugger ppu;
|
||||
#else
|
||||
extern PPU ppu;
|
||||
#endif
|
|
@ -0,0 +1,17 @@
|
|||
#ifdef PPU_CPP
|
||||
|
||||
void PPU::screen_render() {
|
||||
uint16 *data = output + vcounter() * 1024;
|
||||
if(regs.display_disabled) {
|
||||
memset(data, 0x00, regs.width << 1);
|
||||
return;
|
||||
}
|
||||
|
||||
uint16 *table = light_table[regs.display_brightness];
|
||||
uint16 color = memory::cgram[0];
|
||||
color |= memory::cgram[1] << 8;
|
||||
color = table[color];
|
||||
for(unsigned i = 0; i < 256; i++) data[i] = color;
|
||||
}
|
||||
|
||||
#endif
|
|
@ -7,17 +7,15 @@ void PPU::Background::frame() {
|
|||
|
||||
void PPU::Background::scanline() {
|
||||
if(self.vcounter() == 1) {
|
||||
t.mosaic_y = regs.mosaic ? 1 : 0; //TODO: this is most likely incorrect
|
||||
t.mosaic_vcounter = 0;
|
||||
}
|
||||
|
||||
if(t.mosaic_vcounter++ == regs.mosaic) {
|
||||
t.mosaic_vcounter = 0;
|
||||
t.mosaic_vcounter = regs.mosaic + 1;
|
||||
t.mosaic_y = 1;
|
||||
} else if(--t.mosaic_vcounter == 0) {
|
||||
t.mosaic_vcounter = regs.mosaic + 1;
|
||||
t.mosaic_y += regs.mosaic + 1;
|
||||
}
|
||||
|
||||
t.mosaic_x = 0;
|
||||
t.mosaic_hcounter = 0;
|
||||
t.mosaic_hcounter = regs.mosaic + 1;
|
||||
}
|
||||
|
||||
void PPU::Background::run() {
|
||||
|
@ -36,8 +34,8 @@ void PPU::Background::run() {
|
|||
|
||||
unsigned x = t.mosaic_x;
|
||||
unsigned y = t.mosaic_y;
|
||||
if(t.mosaic_hcounter++ == regs.mosaic) {
|
||||
t.mosaic_hcounter = 0;
|
||||
if(--t.mosaic_hcounter == 0) {
|
||||
t.mosaic_hcounter = regs.mosaic + 1;
|
||||
t.mosaic_x += regs.mosaic + 1;
|
||||
}
|
||||
if(regs.mode == Mode::Mode7) return run_mode7();
|
||||
|
|
|
@ -4,5 +4,5 @@ namespace Info {
|
|||
|
||||
#include <cpu/cpu.hpp>
|
||||
#include <smp/smp.hpp>
|
||||
#include <fast/dsp/dsp.hpp>
|
||||
#include <fast/ppu/ppu.hpp>
|
||||
#include <alternative/dsp/dsp.hpp>
|
||||
#include <alternative/ppu/ppu.hpp>
|
||||
|
|
|
@ -2,7 +2,7 @@ namespace Info {
|
|||
static const char Profile[] = "Performance";
|
||||
}
|
||||
|
||||
#include <fast/cpu/cpu.hpp>
|
||||
#include <alternative/cpu/cpu.hpp>
|
||||
#include <smp/smp.hpp>
|
||||
#include <fast/dsp/dsp.hpp>
|
||||
#include <fast/ppu/ppu.hpp>
|
||||
#include <alternative/dsp/dsp.hpp>
|
||||
#include <alternative/ppu-fast/ppu.hpp>
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
namespace SNES {
|
||||
namespace Info {
|
||||
static const char Name[] = "bsnes";
|
||||
static const char Version[] = "068.02";
|
||||
static const char Version[] = "068.04";
|
||||
static const unsigned SerializerVersion = 13;
|
||||
}
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue