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On CGB, the VBlank and STAT interrupts are “delayed” by one T-cycle (relative to IF) since they’re not aligned to a T-Cycle
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@ -300,7 +300,7 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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uint8_t vram_blocking_rush = gb->is_cgb? 0 : 4;
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uint8_t vram_blocking_rush = gb->is_cgb? 0 : 4;
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for (; cycles; cycles -= atomic_increase) {
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for (; cycles; cycles -= atomic_increase) {
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gb->delayed_interrupts &= ~3;
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gb->display_cycles += atomic_increase;
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gb->display_cycles += atomic_increase;
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/* The very first line is 4 clocks shorter when the LCD turns on. Verified on SGB2, CGB in CGB mode and
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/* The very first line is 4 clocks shorter when the LCD turns on. Verified on SGB2, CGB in CGB mode and
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CGB in double speed mode. */
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CGB in double speed mode. */
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@ -344,6 +344,10 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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gb->io_registers[GB_IO_STAT] &= ~3;
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gb->io_registers[GB_IO_STAT] &= ~3;
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gb->io_registers[GB_IO_STAT] |= 1;
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gb->io_registers[GB_IO_STAT] |= 1;
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gb->io_registers[GB_IO_IF] |= 1;
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gb->io_registers[GB_IO_IF] |= 1;
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if (gb->is_cgb) {
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/* See comment on STAT interrupt at the end of the loop */
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gb->delayed_interrupts |= 1;
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}
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/* Entering VBlank state triggers the OAM interrupt. In CGB, it happens 4 cycles earlier */
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/* Entering VBlank state triggers the OAM interrupt. In CGB, it happens 4 cycles earlier */
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if (gb->io_registers[GB_IO_STAT] & 0x20 && !gb->is_cgb) {
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if (gb->io_registers[GB_IO_STAT] & 0x20 && !gb->is_cgb) {
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@ -559,6 +563,12 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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if (gb->stat_interrupt_line && !previous_stat_interrupt_line) {
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if (gb->stat_interrupt_line && !previous_stat_interrupt_line) {
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gb->io_registers[GB_IO_IF] |= 2;
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gb->io_registers[GB_IO_IF] |= 2;
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if (gb->is_cgb) {
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/* On CGB, the STAT interrupt is not aligned to a T-Cycle, therefore it is only effective the next T-Cycle
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Todo: verify on DMG mode CGB. This was only tested on LYC STAT interrupts, should be tested on others
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as well. */
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gb->delayed_interrupts |= 2;
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}
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}
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}
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#if 0
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#if 0
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