mirror of https://github.com/bsnes-emu/bsnes.git
Update to v101r01 release.
byuu says: Changelog: - added eight more 68K instructions - split ADD(direction) into two separate ADD functions I now have 54 out of 88 instructions implemented (thus, 34 remaining.) The map is missing 25,182 entries out of 65,536. Down from 32,680 for v101.00 Aside: this version number feels really silly. r10 and r11 surely will as well ...
This commit is contained in:
Tim Allen
parent
e39987a3e3
commit
8bdf8f2a55
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@ -11,7 +11,7 @@ using namespace nall;
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namespace Emulator {
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static const string Name = "higan";
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static const string Version = "101";
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static const string Version = "101.01";
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static const string Author = "byuu";
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static const string License = "GPLv3";
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static const string Website = "http://byuu.org/";
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@ -3,6 +3,8 @@
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namespace Emulator {
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struct Thread {
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enum : uintmax { Second = (uintmax)1 << (8 * sizeof(uintmax) - 1) };
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virtual ~Thread() {
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if(_handle) co_delete(_handle);
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}
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@ -15,7 +17,7 @@ struct Thread {
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auto setFrequency(double frequency) -> void {
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_frequency = frequency + 0.5;
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_scalar = ((uintmax)1 << (8 * sizeof(uintmax) - 1)) / _frequency;
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_scalar = Second / _frequency;
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}
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auto setScalar(uintmax scalar) -> void {
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@ -30,6 +32,7 @@ struct Thread {
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if(_handle) co_delete(_handle);
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_handle = co_create(64 * 1024 * sizeof(void*), entrypoint);
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setFrequency(frequency);
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setClock(0);
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}
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inline auto step(uint clocks) -> void {
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@ -90,14 +90,12 @@ auto M68K::disassembleRegisters() -> string {
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//
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template<uint Size> auto M68K::disassembleADD(DataRegister dr, uint1 direction, EffectiveAddress ea) -> string {
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string op{"add", _suffix<Size>(), " "};
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template<uint Size> auto M68K::disassembleADD(EffectiveAddress from, DataRegister with) -> string {
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return {"add", _suffix<Size>(), " ", _effectiveAddress<Size>(from), ",", _dataRegister(with)};
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}
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if(direction == 0) {
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return {op, _effectiveAddress<Size>(ea), ",", _dataRegister(dr)};
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} else {
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return {op, "", _dataRegister(dr), ",", _effectiveAddress<Size>(ea)};
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}
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template<uint Size> auto M68K::disassembleADD(DataRegister from, EffectiveAddress with) -> string {
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return {"add", _suffix<Size>(), " ", _dataRegister(from), ",", _effectiveAddress<Size>(with)};
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}
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template<uint Size> auto M68K::disassembleADDA(AddressRegister ar, EffectiveAddress ea) -> string {
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@ -116,6 +114,14 @@ template<uint Size> auto M68K::disassembleADDX(EffectiveAddress target, Effectiv
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return {"addx", _suffix<Size>(), " ", _effectiveAddress<Size>(target), ",", _effectiveAddress<Size>(source)};
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}
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template<uint Size> auto M68K::disassembleAND(EffectiveAddress from, DataRegister with) -> string {
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return {"and", _suffix<Size>(), " ", _effectiveAddress<Size>(from), ",", _dataRegister(with)};
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}
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template<uint Size> auto M68K::disassembleAND(DataRegister from, EffectiveAddress with) -> string {
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return {"and", _suffix<Size>(), " ", _dataRegister(from), ",", _effectiveAddress<Size>(with)};
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}
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template<uint Size> auto M68K::disassembleANDI(EffectiveAddress ea) -> string {
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return {"andi", _suffix<Size>(), " ", _immediate<Size>(), ",", _effectiveAddress<Size>(ea)};
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}
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@ -193,6 +199,14 @@ auto M68K::disassembleDBCC(uint4 condition, DataRegister dr) -> string {
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return {"db", _condition(condition), " ", _dataRegister(dr), ",$", hex(base + displacement, 6L)};
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}
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template<uint Size> auto M68K::disassembleEOR(DataRegister from, EffectiveAddress with) -> string {
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return {"eor", _suffix<Size>(), " ", _dataRegister(from), ",", _effectiveAddress<Size>(with)};
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}
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template<uint Size> auto M68K::disassembleEORI(EffectiveAddress with) -> string {
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return {"eori", _suffix<Size>(), " ", _immediate<Size>(), ",", _effectiveAddress<Size>(with)};
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}
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auto M68K::disassembleEORI_TO_CCR() -> string {
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return {"eori ", _immediate<Byte>(), ",ccr"};
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}
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@ -287,6 +301,18 @@ auto M68K::disassembleNOP() -> string {
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return {"nop "};
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}
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template<uint Size> auto M68K::disassembleOR(EffectiveAddress from, DataRegister with) -> string {
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return {"eor", _suffix<Size>(), " ", _effectiveAddress<Size>(from), ",", _dataRegister(with)};
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}
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template<uint Size> auto M68K::disassembleOR(DataRegister from, EffectiveAddress with) -> string {
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return {"eor", _suffix<Size>(), " ", _dataRegister(from), ",", _effectiveAddress<Size>(with)};
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}
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template<uint Size> auto M68K::disassembleORI(EffectiveAddress with) -> string {
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return {"ori", _suffix<Size>(), " ", _immediate<Size>(), ",", _effectiveAddress<Size>(with)};
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}
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auto M68K::disassembleORI_TO_CCR() -> string {
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return {"ori ", _immediate<Byte>(), ",ccr"};
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}
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@ -355,10 +381,22 @@ template<uint Size> auto M68K::disassembleSUB(DataRegister source, EffectiveAddr
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return {"sub", _suffix<Size>(), " ", _dataRegister(source), ",", _effectiveAddress<Size>(target)};
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}
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template<uint Size> auto M68K::disassembleSUBA(AddressRegister to, EffectiveAddress from) -> string {
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return {"suba", _suffix<Size>(), " ", _addressRegister(to), ",", _effectiveAddress<Size>(from)};
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}
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template<uint Size> auto M68K::disassembleSUBI(EffectiveAddress with) -> string {
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return {"subi", _suffix<Size>(), " ", _immediate<Size>(), ",", _effectiveAddress<Size>(with)};
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}
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template<uint Size> auto M68K::disassembleSUBQ(uint4 immediate, EffectiveAddress ea) -> string {
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return {"subq", _suffix<Size>(), " #", immediate, _effectiveAddress<Size>(ea)};
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}
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template<uint Size> auto M68K::disassembleSUBX(EffectiveAddress with, EffectiveAddress from) -> string {
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return {"subx", _suffix<Size>(), " ", _effectiveAddress<Size>(with), ",", _effectiveAddress<Size>(from)};
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}
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template<uint Size> auto M68K::disassembleTST(EffectiveAddress ea) -> string {
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return {"tst", _suffix<Size>(), " ", _effectiveAddress<Size>(ea)};
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}
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@ -37,20 +37,33 @@ M68K::M68K() {
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std::integral_constant<uint16_t, bit::test(s)>::value
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//ADD
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for(uint3 dreg : range(8))
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for(uint1 direction : range(2))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("1101 ---- ++-- ----") | dreg << 9 | direction << 8 | mode << 3 | reg << 0;
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if(direction == 1 && (mode == 0 || mode == 1 || (mode == 7 && reg >= 2))) continue;
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for(uint3 dreg : range(8))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("1101 ---0 ++-- ----") | dreg << 9 | mode << 3 | reg << 0;
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if(mode == 7 && reg >= 5) continue;
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DataRegister dr{dreg};
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EffectiveAddress ea{mode, reg};
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bind(opcode | 0 << 6, ADD<Byte>, dr, direction, ea);
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bind(opcode | 1 << 6, ADD<Word>, dr, direction, ea);
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bind(opcode | 2 << 6, ADD<Long>, dr, direction, ea);
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EffectiveAddress from{mode, reg};
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DataRegister with{dreg};
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bind(opcode | 0 << 6, ADD<Byte>, from, with);
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bind(opcode | 1 << 6, ADD<Word>, from, with);
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bind(opcode | 2 << 6, ADD<Long>, from, with);
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if(direction == 0 && mode == 1) unbind(opcode | 0 << 6);
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if(mode == 1) unbind(opcode | 0 << 6);
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}
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//ADD
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for(uint3 dreg : range(8))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("1101 ---1 ++-- ----") | dreg << 9 | mode << 3 | reg << 0;
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if(mode <= 1 || (mode == 7 && reg >= 2)) continue;
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DataRegister from{dreg};
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EffectiveAddress with{mode, reg};
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bind(opcode | 0 << 6, ADD<Byte>, from, with);
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bind(opcode | 1 << 6, ADD<Word>, from, with);
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bind(opcode | 2 << 6, ADD<Long>, from, with);
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}
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//ADDA
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@ -112,6 +125,34 @@ M68K::M68K() {
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bind(opcode | 2 << 6 | 1 << 3, ADDX<Long>, addressTarget, addressSource);
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}
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//AND
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for(uint3 dreg : range(8))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("1100 ---0 ++-- ----") | dreg << 9 | mode << 3 | reg << 0;
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if(mode == 1 || (mode == 7 && reg >= 5)) continue;
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EffectiveAddress from{mode, reg};
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DataRegister with{dreg};
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bind(opcode | 0 << 6, AND<Byte>, from, with);
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bind(opcode | 1 << 6, AND<Word>, from, with);
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bind(opcode | 2 << 6, AND<Long>, from, with);
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}
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//AND
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for(uint3 dreg : range(8))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("1100 ---1 ++-- ----") | dreg << 9 | mode << 3 | reg << 0;
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if(mode <= 1 || (mode == 7 && reg >= 2)) continue;
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DataRegister from{dreg};
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EffectiveAddress with{mode, reg};
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bind(opcode | 0 << 6, AND<Byte>, from, with);
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bind(opcode | 1 << 6, AND<Word>, from, with);
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bind(opcode | 2 << 6, AND<Long>, from, with);
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}
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//ANDI
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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@ -309,6 +350,32 @@ M68K::M68K() {
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bind(opcode, DBCC, condition, dr);
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}
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//EOR
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for(uint3 dreg : range(8))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("1011 ---1 ++-- ----") | dreg << 9 | mode << 3 | reg << 0;
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if(mode == 1 || (mode == 7 && reg >= 2)) continue;
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DataRegister from{dreg};
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EffectiveAddress with{mode, reg};
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bind(opcode | 0 << 6, EOR<Byte>, from, with);
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bind(opcode | 1 << 6, EOR<Word>, from, with);
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bind(opcode | 2 << 6, EOR<Long>, from, with);
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}
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//EORI
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("0000 1010 ++-- ----") | mode << 3 | reg << 0;
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if(mode == 1 || (mode == 7 && reg >= 2)) continue;
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EffectiveAddress with{mode, reg};
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bind(opcode | 0 << 6, EORI<Byte>, with);
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bind(opcode | 1 << 6, EORI<Word>, with);
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bind(opcode | 2 << 6, EORI<Long>, with);
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}
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//EORI_TO_CCR
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{ auto opcode = pattern("0000 1010 0011 1100");
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@ -509,6 +576,46 @@ M68K::M68K() {
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bind(opcode, NOP);
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}
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//OR
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for(uint3 dreg : range(8))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("1000 ---0 ++-- ----") | dreg << 9 | mode << 3 | reg << 0;
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if(mode == 1 || (mode == 7 && reg >= 5)) continue;
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EffectiveAddress from{mode, reg};
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DataRegister with{dreg};
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bind(opcode | 0 << 6, OR<Byte>, from, with);
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bind(opcode | 1 << 6, OR<Word>, from, with);
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bind(opcode | 2 << 6, OR<Long>, from, with);
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}
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//OR
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for(uint3 dreg : range(8))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("1000 ---1 ++-- ----") | dreg << 9 | mode << 3 | reg << 0;
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if(mode <= 1 || (mode == 7 && reg >= 2)) continue;
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DataRegister from{dreg};
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EffectiveAddress with{mode, reg};
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bind(opcode | 0 << 6, OR<Byte>, from, with);
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bind(opcode | 1 << 6, OR<Word>, from, with);
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bind(opcode | 2 << 6, OR<Long>, from, with);
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}
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//ORI
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("0000 0000 ++-- ----") | mode << 3 | reg << 0;
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if(mode == 1 || (mode == 7 && reg >= 2)) continue;
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EffectiveAddress with{mode, reg};
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bind(opcode | 0 << 6, ORI<Byte>, with);
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bind(opcode | 1 << 6, ORI<Word>, with);
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bind(opcode | 2 << 6, ORI<Long>, with);
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}
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//ORI_TO_CCR
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{ auto opcode = pattern("0000 0000 0011 1100");
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@ -693,6 +800,31 @@ M68K::M68K() {
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bind(opcode | 2 << 6, SUB<Long>, source, target);
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}
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//SUBA
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for(uint3 areg : range(8))
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("1001 ---+ 11-- ----") | areg << 9 | mode << 3 | reg << 0;
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if(mode == 7 && reg >= 5) continue;
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AddressRegister to{areg};
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EffectiveAddress from{mode, reg};
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bind(opcode | 0 << 8, SUBA<Word>, to, from);
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bind(opcode | 1 << 8, SUBA<Long>, to, from);
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}
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//SUBI
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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auto opcode = pattern("0000 0100 ++-- ----") | mode << 3 | reg << 0;
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if(mode == 1 || (mode == 7 && reg >= 2)) continue;
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EffectiveAddress with{mode, reg};
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bind(opcode | 0 << 6, SUBI<Byte>, with);
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bind(opcode | 1 << 6, SUBI<Word>, with);
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bind(opcode | 2 << 6, SUBI<Long>, with);
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}
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//SUBQ
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for(uint3 data : range(8))
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for(uint3 mode : range(8))
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@ -709,6 +841,24 @@ M68K::M68K() {
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if(mode == 1) unbind(opcode | 0 << 6);
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}
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//SUBX
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for(uint3 treg : range(8))
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for(uint3 sreg : range(8)) {
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auto opcode = pattern("1001 ---1 ++00 ----") | treg << 9 | sreg << 0;
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EffectiveAddress dataTarget{DataRegisterDirect, treg};
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EffectiveAddress dataSource{DataRegisterDirect, sreg};
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bind(opcode | 0 << 6 | 0 << 3, SUBX<Byte>, dataTarget, dataSource);
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bind(opcode | 1 << 6 | 0 << 3, SUBX<Word>, dataTarget, dataSource);
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bind(opcode | 2 << 6 | 0 << 3, SUBX<Long>, dataTarget, dataSource);
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EffectiveAddress addressTarget{AddressRegisterIndirectWithPreDecrement, treg};
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EffectiveAddress addressSource{AddressRegisterIndirectWithPreDecrement, sreg};
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bind(opcode | 0 << 6 | 1 << 3, SUBX<Byte>, addressTarget, addressSource);
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bind(opcode | 1 << 6 | 1 << 3, SUBX<Word>, addressTarget, addressSource);
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bind(opcode | 2 << 6 | 1 << 3, SUBX<Long>, addressTarget, addressSource);
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}
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//TST
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for(uint3 mode : range(8))
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for(uint3 reg : range(8)) {
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@ -72,18 +72,24 @@ template<uint Size, bool Extend> auto M68K::ADD(uint32 source, uint32 target) ->
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return clip<Size>(result);
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}
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template<uint Size> auto M68K::instructionADD(DataRegister dr, uint1 direction, EffectiveAddress ea) -> void {
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if(direction == 0) {
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auto source = read<Size>(ea);
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auto target = read<Size>(dr);
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auto result = ADD<Size>(source, target);
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write<Size>(dr, result);
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} else {
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auto source = read<Size>(dr);
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auto target = read<Size>(ea);
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auto result = ADD<Size>(source, target);
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write<Size>(ea, result);
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}
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template<uint Size> auto M68K::instructionADD(EffectiveAddress from, DataRegister with) -> void {
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auto source = read<Size>(from);
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auto target = read<Size>(with);
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auto result = ADD<Size>(source, target);
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write<Size>(with, result);
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}
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template<uint Size> auto M68K::instructionADD(DataRegister from, EffectiveAddress with) -> void {
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auto source = read<Size>(from);
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auto target = read<Size>(with);
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auto result = ADD<Size>(source, target);
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write<Size>(with, result);
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}
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template<uint Size> auto M68K::instructionADDA(AddressRegister ar, EffectiveAddress ea) -> void {
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auto source = read<Size>(ea);
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auto target = read<Size>(ar);
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write<Long>(ar, source + target);
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}
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template<uint Size> auto M68K::instructionADDI(EffectiveAddress modify) -> void {
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@ -93,12 +99,6 @@ template<uint Size> auto M68K::instructionADDI(EffectiveAddress modify) -> void
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write<Size>(modify, result);
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}
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template<uint Size> auto M68K::instructionADDA(AddressRegister ar, EffectiveAddress ea) -> void {
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auto source = read<Size>(ea);
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auto target = read<Size>(ar);
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write<Long>(ar, source + target);
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}
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template<uint Size> auto M68K::instructionADDQ(uint4 immediate, EffectiveAddress modify) -> void {
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auto source = read<Size>(modify);
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auto target = immediate;
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@ -113,10 +113,35 @@ template<uint Size> auto M68K::instructionADDX(EffectiveAddress target_, Effecti
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write<Size>(target, result);
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}
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|
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template<uint Size> auto M68K::AND(uint32 source, uint32 target) -> uint32 {
|
||||
uint32 result = target & source;
|
||||
|
||||
r.c = 0;
|
||||
r.v = 0;
|
||||
r.z = clip<Size>(result) == 0;
|
||||
r.n = sign<Size>(result) < 0;
|
||||
|
||||
return clip<Size>(result);
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::instructionAND(EffectiveAddress from, DataRegister with) -> void {
|
||||
auto source = read<Size>(from);
|
||||
auto target = read<Size>(with);
|
||||
auto result = AND<Size>(source, target);
|
||||
write<Size>(with, result);
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::instructionAND(DataRegister from, EffectiveAddress with) -> void {
|
||||
auto source = read<Size>(from);
|
||||
auto target = read<Size>(with);
|
||||
auto result = AND<Size>(source, target);
|
||||
write<Size>(with, result);
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::instructionANDI(EffectiveAddress ea) -> void {
|
||||
auto source = readPC<Size>();
|
||||
auto target = read<Size, NoUpdate>(ea);
|
||||
auto result = target & source;
|
||||
auto result = AND<Size>(source, target);
|
||||
write<Size>(ea, result);
|
||||
|
||||
r.c = 0;
|
||||
|
|
@ -288,6 +313,31 @@ auto M68K::instructionDBCC(uint4 condition, DataRegister dr) -> void {
|
|||
}
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::EOR(uint32 source, uint32 target) -> uint32 {
|
||||
uint32 result = target ^ source;
|
||||
|
||||
r.c = 0;
|
||||
r.v = 0;
|
||||
r.z = clip<Size>(result) == 0;
|
||||
r.n = sign<Size>(result) < 0;
|
||||
|
||||
return clip<Size>(result);
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::instructionEOR(DataRegister from, EffectiveAddress with) -> void {
|
||||
auto source = read<Size>(from);
|
||||
auto target = read<Size>(with);
|
||||
auto result = EOR<Size>(source, target);
|
||||
write<Size>(with, result);
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::instructionEORI(EffectiveAddress with) -> void {
|
||||
auto source = readPC<Size>();
|
||||
auto target = read<Size, NoUpdate>(with);
|
||||
auto result = EOR<Size>(source, target);
|
||||
write<Size>(with, result);
|
||||
}
|
||||
|
||||
auto M68K::instructionEORI_TO_CCR() -> void {
|
||||
auto data = readPC<Word>();
|
||||
writeCCR(readCCR() ^ data);
|
||||
|
|
@ -454,6 +504,38 @@ auto M68K::instructionMOVE_USP(uint1 direction, AddressRegister ar) -> void {
|
|||
auto M68K::instructionNOP() -> void {
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::OR(uint32 source, uint32 target) -> uint32 {
|
||||
auto result = target | source;
|
||||
|
||||
r.c = 0;
|
||||
r.v = 0;
|
||||
r.z = clip<Size>(result) == 0;
|
||||
r.n = sign<Size>(result) < 0;
|
||||
|
||||
return clip<Size>(result);
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::instructionOR(EffectiveAddress from, DataRegister with) -> void {
|
||||
auto source = read<Size>(from);
|
||||
auto target = read<Size>(with);
|
||||
auto result = OR<Size>(source, target);
|
||||
write<Size>(with, result);
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::instructionOR(DataRegister from, EffectiveAddress with) -> void {
|
||||
auto source = read<Size>(from);
|
||||
auto target = read<Size>(with);
|
||||
auto result = OR<Size>(source, target);
|
||||
write<Size>(with, result);
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::instructionORI(EffectiveAddress with) -> void {
|
||||
auto source = readPC<Size>();
|
||||
auto target = read<Size, NoUpdate>(with);
|
||||
auto result = OR<Size>(source, target);
|
||||
write<Size>(with, result);
|
||||
}
|
||||
|
||||
auto M68K::instructionORI_TO_CCR() -> void {
|
||||
auto data = readPC<Word>();
|
||||
writeCCR(readCCR() | data);
|
||||
|
|
@ -628,6 +710,19 @@ template<uint Size> auto M68K::instructionSUB(DataRegister source_, EffectiveAdd
|
|||
write<Size>(target_, result);
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::instructionSUBA(AddressRegister to, EffectiveAddress from) -> void {
|
||||
auto source = read<Size>(from);
|
||||
auto target = read<Size>(to);
|
||||
write<Long>(to, target - source);
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::instructionSUBI(EffectiveAddress with) -> void {
|
||||
auto source = readPC<Size>();
|
||||
auto target = read<Size>(with);
|
||||
auto result = SUB<Size>(source, target);
|
||||
write<Size>(with, result);
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::instructionSUBQ(uint4 immediate, EffectiveAddress ea) -> void {
|
||||
auto source = immediate;
|
||||
auto target = read<Size, NoUpdate>(ea);
|
||||
|
|
@ -635,6 +730,13 @@ template<uint Size> auto M68K::instructionSUBQ(uint4 immediate, EffectiveAddress
|
|||
write<Size>(ea, result);
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::instructionSUBX(EffectiveAddress with, EffectiveAddress from) -> void {
|
||||
auto source = read<Size>(from);
|
||||
auto target = read<Size>(with);
|
||||
auto result = SUB<Size, Extend>(source, target);
|
||||
write<Size>(with, result);
|
||||
}
|
||||
|
||||
template<uint Size> auto M68K::instructionTST(EffectiveAddress ea) -> void {
|
||||
auto data = read<Size>(ea);
|
||||
|
||||
|
|
|
|||
|
|
@ -98,11 +98,15 @@ struct M68K {
|
|||
template<uint Size> auto negative(uint32 result) -> bool;
|
||||
|
||||
template<uint Size, bool Extend = false> auto ADD(uint32 source, uint32 target) -> uint32;
|
||||
template<uint Size> auto instructionADD(DataRegister dr, uint1 direction, EffectiveAddress ea) -> void;
|
||||
template<uint Size> auto instructionADD(EffectiveAddress from, DataRegister with) -> void;
|
||||
template<uint Size> auto instructionADD(DataRegister from, EffectiveAddress with) -> void;
|
||||
template<uint Size> auto instructionADDA(AddressRegister ar, EffectiveAddress ea) -> void;
|
||||
template<uint Size> auto instructionADDI(EffectiveAddress modify) -> void;
|
||||
template<uint Size> auto instructionADDQ(uint4 immediate, EffectiveAddress modify) -> void;
|
||||
template<uint Size> auto instructionADDX(EffectiveAddress target, EffectiveAddress source) -> void;
|
||||
template<uint Size> auto AND(uint32 source, uint32 target) -> uint32;
|
||||
template<uint Size> auto instructionAND(EffectiveAddress from, DataRegister with) -> void;
|
||||
template<uint Size> auto instructionAND(DataRegister from, EffectiveAddress with) -> void;
|
||||
template<uint Size> auto instructionANDI(EffectiveAddress ea) -> void;
|
||||
auto instructionANDI_TO_CCR() -> void;
|
||||
auto instructionANDI_TO_SR() -> void;
|
||||
|
|
@ -124,6 +128,9 @@ struct M68K {
|
|||
template<uint Size> auto instructionCMPI(EffectiveAddress ea) -> void;
|
||||
template<uint Size> auto instructionCMPM(EffectiveAddress ax, EffectiveAddress ay) -> void;
|
||||
auto instructionDBCC(uint4 condition, DataRegister dr) -> void;
|
||||
template<uint Size> auto EOR(uint32 source, uint32 target) -> uint32;
|
||||
template<uint Size> auto instructionEOR(DataRegister from, EffectiveAddress with) -> void;
|
||||
template<uint Size> auto instructionEORI(EffectiveAddress with) -> void;
|
||||
auto instructionEORI_TO_CCR() -> void;
|
||||
auto instructionEORI_TO_SR() -> void;
|
||||
auto instructionJSR(EffectiveAddress target) -> void;
|
||||
|
|
@ -145,6 +152,10 @@ struct M68K {
|
|||
auto instructionMOVE_TO_SR(EffectiveAddress ea) -> void;
|
||||
auto instructionMOVE_USP(uint1 direction, AddressRegister ar) -> void;
|
||||
auto instructionNOP() -> void;
|
||||
template<uint Size> auto OR(uint32 source, uint32 target) -> uint32;
|
||||
template<uint Size> auto instructionOR(EffectiveAddress from, DataRegister with) -> void;
|
||||
template<uint Size> auto instructionOR(DataRegister from, EffectiveAddress with) -> void;
|
||||
template<uint Size> auto instructionORI(EffectiveAddress with) -> void;
|
||||
auto instructionORI_TO_CCR() -> void;
|
||||
auto instructionORI_TO_SR() -> void;
|
||||
template<uint Size> auto ROL(uint32 result, uint shift) -> uint32;
|
||||
|
|
@ -167,7 +178,10 @@ struct M68K {
|
|||
template<uint Size, bool Extend = false> auto SUB(uint32 source, uint32 target) -> uint32;
|
||||
template<uint Size> auto instructionSUB(EffectiveAddress source, DataRegister target) -> void;
|
||||
template<uint Size> auto instructionSUB(DataRegister source, EffectiveAddress target) -> void;
|
||||
template<uint Size> auto instructionSUBA(AddressRegister to, EffectiveAddress from) -> void;
|
||||
template<uint Size> auto instructionSUBI(EffectiveAddress with) -> void;
|
||||
template<uint Size> auto instructionSUBQ(uint4 immediate, EffectiveAddress ea) -> void;
|
||||
template<uint Size> auto instructionSUBX(EffectiveAddress with, EffectiveAddress from) -> void;
|
||||
template<uint Size> auto instructionTST(EffectiveAddress ea) -> void;
|
||||
|
||||
//disassembler.cpp
|
||||
|
|
@ -197,11 +211,14 @@ struct M68K {
|
|||
|
||||
private:
|
||||
//disassembler.cpp
|
||||
template<uint Size> auto disassembleADD(DataRegister dr, uint1 direction, EffectiveAddress ea) -> string;
|
||||
template<uint Size> auto disassembleADD(EffectiveAddress from, DataRegister with) -> string;
|
||||
template<uint Size> auto disassembleADD(DataRegister from, EffectiveAddress with) -> string;
|
||||
template<uint Size> auto disassembleADDA(AddressRegister ar, EffectiveAddress ea) -> string;
|
||||
template<uint Size> auto disassembleADDI(EffectiveAddress modify) -> string;
|
||||
template<uint Size> auto disassembleADDQ(uint4 immediate, EffectiveAddress modify) -> string;
|
||||
template<uint Size> auto disassembleADDX(EffectiveAddress target, EffectiveAddress source) -> string;
|
||||
template<uint Size> auto disassembleAND(EffectiveAddress from, DataRegister with) -> string;
|
||||
template<uint Size> auto disassembleAND(DataRegister from, EffectiveAddress with) -> string;
|
||||
template<uint Size> auto disassembleANDI(EffectiveAddress ea) -> string;
|
||||
auto disassembleANDI_TO_CCR() -> string;
|
||||
auto disassembleANDI_TO_SR() -> string;
|
||||
|
|
@ -220,6 +237,8 @@ private:
|
|||
template<uint Size> auto disassembleCMPI(EffectiveAddress ea) -> string;
|
||||
template<uint Size> auto disassembleCMPM(EffectiveAddress ax, EffectiveAddress ay) -> string;
|
||||
auto disassembleDBCC(uint4 condition, DataRegister dr) -> string;
|
||||
template<uint Size> auto disassembleEOR(DataRegister from, EffectiveAddress with) -> string;
|
||||
template<uint Size> auto disassembleEORI(EffectiveAddress with) -> string;
|
||||
auto disassembleEORI_TO_CCR() -> string;
|
||||
auto disassembleEORI_TO_SR() -> string;
|
||||
auto disassembleJSR(EffectiveAddress target) -> string;
|
||||
|
|
@ -239,6 +258,9 @@ private:
|
|||
auto disassembleMOVE_TO_SR(EffectiveAddress ea) -> string;
|
||||
auto disassembleMOVE_USP(uint1 direction, AddressRegister ar) -> string;
|
||||
auto disassembleNOP() -> string;
|
||||
template<uint Size> auto disassembleOR(EffectiveAddress from, DataRegister with) -> string;
|
||||
template<uint Size> auto disassembleOR(DataRegister from, EffectiveAddress with) -> string;
|
||||
template<uint Size> auto disassembleORI(EffectiveAddress with) -> string;
|
||||
auto disassembleORI_TO_CCR() -> string;
|
||||
auto disassembleORI_TO_SR() -> string;
|
||||
template<uint Size> auto disassembleROL(uint4 shift, DataRegister modify) -> string;
|
||||
|
|
@ -256,7 +278,10 @@ private:
|
|||
auto disassembleRTS() -> string;
|
||||
template<uint Size> auto disassembleSUB(EffectiveAddress source, DataRegister target) -> string;
|
||||
template<uint Size> auto disassembleSUB(DataRegister source, EffectiveAddress target) -> string;
|
||||
template<uint Size> auto disassembleSUBA(AddressRegister to, EffectiveAddress from) -> string;
|
||||
template<uint Size> auto disassembleSUBI(EffectiveAddress with) -> string;
|
||||
template<uint Size> auto disassembleSUBQ(uint4 immediate, EffectiveAddress ea) -> string;
|
||||
template<uint Size> auto disassembleSUBX(EffectiveAddress with, EffectiveAddress from) -> string;
|
||||
template<uint Size> auto disassembleTST(EffectiveAddress ea) -> string;
|
||||
|
||||
template<uint Size> auto _read(uint32 addr) -> uint32;
|
||||
|
|
|
|||
|
|
@ -6,8 +6,8 @@ auto SMP::step(uint clocks) -> void {
|
|||
synchronize(cpu);
|
||||
#else
|
||||
//forcefully sync S-SMP to S-CPU in case chips are not communicating
|
||||
//sync if S-SMP is more than 24 samples ahead of S-CPU
|
||||
if(clock() - cpu.clock() > frequency() * scalar() / (768 / 24)) synchronize(cpu);
|
||||
//sync if S-SMP is more than 1ms ahead of S-CPU
|
||||
if(clock() - cpu.clock() > Thread::Second / 1'000) synchronize(cpu);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue