mirror of https://github.com/bsnes-emu/bsnes.git
Update to v097r05 release.
byuu says: More V30MZ implemented, a lot more to go. icarus now supports importing WS and WSC games. It expects them to have the correct file extension, same for GB and GBC. > Ugh, apparently HiDPI icarus doesn't let you press the check boxes. I set the flag value in the plist to false for now. Forgot to do it for higan, but hopefully I won't forget before release.
This commit is contained in:
Tim Allen
parent
a8323d0d2b
commit
605a8aa3e9
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@ -6,7 +6,7 @@ using namespace nall;
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namespace Emulator {
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static const string Name = "higan";
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static const string Version = "097.04";
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static const string Version = "097.05";
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static const string Author = "byuu";
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static const string License = "GPLv3";
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static const string Website = "http://byuu.org/";
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@ -4,6 +4,7 @@ namespace Emulator {
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struct Interface {
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struct Information {
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string manufacturer;
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string name;
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uint width;
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uint height;
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@ -8,12 +8,14 @@ Settings settings;
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Interface::Interface() {
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interface = this;
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information.manufacturer = "Nintendo";
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information.name = "Famicom";
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information.width = 256;
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information.height = 240;
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information.overscan = true;
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information.aspectRatio = 8.0 / 7.0;
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information.resettable = true;
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information.capability.states = true;
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information.capability.cheats = true;
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@ -9,12 +9,14 @@ Interface::Interface() {
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interface = this;
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hook = nullptr;
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information.manufacturer = "Nintendo";
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information.name = "Game Boy";
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information.width = 160;
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information.height = 144;
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information.overscan = false;
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information.aspectRatio = 1.0;
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information.resettable = false;
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information.capability.states = true;
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information.capability.cheats = true;
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@ -8,12 +8,14 @@ Settings settings;
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Interface::Interface() {
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interface = this;
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information.manufacturer = "Nintendo";
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information.name = "Game Boy Advance";
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information.width = 240;
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information.height = 160;
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information.overscan = false;
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information.aspectRatio = 1.0;
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information.resettable = false;
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information.capability.states = true;
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information.capability.cheats = false;
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@ -0,0 +1,30 @@
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//(0 = odd, 1 = even) number of bits set in value
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auto V30MZ::parity(uint16 value) const -> bool {
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value ^= value >> 8;
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value ^= value >> 4;
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value ^= value >> 2;
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value ^= value >> 1;
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return !(value & 1);
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}
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auto V30MZ::albAnd(uint8 x, uint8 y) -> uint8 {
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uint8 result = x & y;
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r.f.c = 0;
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r.f.p = parity(result);
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r.f.h = 0;
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r.f.z = result == 0;
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r.f.s = result & 0x80;
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r.f.v = 0;
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return result;
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}
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auto V30MZ::alwAnd(uint16 x, uint16 y) -> uint16 {
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uint16 result = x & y;
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r.f.c = 0;
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r.f.p = parity(result);
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r.f.h = 0;
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r.f.z = result == 0;
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r.f.s = result & 0x8000;
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r.f.v = 0;
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return result;
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}
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@ -2,19 +2,67 @@ auto V30MZ::disassemble(uint16 cs, uint16 ip, bool registers) -> string {
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string s;
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uint20 ea = (cs << 4) + ip;
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auto readByte = [&](uint offset) {
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uint8 byte = read((cs << 4) + (uint16)(ip + offset));
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return hex(byte, 2L);
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enum : uint { Byte, Word, Segment };
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auto readByte = [&](uint offset) -> string {
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uint8 byte = read((cs << 4) + (uint16)(ip + offset++));
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return {"$", hex(byte, 2L)};
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};
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auto readWord = [&](uint offset) {
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auto readWord = [&](uint offset) -> string {
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uint16 word = read((cs << 4) + (uint16)(ip + offset++)) << 0;
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word | read((cs << 4) + (uint16)(ip + offset++)) << 8;
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return hex(word, 4L);
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word |= read((cs << 4) + (uint16)(ip + offset++)) << 8;
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return {"$", hex(word, 4L)};
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};
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auto readRelativeByte = [&](uint offset, uint displacement) -> string {
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uint8 byte = read((cs << 4) + (uint16)(ip + offset++));
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return {"$", hex(ip + displacement + (int8)byte, 4L)};
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};
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auto readRelativeWord = [&](uint offset, uint displacement) -> string {
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uint16 word = read((cs << 4) + (uint16)(ip + offset++)) << 0;
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word |= read((cs << 4) + (uint16)(ip + offset++)) << 8;
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return {"$", hex(ip + displacement + (int16)word, 4L)};
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};
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auto readModRM = [&](uint offset, uint mode) -> string {
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uint8 modRM = read((cs << 4) + (uint16)(ip + offset++));
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static const string reg[3][8] = {
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{"al", "cl", "dl", "bl", "ah", "ch", "dh", "bh"},
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{"ax", "cx", "dx", "bx", "sp", "bp", "si", "di"},
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{"es", "cs", "ss", "ds", "es", "cs", "ss", "ds"},
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};
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string d = reg[mode][(uint3)(modRM >> 3)];
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if(modRM >= 0xc0) return {d, ",", reg[Word][modRM & 7]};
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if((modRM & 0xc7) == 0x06) return {d, ",[", readWord(offset), "]"};
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static const string mem[8] = {"bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"};
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if((modRM & 0xc0) == 0x40) return {d, ",[", mem[modRM & 7], "+", readByte(offset), "]"};
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if((modRM & 0xc0) == 0x80) return {d, ",[", mem[modRM & 7], "+", readWord(offset), "]"};
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return {d, ",[", mem[modRM & 7], "]"};
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};
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uint8 opcode = read(ea);
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switch(opcode) {
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case 0x90: s = {"nop"}; break;
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case 0x22: s = {"xor ", readModRM(1, Byte)}; break;
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case 0x33: s = {"xor ", readModRM(1, Word)}; break;
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case 0x70: s = {"jo ", readRelativeByte(1, 2)}; break;
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case 0x71: s = {"jno ", readRelativeByte(1, 2)}; break;
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case 0x72: s = {"jc ", readRelativeByte(1, 2)}; break;
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case 0x73: s = {"jnc ", readRelativeByte(1, 2)}; break;
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case 0x74: s = {"jz ", readRelativeByte(1, 2)}; break;
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case 0x75: s = {"jnz ", readRelativeByte(1, 2)}; break;
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case 0x76: s = {"jcz ", readRelativeByte(1, 2)}; break;
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case 0x77: s = {"jncz ", readRelativeByte(1, 2)}; break;
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case 0x78: s = {"js ", readRelativeByte(1, 2)}; break;
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case 0x79: s = {"jns ", readRelativeByte(1, 2)}; break;
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case 0x7a: s = {"jp ", readRelativeByte(1, 2)}; break;
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case 0x7b: s = {"jnp ", readRelativeByte(1, 2)}; break;
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case 0x7c: s = {"jl ", readRelativeByte(1, 2)}; break;
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case 0x7d: s = {"jnl ", readRelativeByte(1, 2)}; break;
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case 0x7e: s = {"jle ", readRelativeByte(1, 2)}; break;
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case 0x7f: s = {"jnle ", readRelativeByte(1, 2)}; break;
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case 0x8a: s = {"mov ", readModRM(1, Byte)}; break;
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case 0x8b: s = {"mov ", readModRM(1, Word)}; break;
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case 0x8e: s = {"mov ", readModRM(1, Segment)}; break;
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case 0x90: s = {"nop "}; break;
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case 0xa8: s = {"test al,", readByte(1)}; break;
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case 0xa9: s = {"test ax,", readWord(1)}; break;
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case 0xb0: s = {"mov al,", readByte(1)}; break;
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case 0xb1: s = {"mov cl,", readByte(1)}; break;
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case 0xb2: s = {"mov dl,", readByte(1)}; break;
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@ -31,21 +79,23 @@ auto V30MZ::disassemble(uint16 cs, uint16 ip, bool registers) -> string {
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case 0xbd: s = {"mov bp,", readWord(1)}; break;
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case 0xbe: s = {"mov si,", readWord(1)}; break;
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case 0xbf: s = {"mov di,", readWord(1)}; break;
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case 0xc3: s = {"ret "}; break;
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case 0xe4: s = {"in al,", readByte(1)}; break;
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case 0xe5: s = {"in ax,", readByte(1)}; break;
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case 0xe6: s = {"out ", readByte(1), ",al"}; break;
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case 0xe7: s = {"out ", readByte(1), ",ax"}; break;
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case 0xe8: s = {"call ", readRelativeWord(1, 3)}; break;
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case 0xea: s = {"jmp ", readWord(3), ":", readWord(1)}; break;
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case 0xec: s = {"in al,dx"}; break;
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case 0xed: s = {"in ax,dx"}; break;
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case 0xee: s = {"out dx,al"}; break;
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case 0xef: s = {"out dx,ax"}; break;
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case 0xf8: s = {"clc"}; break;
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case 0xf9: s = {"stc"}; break;
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case 0xfa: s = {"cli"}; break;
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case 0xfb: s = {"sti"}; break;
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case 0xfc: s = {"cld"}; break;
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case 0xfd: s = {"std"}; break;
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case 0xf8: s = {"clc "}; break;
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case 0xf9: s = {"stc "}; break;
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case 0xfa: s = {"cli "}; break;
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case 0xfb: s = {"sti "}; break;
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case 0xfc: s = {"cld "}; break;
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case 0xfd: s = {"std "}; break;
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default:
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s = {"??? [", hex(opcode, 2L), "]"};
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@ -64,8 +114,8 @@ auto V30MZ::disassemble(uint16 cs, uint16 ip, bool registers) -> string {
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" di:", hex(r.di, 4L),
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" bp:", hex(r.bp, 4L),
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" sp:", hex(r.sp, 4L),
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" ip:", hex(r.ip, 4L),
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" cs:", hex(r.cs, 4L),
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" ip:", hex(ip, 4L),
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" ds:", hex(r.ds, 4L),
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" es:", hex(r.es, 4L),
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" ss:", hex(r.ss, 4L), " ",
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@ -1,61 +1,127 @@
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auto V30MZ::opJumpFar() {
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auto ip = readWord();
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auto cs = readWord();
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r.ip = ip;
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r.cs = cs;
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auto V30MZ::opbXorRegisterModRM() {
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auto md = readbIP();
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regb(md) ^= readbModRM(md);
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}
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auto V30MZ::opInByte() {
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auto port = readByte();
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r.al = in(port);
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auto V30MZ::opwXorRegisterModRM() {
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auto md = readbIP();
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regw(md) ^= readwModRM(md);
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}
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auto V30MZ::opInWord() {
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auto port = readByte();
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r.ax = in(port);
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auto V30MZ::opJumpIf(bool condition) {
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auto displacement = (int8)readbIP();
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if(condition) r.ip += displacement;
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}
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auto V30MZ::opOutByte() {
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auto port = readByte();
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out(port, r.al);
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auto V30MZ::opbMoveRegisterModRM() {
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auto md = readbIP();
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regb(md) = readbModRM(md);
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}
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auto V30MZ::opOutWord() {
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auto port = readByte();
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out(port, r.ax);
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auto V30MZ::opwMoveRegisterModRM() {
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auto md = readbIP();
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regw(md) = readwModRM(md);
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}
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auto V30MZ::opInDXByte() {
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r.al = in(r.dx);
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}
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auto V30MZ::opInDXWord() {
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r.ax = in(r.dx);
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}
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auto V30MZ::opOutDXByte() {
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out(r.dx, r.al);
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}
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auto V30MZ::opOutDXWord() {
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out(r.dx, r.ax);
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}
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auto V30MZ::opMoveRegisterImmediateByte(uint8& breg) {
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breg = readByte();
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}
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auto V30MZ::opMoveRegisterImmediateWord(uint16& wreg) {
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wreg = readWord();
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auto V30MZ::opMoveSegmentRegisterModRM() {
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wait(1);
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auto md = readbIP();
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sreg(md) = readwModRM(md);
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}
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auto V30MZ::opNoOperation() {
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}
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auto V30MZ::opTestAL() {
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albAnd(r.al, readbIP());
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}
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auto V30MZ::opTestAX() {
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alwAnd(r.ax, readwIP());
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}
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auto V30MZ::opbMoveRegisterImmediate(uint8& rd) {
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rd = readbIP();
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}
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auto V30MZ::opwMoveRegisterImmediate(uint16& rd) {
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rd = readwIP();
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}
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auto V30MZ::opReturn() {
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wait(5);
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r.ip = readSP();
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}
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auto V30MZ::opbIn() {
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wait(5);
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auto port = readbIP();
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r.al = in(port);
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}
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auto V30MZ::opwIn() {
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wait(5);
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auto port = readbIP();
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r.al = in(port + 0);
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r.ah = in(port + 1);
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}
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auto V30MZ::opbOut() {
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wait(5);
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auto port = readbIP();
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out(port, r.al);
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}
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auto V30MZ::opwOut() {
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wait(5);
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auto port = readbIP();
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out(port + 0, r.al);
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out(port + 1, r.ah);
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}
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auto V30MZ::opCallNear() {
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wait(4);
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auto displacement = (int16)readwIP();
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writeSP(r.ip);
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r.ip += displacement;
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}
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auto V30MZ::opJumpFar() {
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wait(6);
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auto ip = readwIP();
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auto cs = readwIP();
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r.ip = ip;
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r.cs = cs;
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}
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auto V30MZ::opbInDX() {
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wait(5);
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r.al = in(r.dx);
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}
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auto V30MZ::opwInDX() {
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wait(5);
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r.al = in(r.dx + 0);
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r.ah = in(r.dx + 1);
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}
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auto V30MZ::opbOutDX() {
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wait(5);
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out(r.dx, r.al);
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}
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auto V30MZ::opwOutDX() {
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wait(5);
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out(r.dx + 0, r.al);
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out(r.dx + 1, r.ah);
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}
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auto V30MZ::opClearFlag(bool& flag) {
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wait(3);
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flag = false;
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}
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auto V30MZ::opSetFlag(bool& flag) {
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wait(3);
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flag = true;
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}
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@ -1,8 +1,75 @@
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auto V30MZ::readByte() -> uint8 {
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return read((r.cs << 4) + (r.ip++));
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auto V30MZ::readbIP() -> uint8 {
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return read((r.cs << 4) + r.ip++);
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}
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auto V30MZ::readWord() -> uint16 {
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uint16 word = read((r.cs << 4) + (r.ip++)) << 0;
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return word | read((r.cs << 4) + (r.ip++)) << 8;
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auto V30MZ::readwIP() -> uint16 {
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uint16 word = read((r.cs << 4) + r.ip++) << 0;
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return word | read((r.cs << 4) + r.ip++) << 8;
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}
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//
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auto V30MZ::readSP() -> uint16 {
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uint16 word = read((r.ss << 4) + r.sp++) << 0;
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return word | read((r.ss << 4) + r.sp++) << 8;
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}
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auto V30MZ::writeSP(uint16 data) -> void {
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write((r.ss << 4) + --r.sp, data >> 8);
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write((r.ss << 4) + --r.sp, data >> 0);
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}
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//
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auto V30MZ::readb(uint20 ea) -> uint8 {
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return read(ea++);
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}
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auto V30MZ::readw(uint20 ea) -> uint16 {
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uint16 word = read(ea++) << 0;
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return word | read(ea++) << 8;
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}
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//
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auto V30MZ::readb(uint16 rs, uint16 ea) -> uint8 {
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return read((rs << 4) + ea++);
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}
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auto V30MZ::readw(uint16 rs, uint16 ea) -> uint16 {
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uint16 word = read((rs << 4) + ea++) << 0;
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return word | read((rs << 4) + ea++) << 8;
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}
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//
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//todo: return tuple<uint16 seg, uint16 ea>
|
||||
auto V30MZ::readModRM(uint8 modRM) -> uint20 {
|
||||
if((modRM & 0xc7) == 0x06) return (r.ds << 4) + (int16)readwIP();
|
||||
|
||||
int16 displacement = 0;
|
||||
if((modRM & 0xc0) == 0x40) displacement = (int8)readbIP();
|
||||
if((modRM & 0xc0) == 0x80) displacement = (int16)readwIP();
|
||||
|
||||
switch(modRM & 7) {
|
||||
case 0: return (r.ds << 4) + r.bx + r.si + displacement;
|
||||
case 1: return (r.ds << 4) + r.bx + r.di + displacement;
|
||||
case 2: return (r.ss << 4) + r.bp + r.si + displacement;
|
||||
case 3: return (r.ss << 4) + r.bp + r.di + displacement;
|
||||
case 4: return (r.ds << 4) + r.si + displacement;
|
||||
case 5: return (r.ds << 4) + r.di + displacement;
|
||||
case 6: return (r.ss << 4) + r.bp + displacement;
|
||||
case 7: return (r.ds << 4) + r.bx + displacement;
|
||||
}
|
||||
unreachable;
|
||||
}
|
||||
|
||||
auto V30MZ::readbModRM(uint8 modRM) -> uint8 {
|
||||
if(modRM >= 0xc0) return regb(modRM);
|
||||
return readb(readModRM(modRM));
|
||||
}
|
||||
|
||||
auto V30MZ::readwModRM(uint8 modRM) -> uint16 {
|
||||
if(modRM >= 0xc0) return regw(modRM);
|
||||
return readw(readModRM(modRM));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,3 +1,18 @@
|
|||
auto V30MZ::regb(uint8 modRM) -> uint8& {
|
||||
static uint8* p[] = {&r.al, &r.cl, &r.dl, &r.bl, &r.ah, &r.ch, &r.dh, &r.bh};
|
||||
return *p[(modRM >> 3) & 7];
|
||||
}
|
||||
|
||||
auto V30MZ::regw(uint8 modRM) -> uint16& {
|
||||
static uint16* p[] = {&r.ax, &r.cx, &r.dx, &r.bx, &r.sp, &r.bp, &r.si, &r.di};
|
||||
return *p[(modRM >> 3) & 7];
|
||||
}
|
||||
|
||||
auto V30MZ::sreg(uint8 modRM) -> uint16& {
|
||||
static uint16* p[] = {&r.es, &r.cs, &r.ss, &r.ds};
|
||||
return *p[(modRM >> 3) & 3];
|
||||
}
|
||||
|
||||
V30MZ::Registers::Flags::operator uint16() const {
|
||||
return m << 15 | 1 << 14 | 1 << 13 | 1 << 12
|
||||
| v << 11 | d << 10 | i << 9 | b << 8
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@ namespace Processor {
|
|||
|
||||
#include "registers.cpp"
|
||||
#include "memory.cpp"
|
||||
#include "algorithms.cpp"
|
||||
#include "instructions.cpp"
|
||||
#include "disassembler.cpp"
|
||||
|
||||
|
|
@ -21,36 +22,61 @@ auto V30MZ::exec() -> void {
|
|||
auto V30MZ::execOpcode() -> void {
|
||||
executed++;
|
||||
|
||||
uint8 opcode = readByte();
|
||||
uint8 opcode = readbIP();
|
||||
wait(1);
|
||||
|
||||
switch(opcode) {
|
||||
case 0x32: return opbXorRegisterModRM();
|
||||
case 0x33: return opwXorRegisterModRM();
|
||||
case 0x70: return opJumpIf(r.f.v == 1);
|
||||
case 0x71: return opJumpIf(r.f.v == 0);
|
||||
case 0x72: return opJumpIf(r.f.c == 1);
|
||||
case 0x73: return opJumpIf(r.f.c == 0);
|
||||
case 0x74: return opJumpIf(r.f.z == 1);
|
||||
case 0x75: return opJumpIf(r.f.z == 0);
|
||||
case 0x76: return opJumpIf(r.f.z == 1 || r.f.c == 1);
|
||||
case 0x77: return opJumpIf(r.f.z != 1 && r.f.c != 1);
|
||||
case 0x78: return opJumpIf(r.f.s == 1);
|
||||
case 0x79: return opJumpIf(r.f.s == 0);
|
||||
case 0x7a: return opJumpIf(r.f.p == 1);
|
||||
case 0x7b: return opJumpIf(r.f.p == 0);
|
||||
case 0x7c: return opJumpIf(r.f.s != r.f.v && r.f.z == 0);
|
||||
case 0x7d: return opJumpIf(r.f.s == r.f.v || r.f.z == 1);
|
||||
case 0x7e: return opJumpIf(r.f.s != r.f.v || r.f.z == 1);
|
||||
case 0x7f: return opJumpIf(r.f.s == r.f.v && r.f.z == 0);
|
||||
case 0x8a: return opbMoveRegisterModRM();
|
||||
case 0x8b: return opwMoveRegisterModRM();
|
||||
case 0x8e: return opMoveSegmentRegisterModRM();
|
||||
case 0x90: return opNoOperation();
|
||||
case 0xb0: return opMoveRegisterImmediateByte(r.al);
|
||||
case 0xb1: return opMoveRegisterImmediateByte(r.cl);
|
||||
case 0xb2: return opMoveRegisterImmediateByte(r.dl);
|
||||
case 0xb3: return opMoveRegisterImmediateByte(r.bl);
|
||||
case 0xb4: return opMoveRegisterImmediateByte(r.ah);
|
||||
case 0xb5: return opMoveRegisterImmediateByte(r.ch);
|
||||
case 0xb6: return opMoveRegisterImmediateByte(r.dh);
|
||||
case 0xb7: return opMoveRegisterImmediateByte(r.bh);
|
||||
case 0xb8: return opMoveRegisterImmediateWord(r.ax);
|
||||
case 0xb9: return opMoveRegisterImmediateWord(r.cx);
|
||||
case 0xba: return opMoveRegisterImmediateWord(r.dx);
|
||||
case 0xbb: return opMoveRegisterImmediateWord(r.bx);
|
||||
case 0xbc: return opMoveRegisterImmediateWord(r.sp);
|
||||
case 0xbd: return opMoveRegisterImmediateWord(r.bp);
|
||||
case 0xbe: return opMoveRegisterImmediateWord(r.si);
|
||||
case 0xbf: return opMoveRegisterImmediateWord(r.di);
|
||||
case 0xe4: return opInByte();
|
||||
case 0xe5: return opInWord();
|
||||
case 0xe6: return opOutByte();
|
||||
case 0xe7: return opOutWord();
|
||||
case 0xa8: return opTestAL();
|
||||
case 0xa9: return opTestAX();
|
||||
case 0xb0: return opbMoveRegisterImmediate(r.al);
|
||||
case 0xb1: return opbMoveRegisterImmediate(r.cl);
|
||||
case 0xb2: return opbMoveRegisterImmediate(r.dl);
|
||||
case 0xb3: return opbMoveRegisterImmediate(r.bl);
|
||||
case 0xb4: return opbMoveRegisterImmediate(r.ah);
|
||||
case 0xb5: return opbMoveRegisterImmediate(r.ch);
|
||||
case 0xb6: return opbMoveRegisterImmediate(r.dh);
|
||||
case 0xb7: return opbMoveRegisterImmediate(r.bh);
|
||||
case 0xb8: return opwMoveRegisterImmediate(r.ax);
|
||||
case 0xb9: return opwMoveRegisterImmediate(r.cx);
|
||||
case 0xba: return opwMoveRegisterImmediate(r.dx);
|
||||
case 0xbb: return opwMoveRegisterImmediate(r.bx);
|
||||
case 0xbc: return opwMoveRegisterImmediate(r.sp);
|
||||
case 0xbd: return opwMoveRegisterImmediate(r.bp);
|
||||
case 0xbe: return opwMoveRegisterImmediate(r.si);
|
||||
case 0xbf: return opwMoveRegisterImmediate(r.di);
|
||||
case 0xc3: return opReturn();
|
||||
case 0xe4: return opbIn();
|
||||
case 0xe5: return opwIn();
|
||||
case 0xe6: return opbOut();
|
||||
case 0xe7: return opwOut();
|
||||
case 0xe8: return opCallNear();
|
||||
case 0xea: return opJumpFar();
|
||||
case 0xec: return opInDXByte();
|
||||
case 0xed: return opInDXWord();
|
||||
case 0xee: return opOutDXByte();
|
||||
case 0xef: return opOutDXWord();
|
||||
case 0xec: return opbInDX();
|
||||
case 0xed: return opwInDX();
|
||||
case 0xee: return opbOutDX();
|
||||
case 0xef: return opwOutDX();
|
||||
case 0xf8: return opClearFlag(r.f.c);
|
||||
case 0xf9: return opSetFlag(r.f.c);
|
||||
case 0xfa: return opClearFlag(r.f.i);
|
||||
|
|
|
|||
|
|
@ -8,30 +8,64 @@ struct V30MZ {
|
|||
virtual auto wait(uint clocks = 1) -> void = 0;
|
||||
virtual auto read(uint20 addr) -> uint8 = 0;
|
||||
virtual auto write(uint20 addr, uint8 data) -> void = 0;
|
||||
virtual auto in(uint16 port) -> uint16 = 0;
|
||||
virtual auto out(uint16 port, uint16 data) -> void = 0;
|
||||
virtual auto in(uint16 port) -> uint8 = 0;
|
||||
virtual auto out(uint16 port, uint8 data) -> void = 0;
|
||||
|
||||
auto exec() -> void;
|
||||
auto execOpcode() -> void;
|
||||
auto power() -> void;
|
||||
|
||||
//registers.cpp
|
||||
auto regb(uint8) -> uint8&;
|
||||
auto regw(uint8) -> uint16&;
|
||||
auto sreg(uint8) -> uint16&;
|
||||
|
||||
//memory.cpp
|
||||
auto readByte() -> uint8;
|
||||
auto readWord() -> uint16;
|
||||
auto readbIP() -> uint8;
|
||||
auto readwIP() -> uint16;
|
||||
|
||||
auto readSP() -> uint16;
|
||||
auto writeSP(uint16) -> void;
|
||||
|
||||
auto readb(uint20 ea) -> uint8;
|
||||
auto readw(uint20 ea) -> uint16;
|
||||
|
||||
auto readb(uint16 rs, uint16 ea) -> uint8;
|
||||
auto readw(uint16 rs, uint16 ea) -> uint16;
|
||||
|
||||
auto readModRM(uint8) -> uint20;
|
||||
auto readbModRM(uint8) -> uint8;
|
||||
auto readwModRM(uint8) -> uint16;
|
||||
|
||||
//algorithms.cpp
|
||||
auto parity(uint16) const -> bool;
|
||||
|
||||
auto albAnd(uint8, uint8) -> uint8;
|
||||
auto alwAnd(uint16, uint16) -> uint16;
|
||||
|
||||
//instructions.cpp
|
||||
auto opJumpFar();
|
||||
auto opInByte();
|
||||
auto opInWord();
|
||||
auto opOutByte();
|
||||
auto opOutWord();
|
||||
auto opInDXByte();
|
||||
auto opInDXWord();
|
||||
auto opOutDXByte();
|
||||
auto opOutDXWord();
|
||||
auto opMoveRegisterImmediateByte(uint8&);
|
||||
auto opMoveRegisterImmediateWord(uint16&);
|
||||
auto opbXorRegisterModRM();
|
||||
auto opwXorRegisterModRM();
|
||||
auto opJumpIf(bool);
|
||||
auto opbMoveRegisterModRM();
|
||||
auto opwMoveRegisterModRM();
|
||||
auto opMoveSegmentRegisterModRM();
|
||||
auto opNoOperation();
|
||||
auto opTestAL();
|
||||
auto opTestAX();
|
||||
auto opbMoveRegisterImmediate(uint8&);
|
||||
auto opwMoveRegisterImmediate(uint16&);
|
||||
auto opReturn();
|
||||
auto opbIn();
|
||||
auto opwIn();
|
||||
auto opbOut();
|
||||
auto opwOut();
|
||||
auto opCallNear();
|
||||
auto opJumpFar();
|
||||
auto opbInDX();
|
||||
auto opwInDX();
|
||||
auto opbOutDX();
|
||||
auto opwOutDX();
|
||||
auto opClearFlag(bool&);
|
||||
auto opSetFlag(bool&);
|
||||
|
||||
|
|
@ -44,10 +78,10 @@ struct V30MZ {
|
|||
|
||||
struct Registers {
|
||||
uint16 ip;
|
||||
union { struct { uint16 ax; uint8 order_lsb2(al, ah); }; };
|
||||
union { struct { uint16 bx; uint8 order_lsb2(bl, bh); }; };
|
||||
union { struct { uint16 cx; uint8 order_lsb2(cl, ch); }; };
|
||||
union { struct { uint16 dx; uint8 order_lsb2(dl, dh); }; };
|
||||
union { uint16 ax; struct { uint8 order_lsb2(al, ah); }; };
|
||||
union { uint16 bx; struct { uint8 order_lsb2(bl, bh); }; };
|
||||
union { uint16 cx; struct { uint8 order_lsb2(cl, ch); }; };
|
||||
union { uint16 dx; struct { uint8 order_lsb2(dl, dh); }; };
|
||||
uint16 si;
|
||||
uint16 di;
|
||||
uint16 bp;
|
||||
|
|
@ -56,6 +90,7 @@ struct V30MZ {
|
|||
uint16 ds;
|
||||
uint16 es;
|
||||
uint16 ss;
|
||||
|
||||
struct Flags {
|
||||
operator uint16() const;
|
||||
auto operator=(uint16 data);
|
||||
|
|
|
|||
|
|
@ -9,12 +9,14 @@ Interface::Interface() {
|
|||
interface = this;
|
||||
system.init();
|
||||
|
||||
information.manufacturer = "Nintendo";
|
||||
information.name = "Super Famicom";
|
||||
information.width = 256;
|
||||
information.height = 240;
|
||||
information.overscan = true;
|
||||
information.aspectRatio = 8.0 / 7.0;
|
||||
information.resettable = true;
|
||||
|
||||
information.capability.states = true;
|
||||
information.capability.cheats = true;
|
||||
|
||||
|
|
|
|||
|
|
@ -55,6 +55,11 @@ auto Cartridge::unload() -> void {
|
|||
}
|
||||
|
||||
auto Cartridge::power() -> void {
|
||||
iomap[0x00c0] = this;
|
||||
iomap[0x00c1] = this;
|
||||
iomap[0x00c2] = this;
|
||||
iomap[0x00c3] = this;
|
||||
|
||||
r.bank_rom0 = 0xff;
|
||||
r.bank_rom1 = 0xff;
|
||||
r.bank_rom2 = 0xff;
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
struct Cartridge {
|
||||
struct Cartridge : IO {
|
||||
auto loaded() const -> bool;
|
||||
|
||||
auto load() -> void;
|
||||
|
|
@ -11,6 +11,9 @@ struct Cartridge {
|
|||
auto ramRead(uint addr) -> uint8;
|
||||
auto ramWrite(uint addr, uint8 data) -> void;
|
||||
|
||||
auto portRead(uint16 addr) -> uint8 override;
|
||||
auto portWrite(uint16 addr, uint8 data) -> void override;
|
||||
|
||||
struct Registers {
|
||||
uint8 bank_rom0;
|
||||
uint8 bank_rom1;
|
||||
|
|
|
|||
|
|
@ -24,3 +24,45 @@ auto Cartridge::ramWrite(uint addr, uint8 data) -> void {
|
|||
if(!ram.data) return;
|
||||
ram.data[addr & ram.mask] = data;
|
||||
}
|
||||
|
||||
auto Cartridge::portRead(uint16 addr) -> uint8 {
|
||||
if(addr == 0x00c0) {
|
||||
return r.bank_rom2;
|
||||
}
|
||||
|
||||
if(addr == 0x00c1) {
|
||||
return r.bank_sram;
|
||||
}
|
||||
|
||||
if(addr == 0x00c2) {
|
||||
return r.bank_rom0;
|
||||
}
|
||||
|
||||
if(addr == 0x00c3) {
|
||||
return r.bank_rom1;
|
||||
}
|
||||
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
auto Cartridge::portWrite(uint16 addr, uint8 data) -> void {
|
||||
if(addr == 0x00c0) {
|
||||
r.bank_rom2 = data;
|
||||
return;
|
||||
}
|
||||
|
||||
if(addr == 0x00c1) {
|
||||
r.bank_sram = data;
|
||||
return;
|
||||
}
|
||||
|
||||
if(addr == 0x00c2) {
|
||||
r.bank_rom0 = data;
|
||||
return;
|
||||
}
|
||||
|
||||
if(addr == 0x00c3) {
|
||||
r.bank_rom1 = data;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -40,17 +40,19 @@ auto CPU::write(uint20 addr, uint8 data) -> void {
|
|||
return bus.write(addr, data);
|
||||
}
|
||||
|
||||
auto CPU::in(uint16 port) -> uint16 {
|
||||
auto CPU::in(uint16 port) -> uint8 {
|
||||
return iomap[port]->portRead(port);
|
||||
}
|
||||
|
||||
auto CPU::out(uint16 port, uint16 data) -> void {
|
||||
auto CPU::out(uint16 port, uint8 data) -> void {
|
||||
return iomap[port]->portWrite(port, data);
|
||||
}
|
||||
|
||||
auto CPU::power() -> void {
|
||||
V30MZ::power();
|
||||
create(CPU::Enter, 3072000);
|
||||
|
||||
iomap[0x00a0] = this;
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -7,8 +7,8 @@ struct CPU : Processor::V30MZ, Thread, IO {
|
|||
auto wait(uint clocks = 1) -> void override;
|
||||
auto read(uint20 addr) -> uint8 override;
|
||||
auto write(uint20 addr, uint8 data) -> void override;
|
||||
auto in(uint16 port) -> uint16 override;
|
||||
auto out(uint16 port, uint16 data) -> void override;
|
||||
auto in(uint16 port) -> uint8 override;
|
||||
auto out(uint16 port, uint8 data) -> void override;
|
||||
|
||||
auto power() -> void;
|
||||
|
||||
|
|
@ -16,8 +16,8 @@ struct CPU : Processor::V30MZ, Thread, IO {
|
|||
auto ramRead(uint16 addr) -> uint8;
|
||||
auto ramWrite(uint16 addr, uint8 data) -> void;
|
||||
|
||||
auto portRead(uint16 addr) -> uint16 override;
|
||||
auto portWrite(uint16 addr, uint16 data) -> void override;
|
||||
auto portRead(uint16 addr) -> uint8 override;
|
||||
auto portWrite(uint16 addr, uint8 data) -> void override;
|
||||
};
|
||||
|
||||
extern CPU cpu;
|
||||
|
|
|
|||
|
|
@ -8,9 +8,21 @@ auto CPU::ramWrite(uint16 addr, uint8 data) -> void {
|
|||
iram[addr] = data;
|
||||
}
|
||||
|
||||
auto CPU::portRead(uint16 addr) -> uint16 {
|
||||
return 0x0000;
|
||||
auto CPU::portRead(uint16 addr) -> uint8 {
|
||||
//HW_FLAGS
|
||||
if(addr == 0x00a0) {
|
||||
return 1 << 7 //1 = built-in self-test passed
|
||||
| 1 << 2 //0 = 8-bit bus width; 1 = 16-bit bus width
|
||||
| !WS() << 1 //0 = WonderSwan; 1 = WonderSwan Color or SwanCrystal
|
||||
| 1 << 0; //0 = BIOS mapped; 1 = cartridge mapped
|
||||
}
|
||||
|
||||
return 0x00; //should never occur
|
||||
}
|
||||
|
||||
auto CPU::portWrite(uint16 addr, uint16 data) -> void {
|
||||
auto CPU::portWrite(uint16 addr, uint8 data) -> void {
|
||||
//HW_FLAGS
|
||||
if(addr == 0x00a0) {
|
||||
//todo: d2 (bus width) bit is writable; but ... it will do very bad things
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@ Settings settings;
|
|||
Interface::Interface() {
|
||||
interface = this;
|
||||
|
||||
information.manufacturer = "Bandai";
|
||||
information.name = "WonderSwan";
|
||||
information.width = 224; //note: technically 224x144; but screen can be rotated
|
||||
information.height = 224; //by using a square size; this can be done in the core
|
||||
|
|
|
|||
|
|
@ -11,13 +11,13 @@ auto IO::power() -> void {
|
|||
for(auto& n : iomap) n = &unmapped;
|
||||
}
|
||||
|
||||
auto IO::portRead(uint16 addr) -> uint16 {
|
||||
auto IO::portRead(uint16 addr) -> uint8 {
|
||||
print("[", hex(addr, 4L), "]: port unmapped\n");
|
||||
return 0x0000;
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
auto IO::portWrite(uint16 addr, uint16 data) -> void {
|
||||
print("[", hex(addr, 4L), "] = ", hex(data, 4L), ": port unmapped\n");
|
||||
auto IO::portWrite(uint16 addr, uint8 data) -> void {
|
||||
print("[", hex(addr, 4L), "] = ", hex(data, 2L), ": port unmapped\n");
|
||||
}
|
||||
|
||||
auto Bus::read(uint20 addr) -> uint8 {
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
struct IO {
|
||||
static auto power() -> void;
|
||||
|
||||
virtual auto portRead(uint16 addr) -> uint16;
|
||||
virtual auto portWrite(uint16 addr, uint16 data) -> void;
|
||||
virtual auto portRead(uint16 addr) -> uint8;
|
||||
virtual auto portWrite(uint16 addr, uint8 data) -> void;
|
||||
};
|
||||
|
||||
struct Bus {
|
||||
|
|
|
|||
|
|
@ -1,11 +1,13 @@
|
|||
Icarus::Icarus() {
|
||||
database.famicom = BML::unserialize(string::read(locate({configpath(), "icarus/"}, "Database/Famicom.bml")));
|
||||
database.superFamicom = BML::unserialize(string::read(locate({configpath(), "icarus/"}, "Database/Super Famicom.bml")));
|
||||
database.gameBoy = BML::unserialize(string::read(locate({configpath(), "icarus/"}, "Database/Game Boy.bml")));
|
||||
database.gameBoyColor = BML::unserialize(string::read(locate({configpath(), "icarus/"}, "Database/Game Boy Color.bml")));
|
||||
database.gameBoyAdvance = BML::unserialize(string::read(locate({configpath(), "icarus/"}, "Database/Game Boy Advance.bml")));
|
||||
database.bsMemory = BML::unserialize(string::read(locate({configpath(), "icarus/"}, "Database/BS Memory.bml")));
|
||||
database.sufamiTurbo = BML::unserialize(string::read(locate({configpath(), "icarus/"}, "Database/Sufami Turbo.bml")));
|
||||
database.famicom = BML::unserialize(string::read(locate("Database/Famicom.bml")));
|
||||
database.superFamicom = BML::unserialize(string::read(locate("Database/Super Famicom.bml")));
|
||||
database.gameBoy = BML::unserialize(string::read(locate("Database/Game Boy.bml")));
|
||||
database.gameBoyColor = BML::unserialize(string::read(locate("Database/Game Boy Color.bml")));
|
||||
database.gameBoyAdvance = BML::unserialize(string::read(locate("Database/Game Boy Advance.bml")));
|
||||
database.wonderSwan = BML::unserialize(string::read(locate("Database/WonderSwan.bml")));
|
||||
database.wonderSwanColor = BML::unserialize(string::read(locate("Database/WonderSwan Color.bml")));
|
||||
database.bsMemory = BML::unserialize(string::read(locate("Database/BS Memory.bml")));
|
||||
database.sufamiTurbo = BML::unserialize(string::read(locate("Database/Sufami Turbo.bml")));
|
||||
}
|
||||
|
||||
auto Icarus::error() const -> string {
|
||||
|
|
@ -32,6 +34,8 @@ auto Icarus::manifest(string location) -> string {
|
|||
if(type == ".gb") return gameBoyManifest(location);
|
||||
if(type == ".gbc") return gameBoyColorManifest(location);
|
||||
if(type == ".gba") return gameBoyAdvanceManifest(location);
|
||||
if(type == ".ws") return wonderSwanManifest(location);
|
||||
if(type == ".wsc") return wonderSwanColorManifest(location);
|
||||
if(type == ".bs") return bsMemoryManifest(location);
|
||||
if(type == ".st") return sufamiTurboManifest(location);
|
||||
|
||||
|
|
@ -65,6 +69,8 @@ auto Icarus::import(string location) -> string {
|
|||
if(type == ".gb") return gameBoyImport(buffer, location);
|
||||
if(type == ".gbc") return gameBoyColorImport(buffer, location);
|
||||
if(type == ".gba") return gameBoyAdvanceImport(buffer, location);
|
||||
if(type == ".ws") return wonderSwanImport(buffer, location);
|
||||
if(type == ".wsc") return wonderSwanColorImport(buffer, location);
|
||||
if(type == ".bs") return bsMemoryImport(buffer, location);
|
||||
if(type == ".st") return sufamiTurboImport(buffer, location);
|
||||
|
||||
|
|
|
|||
|
|
@ -47,6 +47,16 @@ struct Icarus {
|
|||
auto sufamiTurboManifest(vector<uint8>& buffer, string location) -> string;
|
||||
auto sufamiTurboImport(vector<uint8>& buffer, string location) -> string;
|
||||
|
||||
//wonderswan.cpp
|
||||
auto wonderSwanManifest(string location) -> string;
|
||||
auto wonderSwanManifest(vector<uint8>& buffer, string location) -> string;
|
||||
auto wonderSwanImport(vector<uint8>& buffer, string location) -> string;
|
||||
|
||||
//wonderswan-color.cpp
|
||||
auto wonderSwanColorManifest(string location) -> string;
|
||||
auto wonderSwanColorManifest(vector<uint8>& buffer, string location) -> string;
|
||||
auto wonderSwanColorImport(vector<uint8>& buffer, string location) -> string;
|
||||
|
||||
private:
|
||||
string errorMessage;
|
||||
|
||||
|
|
@ -56,6 +66,8 @@ private:
|
|||
Markup::Node gameBoy;
|
||||
Markup::Node gameBoyColor;
|
||||
Markup::Node gameBoyAdvance;
|
||||
Markup::Node wonderSwan;
|
||||
Markup::Node wonderSwanColor;
|
||||
Markup::Node bsMemory;
|
||||
Markup::Node sufamiTurbo;
|
||||
} database;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,51 @@
|
|||
auto Icarus::wonderSwanColorManifest(string location) -> string {
|
||||
vector<uint8> buffer;
|
||||
concatenate(buffer, {location, "program.rom"});
|
||||
return wonderSwanColorManifest(buffer, location);
|
||||
}
|
||||
|
||||
auto Icarus::wonderSwanColorManifest(vector<uint8>& buffer, string location) -> string {
|
||||
string manifest;
|
||||
string digest = Hash::SHA256(buffer.data(), buffer.size()).digest();
|
||||
|
||||
if(settings["icarus/UseDatabase"].boolean() && !manifest) {
|
||||
for(auto node : database.wonderSwanColor) {
|
||||
if(node["sha256"].text() == digest) {
|
||||
manifest.append(node.text(), "\n sha256: ", digest, "\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(settings["icarus/UseHeuristics"].boolean() && !manifest) {
|
||||
WonderSwanColorCartridge cartridge{buffer.data(), buffer.size()};
|
||||
if(manifest = cartridge.manifest) {
|
||||
manifest.append("\n");
|
||||
manifest.append("information\n");
|
||||
manifest.append(" title: ", prefixname(location), "\n");
|
||||
manifest.append(" sha256: ", digest, "\n");
|
||||
manifest.append(" note: ", "heuristically generated by icarus\n");
|
||||
}
|
||||
}
|
||||
|
||||
return manifest;
|
||||
}
|
||||
|
||||
auto Icarus::wonderSwanColorImport(vector<uint8>& buffer, string location) -> string {
|
||||
auto name = prefixname(location);
|
||||
auto source = pathname(location);
|
||||
string target{settings["Library/Location"].text(), "WonderSwan Color/", name, ".wsc/"};
|
||||
//if(directory::exists(target)) return failure("game already exists");
|
||||
|
||||
auto manifest = wonderSwanColorManifest(buffer, location);
|
||||
if(!manifest) return failure("failed to parse ROM image");
|
||||
|
||||
if(!directory::create(target)) return failure("library path unwritable");
|
||||
if(file::exists({source, name, ".sav"}) && !file::exists({target, "save.ram"})) {
|
||||
file::copy({source, name, ".sav"}, {target, "save.ram"});
|
||||
}
|
||||
|
||||
if(settings["icarus/CreateManifests"].boolean()) file::write({target, "manifest.bml"}, manifest);
|
||||
file::write({target, "program.rom"}, buffer);
|
||||
return success(target);
|
||||
}
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
auto Icarus::wonderSwanManifest(string location) -> string {
|
||||
vector<uint8> buffer;
|
||||
concatenate(buffer, {location, "program.rom"});
|
||||
return wonderSwanManifest(buffer, location);
|
||||
}
|
||||
|
||||
auto Icarus::wonderSwanManifest(vector<uint8>& buffer, string location) -> string {
|
||||
string manifest;
|
||||
string digest = Hash::SHA256(buffer.data(), buffer.size()).digest();
|
||||
|
||||
if(settings["icarus/UseDatabase"].boolean() && !manifest) {
|
||||
for(auto node : database.wonderSwan) {
|
||||
if(node["sha256"].text() == digest) {
|
||||
manifest.append(node.text(), "\n sha256: ", digest, "\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(settings["icarus/UseHeuristics"].boolean() && !manifest) {
|
||||
WonderSwanCartridge cartridge{buffer.data(), buffer.size()};
|
||||
if(manifest = cartridge.manifest) {
|
||||
manifest.append("\n");
|
||||
manifest.append("information\n");
|
||||
manifest.append(" title: ", prefixname(location), "\n");
|
||||
manifest.append(" sha256: ", digest, "\n");
|
||||
manifest.append(" note: ", "heuristically generated by icarus\n");
|
||||
}
|
||||
}
|
||||
|
||||
return manifest;
|
||||
}
|
||||
|
||||
auto Icarus::wonderSwanImport(vector<uint8>& buffer, string location) -> string {
|
||||
auto name = prefixname(location);
|
||||
auto source = pathname(location);
|
||||
string target{settings["Library/Location"].text(), "WonderSwan/", name, ".ws/"};
|
||||
//if(directory::exists(target)) return failure("game already exists");
|
||||
|
||||
auto manifest = wonderSwanManifest(buffer, location);
|
||||
if(!manifest) return failure("failed to parse ROM image");
|
||||
|
||||
if(!directory::create(target)) return failure("library path unwritable");
|
||||
if(file::exists({source, name, ".sav"}) && !file::exists({target, "save.ram"})) {
|
||||
file::copy({source, name, ".sav"}, {target, "save.ram"});
|
||||
}
|
||||
|
||||
if(settings["icarus/CreateManifests"].boolean()) file::write({target, "manifest.bml"}, manifest);
|
||||
file::write({target, "program.rom"}, buffer);
|
||||
return success(target);
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
struct WonderSwanColorCartridge {
|
||||
WonderSwanColorCartridge(uint8* data, uint size);
|
||||
|
||||
string manifest;
|
||||
|
||||
//private:
|
||||
struct Information {
|
||||
} information;
|
||||
};
|
||||
|
||||
WonderSwanColorCartridge::WonderSwanColorCartridge(uint8* data, uint size) {
|
||||
if(size < 0x10000) return;
|
||||
|
||||
manifest.append("board\n");
|
||||
manifest.append(" rom name=program.rom size=0x", hex(size), "\n");
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
struct WonderSwanCartridge {
|
||||
WonderSwanCartridge(uint8* data, uint size);
|
||||
|
||||
string manifest;
|
||||
|
||||
//private:
|
||||
struct Information {
|
||||
} information;
|
||||
};
|
||||
|
||||
WonderSwanCartridge::WonderSwanCartridge(uint8* data, uint size) {
|
||||
if(size < 0x10000) return;
|
||||
|
||||
manifest.append("board\n");
|
||||
manifest.append(" rom name=program.rom size=0x", hex(size), "\n");
|
||||
}
|
||||
|
|
@ -4,23 +4,28 @@ using namespace nall;
|
|||
#include <hiro/hiro.hpp>
|
||||
using namespace hiro;
|
||||
|
||||
//if file already exists in the same path as the binary; use it (portable mode)
|
||||
//if not, use default requested path (*nix/user mode)
|
||||
auto locate(string pathname, string filename) -> string {
|
||||
string location{programpath(), filename};
|
||||
auto locate(string name) -> string {
|
||||
string location = {programpath(), name};
|
||||
if(file_system_object::exists(location)) return location;
|
||||
return {pathname, filename};
|
||||
|
||||
location = {configpath(), "icarus/", name};
|
||||
if(file_system_object::exists(location)) return location;
|
||||
|
||||
directory::create({localpath(), "icarus/"});
|
||||
return {localpath(), "icarus/", name};
|
||||
}
|
||||
|
||||
#include "settings.cpp"
|
||||
Settings settings;
|
||||
|
||||
#include "heuristics/famicom.hpp"
|
||||
#include "heuristics/super-famicom.hpp"
|
||||
#include "heuristics/game-boy.hpp"
|
||||
#include "heuristics/game-boy-advance.hpp"
|
||||
#include "heuristics/bs-memory.hpp"
|
||||
#include "heuristics/sufami-turbo.hpp"
|
||||
#include "heuristics/famicom.cpp"
|
||||
#include "heuristics/super-famicom.cpp"
|
||||
#include "heuristics/game-boy.cpp"
|
||||
#include "heuristics/game-boy-advance.cpp"
|
||||
#include "heuristics/wonderswan.cpp"
|
||||
#include "heuristics/wonderswan-color.cpp"
|
||||
#include "heuristics/bs-memory.cpp"
|
||||
#include "heuristics/sufami-turbo.cpp"
|
||||
|
||||
#include "core/core.hpp"
|
||||
#include "core/core.cpp"
|
||||
|
|
@ -29,6 +34,8 @@ Settings settings;
|
|||
#include "core/game-boy.cpp"
|
||||
#include "core/game-boy-color.cpp"
|
||||
#include "core/game-boy-advance.cpp"
|
||||
#include "core/wonderswan.cpp"
|
||||
#include "core/wonderswan-color.cpp"
|
||||
#include "core/bs-memory.cpp"
|
||||
#include "core/sufami-turbo.cpp"
|
||||
Icarus icarus;
|
||||
|
|
@ -60,7 +67,7 @@ auto nall::main(lstring args) -> void {
|
|||
if(string source = BrowserDialog()
|
||||
.setTitle("Load ROM Image")
|
||||
.setPath(settings["icarus/Path"].text())
|
||||
.setFilters("ROM Files|*.fc:*.nes:*.sfc:*.smc:*.gb:*.gbc:*.gba:*.bs:*.st:*.zip")
|
||||
.setFilters("ROM Files|*.fc:*.nes:*.sfc:*.smc:*.gb:*.gbc:*.gba:*.ws:*.wsc:*.bs:*.st:*.zip")
|
||||
.openFile()) {
|
||||
if(string target = icarus.import(source)) {
|
||||
settings["icarus/Path"].setValue(pathname(source));
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@
|
|||
<string>icarus.icns</string>
|
||||
-->
|
||||
<key>NSHighResolutionCapable</key>
|
||||
<true/>
|
||||
<false/>
|
||||
<key>NSSupportsAutomaticGraphicsSwitching</key>
|
||||
<true/>
|
||||
</dict>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@ struct Settings : Markup::Node {
|
|||
};
|
||||
|
||||
Settings::Settings() {
|
||||
Markup::Node::operator=(BML::unserialize(string::read(locate({configpath(), "icarus/"}, "settings.bml"))));
|
||||
Markup::Node::operator=(BML::unserialize(string::read(locate("settings.bml"))));
|
||||
|
||||
auto set = [&](const string& name, const string& value) {
|
||||
//create node and set to default value only if it does not already exist
|
||||
|
|
@ -20,6 +20,5 @@ Settings::Settings() {
|
|||
}
|
||||
|
||||
Settings::~Settings() {
|
||||
directory::create({configpath(), "icarus/"});
|
||||
file::write(locate({configpath(), "icarus/"}, "settings.bml"), BML::serialize(*this));
|
||||
file::write(locate("settings.bml"), BML::serialize(*this));
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue