mirror of https://github.com/bsnes-emu/bsnes.git
Update to bsnes v042r03? release.
I mentioned I wouldn't be posting a new WIP for a while so that I could work on something in secret. That way in case it didn't work out, nobody would be bummed out. Imagine my surprise when it only took me two days to get this far ... Image Image Image Image Image Image (I removed the title-bar text for the sake of the screenshot aesthetic. Check the WIP yourself if you don't believe it.) Kirby's Dream Land 3 and Dragon Ball Z: Hyper Dimension are fully playable. Note that most games aren't playable, and most of the chip's added features are missing. Speed took a ~3-5% hit for non-SA1 games due to all the new co- processor thread synchronization primitives that you can't really hide from inlined, super-intensive sections of the scheduler code. As of now, and this will change, SA-1 games run about ~60% slower than normal games. Meaning you'll really want at least an E4500, but preferrably an E8400; and no filters. The most impressive part is that I emulate this at the bus/clock level. Meaning if both the S-CPU and SA-1 access RAM at the same time, they'll see the changes and stay perfectly in sync. I even emulated the bus conflict resolution of the SA-1 memory controller. So in terms of accuracy, this is akin to the cycle-level S-PPU. It's the "theoretical worst case" for the most processor-intensive, lowest- possible emulation achievable. I believe it was _Demo_ who speculated that it'd take at least a 10GHz processor to achieve this. Then again, it's been so long I could be attributing the quote to the wrong person. Don't even remember the exact words anymore. Anyone recall? This gives us insight into the kind of performance we can expect from the cycle-PPU (also runs at 10.74MHz) and SuperFX. For SA-1+cycle S-PPU, it would appear that there is no processor on the market that can maintain full speed with that combo yet, heh. By the time I get around to S-PPU, there most likely will be though. Lastly, don't bug me about SuperFX support because of this. This SA-1 support is a simple subclass of the core S-CPU that already existed in cycle-perfect, bug-free form; plus a memory mapper and ALU. Lots more to go, and even then, this is easily multiple times less work than the SuperFX is going to be. [No archive available]
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