mirror of https://github.com/bsnes-emu/bsnes.git
Merge branch 'master' into new_apu
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commit
02ac609f3c
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@ -292,12 +292,12 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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Todo: Investigate what causes the difference between our findings */
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uint8_t stat_delay = gb->cgb_double_speed? 2 : 4; // (gb->cgb_mode? 0 : 4);
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/* Todo: Is this correct for DMG mode CGB? */
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uint8_t scx_delay = gb->effective_scx;
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uint8_t scx_delay = gb->effective_scx & 7;
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if (gb->cgb_double_speed) {
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scx_delay = (scx_delay + 1) & ~1 & 7;
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scx_delay = (scx_delay + 1) & ~1;
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}
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else {
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scx_delay = (scx_delay + (gb->first_scanline ? 2 : 0)) & ~3 & 7;
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scx_delay = (scx_delay + (gb->first_scanline ? 2 : 0)) & ~3;
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}
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/* Todo: These are correct for DMG, DMG-mode CGB, and single speed CGB. Is is correct for double speed CGB? */
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@ -1361,16 +1361,34 @@ void GB_cpu_run(GB_gameboy_t *gb)
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}
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if (effecitve_ime && interrupt_queue) {
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nop(gb, 0);
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uint16_t call_addr = gb->pc - 1;
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GB_advance_cycles(gb, 8);
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gb->registers[GB_REGISTER_SP] -= 2;
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GB_write_memory(gb, gb->registers[GB_REGISTER_SP] + 1, (gb->pc) >> 8);
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interrupt_queue = gb->interrupt_enable;
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GB_advance_cycles(gb, 4);
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GB_write_memory(gb, gb->registers[GB_REGISTER_SP], (gb->pc) & 0xFF);
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interrupt_queue &= (gb->io_registers[GB_IO_IF] | gb->future_interrupts) & 0x1F;
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gb->io_registers[GB_IO_IF] |= gb->future_interrupts;
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gb->future_interrupts = 0;
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GB_advance_cycles(gb, 4);
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if (interrupt_queue) {
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uint8_t interrupt_bit = 0;
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while (!(interrupt_queue & 1)) {
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interrupt_queue >>= 1;
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interrupt_bit++;
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}
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gb->io_registers[GB_IO_IF] &= ~(1 << interrupt_bit);
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gb->pc = interrupt_bit * 8 + 0x40;
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}
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else {
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gb->pc = 0;
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}
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gb->ime = false;
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nop(gb, 0);
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/* Run pseudo instructions rst 40-60*/
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rst(gb, 0x87 + interrupt_bit * 8);
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GB_debugger_call_hook(gb, call_addr);
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}
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else if(!gb->halted && !gb->stopped) {
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uint8_t opcode = GB_read_memory(gb, gb->pc++);
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