2016-01-27 11:31:39 +00:00
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#include <ws/ws.hpp>
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namespace WonderSwan {
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2016-03-02 11:19:33 +00:00
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IO* iomap[64 * 1024] = {nullptr};
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2016-03-08 11:34:00 +00:00
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InternalRAM iram;
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2016-01-27 11:31:39 +00:00
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Bus bus;
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auto IO::power() -> void {
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static IO unmapped;
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2016-01-28 11:39:49 +00:00
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for(auto& n : iomap) n = &unmapped;
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}
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2016-01-30 06:40:35 +00:00
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auto IO::portRead(uint16 addr) -> uint8 {
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2016-03-01 12:23:18 +00:00
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//print("[", hex(addr, 4L), "]: port unmapped\n");
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2016-01-30 06:40:35 +00:00
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return 0x00;
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2016-01-28 11:39:49 +00:00
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}
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2016-01-30 06:40:35 +00:00
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auto IO::portWrite(uint16 addr, uint8 data) -> void {
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2016-03-01 12:23:18 +00:00
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//print("[", hex(addr, 4L), "] = ", hex(data, 2L), ": port unmapped\n");
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2016-01-27 11:31:39 +00:00
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}
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2016-03-08 11:34:00 +00:00
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auto InternalRAM::power() -> void {
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for(auto& byte : memory) byte = 0x00;
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}
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auto InternalRAM::read(uint16 addr, uint size) -> uint32 {
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if(size == Long) return read(addr + 0, Word) << 0 | read(addr + 2, Word) << 16;
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if(size == Word) return read(addr + 0, Byte) << 0 | read(addr + 1, Byte) << 8;
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if(addr >= 0x4000 && !system.r.depth) return 0x90;
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return memory[addr];
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}
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auto InternalRAM::write(uint16 addr, uint8 data) -> void {
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if(addr >= 0x4000 && !system.r.depth) return;
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memory[addr] = data;
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}
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2016-01-27 11:31:39 +00:00
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auto Bus::read(uint20 addr) -> uint8 {
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2016-03-08 11:34:00 +00:00
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if(addr.bits(16,19) == 0) return iram.read(addr);
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2016-03-02 11:19:33 +00:00
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if(addr.bits(16,19) == 1) return cartridge.ramRead(addr);
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if(addr.bits(16,19) >= 2) return cartridge.romRead(addr);
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unreachable;
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2016-01-27 11:31:39 +00:00
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}
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auto Bus::write(uint20 addr, uint8 data) -> void {
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2016-03-08 11:34:00 +00:00
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if(addr.bits(16,19) == 0) return iram.write(addr, data);
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2016-03-02 11:19:33 +00:00
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if(addr.bits(16,19) == 1) return cartridge.ramWrite(addr, data);
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if(addr.bits(16,19) >= 2) return cartridge.romWrite(addr, data);
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2016-01-27 11:31:39 +00:00
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}
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}
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