2012-03-27 11:02:57 +00:00
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bool ARM::condition(uint4 condition) {
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switch(condition) {
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case 0: return cpsr().z == 1; //EQ (equal)
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case 1: return cpsr().z == 0; //NE (not equal)
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case 2: return cpsr().c == 1; //CS (carry set)
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case 3: return cpsr().c == 0; //CC (carry clear)
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case 4: return cpsr().n == 1; //MI (negative)
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case 5: return cpsr().n == 0; //PL (positive)
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case 6: return cpsr().v == 1; //VS (overflow)
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case 7: return cpsr().v == 0; //VC (no overflow)
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case 8: return cpsr().c == 1 && cpsr().z == 0; //HI (unsigned higher)
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case 9: return cpsr().c == 0 || cpsr().z == 1; //LS (unsigned lower or same)
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case 10: return cpsr().n == cpsr().v; //GE (signed greater than or equal)
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case 11: return cpsr().n != cpsr().v; //LT (signed less than)
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case 12: return cpsr().z == 0 && cpsr().n == cpsr().v; //GT (signed greater than)
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case 13: return cpsr().z == 1 || cpsr().n != cpsr().v; //LE (signed less than or equal)
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case 14: return true; //AL (always)
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case 15: return false; //NV (never)
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}
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}
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2012-03-29 11:58:10 +00:00
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uint32 ARM::bit(uint32 result) {
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if(cpsr().t || instruction() & (1 << 20)) {
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cpsr().n = result >> 31;
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cpsr().z = result == 0;
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cpsr().c = carryout();
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}
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return result;
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}
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uint32 ARM::add(uint32 source, uint32 modify, bool carry) {
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uint32 result = source + modify + carry;
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if(cpsr().t || instruction() & (1 << 20)) {
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uint32 overflow = ~(source ^ modify) & (source ^ result);
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cpsr().n = result >> 31;
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cpsr().z = result == 0;
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cpsr().c = (1u << 31) & (overflow ^ source ^ modify ^ result);
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cpsr().v = (1u << 31) & (overflow);
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}
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return result;
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}
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uint32 ARM::sub(uint32 source, uint32 modify, bool carry) {
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return add(source, ~modify, carry);
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}
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uint32 ARM::mul(uint32 product, uint32 multiplicand, uint32 multiplier) {
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2012-03-31 08:17:36 +00:00
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product += multiplicand * multiplier;
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2012-03-29 11:58:10 +00:00
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if(cpsr().t || instruction() & (1 << 20)) {
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cpsr().n = product >> 31;
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cpsr().z = product == 0;
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}
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return product;
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}
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2012-04-15 06:49:56 +00:00
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uint32 ARM::lsl(uint32 source, uint8 shift) {
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carryout() = cpsr().c;
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if(shift == 0) return source;
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2012-03-29 11:58:10 +00:00
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2012-04-15 06:49:56 +00:00
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carryout() = shift > 32 ? 0 : source & (1 << 32 - shift);
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source = shift > 31 ? 0 : source << shift;
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2012-03-29 11:58:10 +00:00
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return source;
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}
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2012-04-15 06:49:56 +00:00
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uint32 ARM::lsr(uint32 source, uint8 shift) {
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carryout() = cpsr().c;
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if(shift == 0) return source;
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2012-03-29 11:58:10 +00:00
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2012-04-15 06:49:56 +00:00
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carryout() = shift > 32 ? 0 : source & (1 << shift - 1);
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source = shift > 31 ? 0 : source >> shift;
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2012-03-29 11:58:10 +00:00
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return source;
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}
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2012-04-15 06:49:56 +00:00
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uint32 ARM::asr(uint32 source, uint8 shift) {
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carryout() = cpsr().c;
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if(shift == 0) return source;
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2012-03-29 11:58:10 +00:00
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2012-04-15 06:49:56 +00:00
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carryout() = shift > 32 ? source & (1 << 31) : source & (1 << shift - 1);
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source = shift > 31 ? (int32)source >> 31 : (int32)source >> shift;
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2012-03-29 11:58:10 +00:00
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return source;
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}
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2012-04-15 06:49:56 +00:00
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uint32 ARM::ror(uint32 source, uint8 shift) {
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carryout() = cpsr().c;
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if(shift == 0) return source;
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2012-03-29 11:58:10 +00:00
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2012-04-15 06:49:56 +00:00
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if(shift &= 31)
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source = source << 32 - shift | source >> shift;
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carryout() = source & (1 << 31);
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2012-03-29 11:58:10 +00:00
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return source;
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}
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uint32 ARM::rrx(uint32 source) {
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carryout() = source & 1;
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2012-03-31 08:17:36 +00:00
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return (cpsr().c << 31) | (source >> 1);
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2012-03-29 11:58:10 +00:00
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}
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