2015-06-28 08:44:56 +00:00
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auto CPU::prefetch_stall() -> void {
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prefetch.stalled = true;
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2015-06-27 02:38:08 +00:00
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}
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2015-06-28 08:44:56 +00:00
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auto CPU::prefetch_start(uint32 addr) -> void {
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prefetch.stalled = false;
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prefetch.slots = 0;
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prefetch.input = 0;
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prefetch.output = 0;
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prefetch.addr = addr;
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prefetch.wait = bus.wait(addr, Half, Nonsequential);
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}
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auto CPU::prefetch_step(unsigned clocks) -> void {
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if(!regs.wait.control.prefetch || prefetch.stalled) return;
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prefetch.wait -= clocks;
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while(prefetch.wait <= 0) {
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if(prefetch.slots < 8) {
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prefetch.slot[prefetch.output++] = cartridge.read(prefetch.addr, Half);
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prefetch.slots++;
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prefetch.addr += 2;
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}
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prefetch.wait += bus.wait(prefetch.addr, Half, Sequential);
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2015-06-27 02:38:08 +00:00
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}
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2015-06-28 08:44:56 +00:00
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}
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auto CPU::prefetch_wait() -> void {
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step(prefetch.wait);
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prefetch_step(prefetch.wait);
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2015-06-27 02:38:08 +00:00
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}
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auto CPU::prefetch_take() -> uint16 {
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2015-06-28 08:44:56 +00:00
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if(prefetch.slots) {
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step(1);
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prefetch_step(1);
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} else {
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prefetch_wait();
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}
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prefetch.slots--;
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return prefetch.slot[prefetch.input++];
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2015-06-27 02:38:08 +00:00
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}
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