Update to v101r24 release.
byuu says:
Changelog:
- SMS: extended bus mapping of in/out ports: now decoding them fully
inside ms/bus
- SMS: moved Z80 disassembly code from processor/z80 to ms/cpu
(cosmetic)
- SMS: hooked up non-functional silent PSG sample generation, so I can
cap the framerate at 60fps
- SMS: hooked up the VDP main loop: 684 clocks/scanline, 262
scanlines/frame (no PAL support yet)
- SMS: emulated the VDP Vcounter and Hcounter polling ... hopefully
it's right, as it's very bizarre
- SMS: emulated VDP in/out ports (data read, data write, status read,
control write, register write)
- SMS: decoding and caching all VDP register flags (variable names
will probably change)
- nall: \#undef IN on Windows port (prevent compilation warning on
processor/z80)
Watching Sonic the Hedgehog, I can definitely see some VDP register
writes going through, which is a good sign.
Probably the big thing that's needed before I can get enough into the
VDP to start showing graphics is interrupt support. And interrupts are
never fun to figure out :/
What really sucks on this front is I'm flying blind on the Z80 CPU core.
Without a working VDP, I can't run any Z80 test ROMs to look for CPU
bugs. And the CPU is certainly too buggy still to run said test ROM
anyway. I can't find any SMS emulators with trace logging from reset.
Such logs vastly accelerate tracking down CPU logic bugs, so without
them, it's going to take a lot longer.
2016-12-17 11:31:34 +00:00
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auto VDP::vcounter() -> uint8 {
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if(io.lines240) {
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//NTSC 256x240
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return io.vcounter;
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} else if(io.lines224) {
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//NTSC 256x224
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return io.vcounter <= 234 ? io.vcounter : io.vcounter - 6;
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} else {
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//NTSC 256x192
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return io.vcounter <= 218 ? io.vcounter : io.vcounter - 6;
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}
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unreachable;
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}
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auto VDP::hcounter() -> uint8 {
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2016-12-26 12:09:56 +00:00
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uint hcounter = io.hcounter >> 1;
|
Update to v101r24 release.
byuu says:
Changelog:
- SMS: extended bus mapping of in/out ports: now decoding them fully
inside ms/bus
- SMS: moved Z80 disassembly code from processor/z80 to ms/cpu
(cosmetic)
- SMS: hooked up non-functional silent PSG sample generation, so I can
cap the framerate at 60fps
- SMS: hooked up the VDP main loop: 684 clocks/scanline, 262
scanlines/frame (no PAL support yet)
- SMS: emulated the VDP Vcounter and Hcounter polling ... hopefully
it's right, as it's very bizarre
- SMS: emulated VDP in/out ports (data read, data write, status read,
control write, register write)
- SMS: decoding and caching all VDP register flags (variable names
will probably change)
- nall: \#undef IN on Windows port (prevent compilation warning on
processor/z80)
Watching Sonic the Hedgehog, I can definitely see some VDP register
writes going through, which is a good sign.
Probably the big thing that's needed before I can get enough into the
VDP to start showing graphics is interrupt support. And interrupts are
never fun to figure out :/
What really sucks on this front is I'm flying blind on the Z80 CPU core.
Without a working VDP, I can't run any Z80 test ROMs to look for CPU
bugs. And the CPU is certainly too buggy still to run said test ROM
anyway. I can't find any SMS emulators with trace logging from reset.
Such logs vastly accelerate tracking down CPU logic bugs, so without
them, it's going to take a lot longer.
2016-12-17 11:31:34 +00:00
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return hcounter <= 233 ? hcounter : hcounter - 86;
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}
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auto VDP::data() -> uint8 {
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io.controlLatch = 0;
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auto data = io.vramLatch;
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io.vramLatch = vram[io.address++];
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return data;
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}
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auto VDP::status() -> uint8 {
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io.controlLatch = 0;
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2016-12-26 12:09:56 +00:00
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uint8 result = 0x00;
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result |= io.intFrame << 7;
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result |= io.spriteOverflow << 6;
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result |= io.spriteCollision << 5;
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result |= io.fifthSprite << 0;
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io.intLine = 0;
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io.intFrame = 0;
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io.spriteOverflow = 0;
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io.spriteCollision = 0;
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io.fifthSprite = 0;
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return result;
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Update to v101r24 release.
byuu says:
Changelog:
- SMS: extended bus mapping of in/out ports: now decoding them fully
inside ms/bus
- SMS: moved Z80 disassembly code from processor/z80 to ms/cpu
(cosmetic)
- SMS: hooked up non-functional silent PSG sample generation, so I can
cap the framerate at 60fps
- SMS: hooked up the VDP main loop: 684 clocks/scanline, 262
scanlines/frame (no PAL support yet)
- SMS: emulated the VDP Vcounter and Hcounter polling ... hopefully
it's right, as it's very bizarre
- SMS: emulated VDP in/out ports (data read, data write, status read,
control write, register write)
- SMS: decoding and caching all VDP register flags (variable names
will probably change)
- nall: \#undef IN on Windows port (prevent compilation warning on
processor/z80)
Watching Sonic the Hedgehog, I can definitely see some VDP register
writes going through, which is a good sign.
Probably the big thing that's needed before I can get enough into the
VDP to start showing graphics is interrupt support. And interrupts are
never fun to figure out :/
What really sucks on this front is I'm flying blind on the Z80 CPU core.
Without a working VDP, I can't run any Z80 test ROMs to look for CPU
bugs. And the CPU is certainly too buggy still to run said test ROM
anyway. I can't find any SMS emulators with trace logging from reset.
Such logs vastly accelerate tracking down CPU logic bugs, so without
them, it's going to take a lot longer.
2016-12-17 11:31:34 +00:00
|
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}
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auto VDP::data(uint8 data) -> void {
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io.controlLatch = 0;
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if(io.code <= 2) {
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vram[io.address++] = data;
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} else {
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2017-01-13 01:15:45 +00:00
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uint mask = 0;
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2017-02-21 11:07:33 +00:00
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if(Model::MasterSystem()) mask = 0x1f;
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if(Model::GameGear()) mask = 0x3f;
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2017-01-13 01:15:45 +00:00
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cram[io.address++ & mask] = data;
|
Update to v101r24 release.
byuu says:
Changelog:
- SMS: extended bus mapping of in/out ports: now decoding them fully
inside ms/bus
- SMS: moved Z80 disassembly code from processor/z80 to ms/cpu
(cosmetic)
- SMS: hooked up non-functional silent PSG sample generation, so I can
cap the framerate at 60fps
- SMS: hooked up the VDP main loop: 684 clocks/scanline, 262
scanlines/frame (no PAL support yet)
- SMS: emulated the VDP Vcounter and Hcounter polling ... hopefully
it's right, as it's very bizarre
- SMS: emulated VDP in/out ports (data read, data write, status read,
control write, register write)
- SMS: decoding and caching all VDP register flags (variable names
will probably change)
- nall: \#undef IN on Windows port (prevent compilation warning on
processor/z80)
Watching Sonic the Hedgehog, I can definitely see some VDP register
writes going through, which is a good sign.
Probably the big thing that's needed before I can get enough into the
VDP to start showing graphics is interrupt support. And interrupts are
never fun to figure out :/
What really sucks on this front is I'm flying blind on the Z80 CPU core.
Without a working VDP, I can't run any Z80 test ROMs to look for CPU
bugs. And the CPU is certainly too buggy still to run said test ROM
anyway. I can't find any SMS emulators with trace logging from reset.
Such logs vastly accelerate tracking down CPU logic bugs, so without
them, it's going to take a lot longer.
2016-12-17 11:31:34 +00:00
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}
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}
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auto VDP::control(uint8 data) -> void {
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if(io.controlLatch == 0) {
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io.controlLatch = 1;
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io.address.bits(0,7) = data.bits(0,7);
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return;
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} else {
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io.controlLatch = 0;
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io.address.bits(8,13) = data.bits(0,5);
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io.code.bits(0,1) = data.bits(6,7);
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}
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if(io.code == 0) {
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io.vramLatch = vram[io.address++];
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}
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if(io.code == 2) {
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registerWrite(io.address.bits(11,8), io.address.bits(7,0));
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}
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}
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auto VDP::registerWrite(uint4 addr, uint8 data) -> void {
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switch(addr) {
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//mode control 1
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case 0x0: {
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io.externalSync = data.bit(0);
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io.extendedHeight = data.bit(1);
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io.mode4 = data.bit(2);
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io.spriteShift = data.bit(3);
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io.lineInterrupts = data.bit(4);
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io.leftClip = data.bit(5);
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io.horizontalScrollLock = data.bit(6);
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io.verticalScrollLock = data.bit(7);
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return;
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}
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//mode control 2
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case 0x1: {
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io.spriteDouble = data.bit(0);
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io.spriteTile = data.bit(1);
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io.lines240 = data.bit(3);
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io.lines224 = data.bit(4);
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io.frameInterrupts = data.bit(5);
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io.displayEnable = data.bit(6);
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return;
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}
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//name table base address
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case 0x2: {
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io.nameTableMask = data.bit(0);
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io.nameTableAddress = data.bits(1,3);
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return;
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}
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//color table base address
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case 0x3: {
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io.colorTableAddress = data.bits(0,7);
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return;
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}
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//pattern table base address
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case 0x4: {
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io.patternTableAddress = data.bits(0,7);
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return;
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}
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//sprite attribute table base address
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case 0x5: {
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io.spriteAttributeTableMask = data.bit(0);
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io.spriteAttributeTableAddress = data.bits(1,6);
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return;
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}
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//sprite pattern table base address
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case 0x6: {
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io.spritePatternTableMask = data.bits(0,1);
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io.spritePatternTableAddress = data.bit(2);
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return;
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}
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//backdrop color
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case 0x7: {
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io.backdropColor = data.bits(0,3);
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return;
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}
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//horizontal scroll offset
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case 0x8: {
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io.hscroll = data.bits(0,7);
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return;
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}
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//vertical scroll offset
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case 0x9: {
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io.vscroll = data.bits(0,7);
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return;
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}
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//line counter
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case 0xa: {
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io.lineCounter = data.bits(0,7);
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return;
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}
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//0xb - 0xf unmapped
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}
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}
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