bsnes/higan/gba/cpu/cpu.hpp

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struct CPU : Processor::ARM, Thread, MMIO {
using ARM::read;
using ARM::write;
struct Interrupt {
enum : uint {
VBlank = 0x0001,
HBlank = 0x0002,
VCoincidence = 0x0004,
Timer0 = 0x0008,
Timer1 = 0x0010,
Timer2 = 0x0020,
Timer3 = 0x0040,
Serial = 0x0080,
DMA0 = 0x0100,
DMA1 = 0x0200,
DMA2 = 0x0400,
DMA3 = 0x0800,
Keypad = 0x1000,
Cartridge = 0x2000,
};
};
#include "registers.hpp"
#include "prefetch.hpp"
#include "state.hpp"
//cpu.cpp
CPU();
~CPU();
static auto Enter() -> void;
auto main() -> void;
auto step(uint clocks) -> void override;
auto sync_step(uint clocks) -> void;
auto keypad_run() -> void;
auto power() -> void;
//bus.cpp
Update to v098r06 release. byuu says: Changelog: - emulation cores now refresh video from host thread instead of cothreads (fix AMD crash) - SFC: fixed another bug with leap year months in SharpRTC emulation - SFC: cleaned up camelCase on function names for armdsp,epsonrtc,hitachidsp,mcc,nss,sharprtc classes - GB: added MBC1M emulation (requires manually setting mapper=MBC1M in manifest.bml for now, sorry) - audio: implemented Emulator::Audio mixer and effects processor - audio: implemented Emulator::Stream interface - it is now possible to have more than two audio streams: eg SNES + SGB + MSU1 + Voicer-Kun (eventually) - audio: added reverb delay + reverb level settings; exposed balance configuration in UI - video: reworked palette generation to re-enable saturation, gamma, luminance adjustments - higan/emulator.cpp is gone since there was nothing left in it I know you guys are going to say the color adjust/balance/reverb stuff is pointless. And indeed it mostly is. But I like the idea of allowing some fun special effects and configurability that isn't system-wide. Note: there seems to be some kind of added audio lag in the SGB emulation now, and I don't really understand why. The code should be effectively identical to what I had before. The only main thing is that I'm sampling things to 48000hz instead of 32040hz before mixing. There's no point where I'm intentionally introducing added latency though. I'm kind of stumped, so if anyone wouldn't mind taking a look at it, it'd be much appreciated :/ I don't have an MSU1 test ROM, but the latency issue may affect MSU1 as well, and that would be very bad.
2016-04-22 13:35:51 +00:00
auto busIdle() -> void override;
auto busRead(uint mode, uint32 addr) -> uint32 override;
auto busWrite(uint mode, uint32 addr, uint32 word) -> void override;
auto busWait(uint mode, uint32 addr) -> uint;
//mmio.cpp
auto read(uint32 addr) -> uint8;
auto write(uint32 addr, uint8 byte) -> void;
auto iwram_read(uint mode, uint32 addr) -> uint32;
auto iwram_write(uint mode, uint32 addr, uint32 word) -> void;
auto ewram_read(uint mode, uint32 addr) -> uint32;
auto ewram_write(uint mode, uint32 addr, uint32 word) -> void;
//dma.cpp
auto dma_run() -> void;
auto dma_exec(Registers::DMA& dma) -> void;
auto dma_vblank() -> void;
auto dma_hblank() -> void;
auto dma_hdma() -> void;
//timer.cpp
auto timer_step(uint clocks) -> void;
auto timer_increment(uint n) -> void;
auto timer_fifo_run(uint n) -> void;
//serialization.cpp
auto serialize(serializer&) -> void;
uint8* iwram = nullptr;
uint8* ewram = nullptr;
};
extern CPU cpu;