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bsnes/higan/processor/v30mz/v30mz.cpp

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Update to v097r03 release. byuu says: So, this WIP starts work on something new for higan. Obviously, I can't keep it a secret until it's ready, because I want to continue daily WIP releases, and of course, solicit feedback as I go along.
2016-01-27 11:31:39 +00:00
#include <processor/processor.hpp>
#include "v30mz.hpp"
namespace Processor {
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
#include "registers.cpp"
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
#include "modrm.cpp"
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
#include "memory.cpp"
Update to v097r05 release. byuu says: More V30MZ implemented, a lot more to go. icarus now supports importing WS and WSC games. It expects them to have the correct file extension, same for GB and GBC. > Ugh, apparently HiDPI icarus doesn't let you press the check boxes. I set the flag value in the plist to false for now. Forgot to do it for higan, but hopefully I won't forget before release.
2016-01-30 06:40:35 +00:00
#include "algorithms.cpp"
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
#include "instructions-adjust.cpp"
#include "instructions-alu.cpp"
#include "instructions-exec.cpp"
#include "instructions-flag.cpp"
#include "instructions-group.cpp"
#include "instructions-misc.cpp"
#include "instructions-move.cpp"
#include "instructions-string.cpp"
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
#include "disassembler.cpp"
Update to v097r22 release. byuu says: Changelog: - WS: fixed lods, scas instructions - WS: implemented missing GRP4 instructions - WS: fixed transparency for screen one - WSC: added color-mode PPU rendering - WS+WSC: added packed pixel mode support - WS+WSC: added dummy sound register reads/writes - SFC: added threading to SuperDisc (it's hanging for right now; need to clear IRQ on $21e2 writes) SuperDisc Timer and Sound Check were failing before due to not turning off IRQs on $21e4 clear, so I'm happy that's fixed now. Riviera starts now, and displays the first intro screen before crashing. Huge, huge amounts of corrupted graphics, though. This game's really making me work for it :( No color games seem fully playable yet, but a lot of monochrome and color games are now at least showing more intro screen graphics before dying. This build defaults to horizontal orientation, but I left the inputs bound to vertical orientation. Whoops. I still need to implement a screen flip key binding.
2016-03-08 11:34:00 +00:00
auto V30MZ::debug(string text) -> void {
print(text, "\n");
}
Update to v097r03 release. byuu says: So, this WIP starts work on something new for higan. Obviously, I can't keep it a secret until it's ready, because I want to continue daily WIP releases, and of course, solicit feedback as I go along.
2016-01-27 11:31:39 +00:00
auto V30MZ::exec() -> void {
Update to v097r11 release. byuu says: Alright, well interrupts are in. At least Vblank is. I also fixed a bug in vector() indexing, MoDRM mod!=3&&reg==6 using SS instead of DS, opcodes a0-a3 allowing segment override, and added the "irq_disable" stuff to the relevant opcodes to suppress IRQs after certain instructions. But unfortunately ... still no go on Riviera. It's not reading any unmapped ports, and although it enables Vblank IRQs and they set port $b4's status bit, the game never sets the IE flag, so no interrupts ever actually fire. The game does indeed appear to be sitting in a rather huge loop, which is probably dependent upon some RAM variable being set from the Vblank IRQ, but I don't know how I'm supposed to be triggering it. ... I'm really quite stumped here >_>
2016-02-04 21:18:06 +00:00
state.poll = true;
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
if(state.halt) return wait(1);
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
#if 0
Update to v097r11 release. byuu says: Alright, well interrupts are in. At least Vblank is. I also fixed a bug in vector() indexing, MoDRM mod!=3&&reg==6 using SS instead of DS, opcodes a0-a3 allowing segment override, and added the "irq_disable" stuff to the relevant opcodes to suppress IRQs after certain instructions. But unfortunately ... still no go on Riviera. It's not reading any unmapped ports, and although it enables Vblank IRQs and they set port $b4's status bit, the game never sets the IE flag, so no interrupts ever actually fire. The game does indeed appear to be sitting in a rather huge loop, which is probably dependent upon some RAM variable being set from the Vblank IRQ, but I don't know how I'm supposed to be triggering it. ... I'm really quite stumped here >_>
2016-02-04 21:18:06 +00:00
static uint counter = 0;
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
static uint16 cs = 0, ip = 0;
if(cs != r.cs || ip != r.ip) print(disassemble(cs = r.cs, ip = r.ip), "\n");
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
#endif
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
instruction();
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
if(state.prefix) {
state.prefix = false;
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
} else {
Update to v097r09 release. 244 of 256 opcodes implemented now, although the interrupt triggering portions are missing from them still. Much better handling of prefixes now. I definitely have a newfound hatepreciation for x86 now >_>
2016-02-03 10:24:58 +00:00
prefix.repeat = nothing;
Update to v097r11 release. byuu says: Alright, well interrupts are in. At least Vblank is. I also fixed a bug in vector() indexing, MoDRM mod!=3&&reg==6 using SS instead of DS, opcodes a0-a3 allowing segment override, and added the "irq_disable" stuff to the relevant opcodes to suppress IRQs after certain instructions. But unfortunately ... still no go on Riviera. It's not reading any unmapped ports, and although it enables Vblank IRQs and they set port $b4's status bit, the game never sets the IE flag, so no interrupts ever actually fire. The game does indeed appear to be sitting in a rather huge loop, which is probably dependent upon some RAM variable being set from the Vblank IRQ, but I don't know how I'm supposed to be triggering it. ... I'm really quite stumped here >_>
2016-02-04 21:18:06 +00:00
prefix.segment = nothing;
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
}
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
}
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
auto V30MZ::instruction() -> void {
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
auto opcode = fetch();
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
wait(1);
switch(opcode) {
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x00: return opAddMemReg(Byte);
case 0x01: return opAddMemReg(Word);
case 0x02: return opAddRegMem(Byte);
case 0x03: return opAddRegMem(Word);
case 0x04: return opAddAccImm(Byte);
case 0x05: return opAddAccImm(Word);
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0x06: return opPushReg(r.es);
case 0x07: return opPopReg(r.es);
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x08: return opOrMemReg(Byte);
case 0x09: return opOrMemReg(Word);
case 0x0a: return opOrRegMem(Byte);
case 0x0b: return opOrRegMem(Word);
case 0x0c: return opOrAccImm(Byte);
case 0x0d: return opOrAccImm(Word);
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0x0e: return opPushReg(r.cs);
case 0x0f: return; //pop cs
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x10: return opAdcMemReg(Byte);
case 0x11: return opAdcMemReg(Word);
case 0x12: return opAdcRegMem(Byte);
case 0x13: return opAdcRegMem(Word);
case 0x14: return opAdcAccImm(Byte);
case 0x15: return opAdcAccImm(Word);
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0x16: return opPushReg(r.ss);
case 0x17: return opPopReg(r.ss);
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x18: return opSbbMemReg(Byte);
case 0x19: return opSbbMemReg(Word);
case 0x1a: return opSbbRegMem(Byte);
case 0x1b: return opSbbRegMem(Word);
case 0x1c: return opSbbAccImm(Byte);
case 0x1d: return opSbbAccImm(Word);
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0x1e: return opPushReg(r.ds);
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
case 0x1f: return opPopReg(r.ds);
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x20: return opAndMemReg(Byte);
case 0x21: return opAndMemReg(Word);
case 0x22: return opAndRegMem(Byte);
case 0x23: return opAndRegMem(Word);
case 0x24: return opAndAccImm(Byte);
case 0x25: return opAndAccImm(Word);
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
case 0x26: return opSegment(r.es);
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0x27: return opDecimalAdjust(0); //daa
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x28: return opSubMemReg(Byte);
case 0x29: return opSubMemReg(Word);
case 0x2a: return opSubRegMem(Byte);
case 0x2b: return opSubRegMem(Word);
case 0x2c: return opSubAccImm(Byte);
case 0x2d: return opSubAccImm(Word);
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
case 0x2e: return opSegment(r.cs);
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0x2f: return opDecimalAdjust(1); //das
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x30: return opXorMemReg(Byte);
case 0x31: return opXorMemReg(Word);
case 0x32: return opXorRegMem(Byte);
case 0x33: return opXorRegMem(Word);
case 0x34: return opXorAccImm(Byte);
case 0x35: return opXorAccImm(Word);
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
case 0x36: return opSegment(r.ss);
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0x37: return opAsciiAdjust(0); //aaa
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x38: return opCmpMemReg(Byte);
case 0x39: return opCmpMemReg(Word);
case 0x3a: return opCmpRegMem(Byte);
case 0x3b: return opCmpRegMem(Word);
case 0x3c: return opCmpAccImm(Byte);
case 0x3d: return opCmpAccImm(Word);
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
case 0x3e: return opSegment(r.ds);
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0x3f: return opAsciiAdjust(1); //aas
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x40: return opIncReg(r.ax);
case 0x41: return opIncReg(r.cx);
case 0x42: return opIncReg(r.dx);
case 0x43: return opIncReg(r.bx);
case 0x44: return opIncReg(r.sp);
case 0x45: return opIncReg(r.bp);
case 0x46: return opIncReg(r.si);
case 0x47: return opIncReg(r.di);
case 0x48: return opDecReg(r.ax);
case 0x49: return opDecReg(r.cx);
case 0x4a: return opDecReg(r.dx);
case 0x4b: return opDecReg(r.bx);
case 0x4c: return opDecReg(r.sp);
case 0x4d: return opDecReg(r.bp);
case 0x4e: return opDecReg(r.si);
case 0x4f: return opDecReg(r.di);
case 0x50: return opPushReg(r.ax);
case 0x51: return opPushReg(r.cx);
case 0x52: return opPushReg(r.dx);
case 0x53: return opPushReg(r.bx);
case 0x54: return opPushReg(r.sp);
case 0x55: return opPushReg(r.bp);
case 0x56: return opPushReg(r.si);
case 0x57: return opPushReg(r.di);
case 0x58: return opPopReg(r.ax);
case 0x59: return opPopReg(r.cx);
case 0x5a: return opPopReg(r.dx);
case 0x5b: return opPopReg(r.bx);
case 0x5c: return opPopReg(r.sp);
case 0x5d: return opPopReg(r.bp);
case 0x5e: return opPopReg(r.si);
case 0x5f: return opPopReg(r.di);
Update to v097r09 release. 244 of 256 opcodes implemented now, although the interrupt triggering portions are missing from them still. Much better handling of prefixes now. I definitely have a newfound hatepreciation for x86 now >_>
2016-02-03 10:24:58 +00:00
case 0x60: return opPushAll();
case 0x61: return opPopAll();
case 0x62: return opBound();
case 0x63: return;
case 0x64: return;
case 0x65: return;
case 0x66: return;
case 0x67: return;
case 0x68: return opPushImm(Word);
case 0x69: return opMultiplySignedRegMemImm(Word);
case 0x6a: return opPushImm(Byte);
case 0x6b: return opMultiplySignedRegMemImm(Byte);
case 0x6c: return opInString(Byte);
case 0x6d: return opInString(Word);
case 0x6e: return opOutString(Byte);
case 0x6f: return opOutString(Word);
Update to v097r05 release. byuu says: More V30MZ implemented, a lot more to go. icarus now supports importing WS and WSC games. It expects them to have the correct file extension, same for GB and GBC. > Ugh, apparently HiDPI icarus doesn't let you press the check boxes. I set the flag value in the plist to false for now. Forgot to do it for higan, but hopefully I won't forget before release.
2016-01-30 06:40:35 +00:00
case 0x70: return opJumpIf(r.f.v == 1);
case 0x71: return opJumpIf(r.f.v == 0);
case 0x72: return opJumpIf(r.f.c == 1);
case 0x73: return opJumpIf(r.f.c == 0);
case 0x74: return opJumpIf(r.f.z == 1);
case 0x75: return opJumpIf(r.f.z == 0);
case 0x76: return opJumpIf(r.f.z == 1 || r.f.c == 1);
case 0x77: return opJumpIf(r.f.z != 1 && r.f.c != 1);
case 0x78: return opJumpIf(r.f.s == 1);
case 0x79: return opJumpIf(r.f.s == 0);
case 0x7a: return opJumpIf(r.f.p == 1);
case 0x7b: return opJumpIf(r.f.p == 0);
case 0x7c: return opJumpIf(r.f.s != r.f.v && r.f.z == 0);
case 0x7d: return opJumpIf(r.f.s == r.f.v || r.f.z == 1);
case 0x7e: return opJumpIf(r.f.s != r.f.v || r.f.z == 1);
case 0x7f: return opJumpIf(r.f.s == r.f.v && r.f.z == 0);
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x80: return opGroup1MemImm(Byte, 0);
case 0x81: return opGroup1MemImm(Word, 0);
case 0x82: return opGroup1MemImm(Byte, 1);
case 0x83: return opGroup1MemImm(Word, 1);
Update to v097r09 release. 244 of 256 opcodes implemented now, although the interrupt triggering portions are missing from them still. Much better handling of prefixes now. I definitely have a newfound hatepreciation for x86 now >_>
2016-02-03 10:24:58 +00:00
case 0x84: return opTestMemReg(Byte);
case 0x85: return opTestMemReg(Word);
case 0x86: return opExchangeMemReg(Byte);
case 0x87: return opExchangeMemReg(Word);
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x88: return opMoveMemReg(Byte);
case 0x89: return opMoveMemReg(Word);
case 0x8a: return opMoveRegMem(Byte);
case 0x8b: return opMoveRegMem(Word);
Update to v097r09 release. 244 of 256 opcodes implemented now, although the interrupt triggering portions are missing from them still. Much better handling of prefixes now. I definitely have a newfound hatepreciation for x86 now >_>
2016-02-03 10:24:58 +00:00
case 0x8c: return opMoveMemSeg();
case 0x8d: return opLoadEffectiveAddressRegMem();
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x8e: return opMoveSegMem();
Update to v097r09 release. 244 of 256 opcodes implemented now, although the interrupt triggering portions are missing from them still. Much better handling of prefixes now. I definitely have a newfound hatepreciation for x86 now >_>
2016-02-03 10:24:58 +00:00
case 0x8f: return opPopMem();
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x90: return opNop();
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0x91: return opExchange(r.ax, r.cx);
case 0x92: return opExchange(r.ax, r.dx);
case 0x93: return opExchange(r.ax, r.bx);
case 0x94: return opExchange(r.ax, r.sp);
case 0x95: return opExchange(r.ax, r.bp);
case 0x96: return opExchange(r.ax, r.si);
case 0x97: return opExchange(r.ax, r.di);
Update to v097r09 release. 244 of 256 opcodes implemented now, although the interrupt triggering portions are missing from them still. Much better handling of prefixes now. I definitely have a newfound hatepreciation for x86 now >_>
2016-02-03 10:24:58 +00:00
case 0x98: return opSignExtendByte();
case 0x99: return opSignExtendWord();
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0x9a: return opCallFar();
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
case 0x9b: return opWait();
case 0x9c: return opPushFlags();
case 0x9d: return opPopFlags();
Update to v097r09 release. 244 of 256 opcodes implemented now, although the interrupt triggering portions are missing from them still. Much better handling of prefixes now. I definitely have a newfound hatepreciation for x86 now >_>
2016-02-03 10:24:58 +00:00
case 0x9e: return opStoreFlagsAcc();
case 0x9f: return opLoadAccFlags();
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0xa0: return opMoveAccMem(Byte);
case 0xa1: return opMoveAccMem(Word);
case 0xa2: return opMoveMemAcc(Byte);
case 0xa3: return opMoveMemAcc(Word);
Update to v097r06 release. byuu says: Man, the 80186 is taking a lot longer to implement than I thought it would. So far I'm 18 hours into this emulator. Whereas I had Super Mario Bros fully playable (no sound) in 12 hours for the NES >_> I refactored all the byte/word variant functions to single functions that take a size parameter. Cuts the amount of code in half. Also implemented repz/repnz + movsb/movsw, so Riviera now gets 299 instructions in before dying. Nobody really bothers to explain how the CPU actually implements these instructions, but I think I have it right: ignore non-string opcodes that follow rep, invoke the string operations inside the rep opcodes to prevent interrupts from triggering between the two (which will be even more fun for segment selector overrides ...) The next opcode needed is 0xC7, which ... throws ModRM on its head. In this mode, ModRM is only used to determine the target operand (and it doesn't use the middle bits for that at all), and the source is an immediate that follows it. Gonna have to waste a few more hours thinking about how best to handle that. Also, disabled HiDPI for higan as well on OS X.
2016-01-31 07:59:44 +00:00
case 0xa4: return opMoveString(Byte);
case 0xa5: return opMoveString(Word);
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0xa6: return opCompareString(Byte);
case 0xa7: return opCompareString(Word);
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0xa8: return opTestAcc(Byte);
case 0xa9: return opTestAcc(Word);
case 0xaa: return opStoreString(Byte);
case 0xab: return opStoreString(Word);
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0xac: return opLoadString(Byte);
case 0xad: return opLoadString(Word);
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
case 0xae: return opScanString(Byte);
case 0xaf: return opScanString(Word);
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0xb0: return opMoveRegImm(r.al);
case 0xb1: return opMoveRegImm(r.cl);
case 0xb2: return opMoveRegImm(r.dl);
case 0xb3: return opMoveRegImm(r.bl);
case 0xb4: return opMoveRegImm(r.ah);
case 0xb5: return opMoveRegImm(r.ch);
case 0xb6: return opMoveRegImm(r.dh);
case 0xb7: return opMoveRegImm(r.bh);
case 0xb8: return opMoveRegImm(r.ax);
case 0xb9: return opMoveRegImm(r.cx);
case 0xba: return opMoveRegImm(r.dx);
case 0xbb: return opMoveRegImm(r.bx);
case 0xbc: return opMoveRegImm(r.sp);
case 0xbd: return opMoveRegImm(r.bp);
case 0xbe: return opMoveRegImm(r.si);
case 0xbf: return opMoveRegImm(r.di);
case 0xc0: return opGroup2MemImm(Byte);
case 0xc1: return opGroup2MemImm(Word);
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0xc2: return opReturnImm();
Update to v097r05 release. byuu says: More V30MZ implemented, a lot more to go. icarus now supports importing WS and WSC games. It expects them to have the correct file extension, same for GB and GBC. > Ugh, apparently HiDPI icarus doesn't let you press the check boxes. I set the flag value in the plist to false for now. Forgot to do it for higan, but hopefully I won't forget before release.
2016-01-30 06:40:35 +00:00
case 0xc3: return opReturn();
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
case 0xc4: return opLoadSegmentMem(r.es);
case 0xc5: return opLoadSegmentMem(r.ds);
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0xc6: return opMoveMemImm(Byte);
case 0xc7: return opMoveMemImm(Word);
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
case 0xc8: return opEnter();
Update to v097r09 release. 244 of 256 opcodes implemented now, although the interrupt triggering portions are missing from them still. Much better handling of prefixes now. I definitely have a newfound hatepreciation for x86 now >_>
2016-02-03 10:24:58 +00:00
case 0xc9: return opLeave();
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0xca: return opReturnFarImm();
case 0xcb: return opReturnFar();
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
case 0xcc: return opInt3();
case 0xcd: return opIntImm();
Update to v097r09 release. 244 of 256 opcodes implemented now, although the interrupt triggering portions are missing from them still. Much better handling of prefixes now. I definitely have a newfound hatepreciation for x86 now >_>
2016-02-03 10:24:58 +00:00
case 0xce: return opInto();
case 0xcf: return opReturnInt();
Update to 20160215 release. byuu says: Got it. Wow, that didn't hurt nearly as much as I thought it was going to. Dropped from 127.5fps to 123.5fps to use Natural/Integer for (u)int(8,16,32,64). That's totally worth the cost.
2016-02-16 09:27:55 +00:00
case 0xd0: return opGroup2MemImm(Byte, (uint8)1);
case 0xd1: return opGroup2MemImm(Word, (uint8)1);
case 0xd2: return opGroup2MemImm(Byte, (uint8)r.cl);
case 0xd3: return opGroup2MemImm(Word, (uint8)r.cl);
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
case 0xd4: return opAdjustAfterMultiply();
case 0xd5: return opAdjustAfterDivide();
Update to v097r09 release. 244 of 256 opcodes implemented now, although the interrupt triggering portions are missing from them still. Much better handling of prefixes now. I definitely have a newfound hatepreciation for x86 now >_>
2016-02-03 10:24:58 +00:00
case 0xd6: return;
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
case 0xd7: return opTranslate();
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0xd8: return; //fpo1
case 0xd9: return; //fpo1
case 0xda: return; //fpo1
case 0xdb: return; //fpo1
case 0xdc: return; //fpo1
case 0xdd: return; //fpo1
case 0xde: return; //fpo1
case 0xdf: return; //fpo1
case 0xe0: return opLoopWhile(0); //loopnz
case 0xe1: return opLoopWhile(1); //loopz
case 0xe2: return opLoop();
case 0xe3: return opJumpIf(r.cx == 0);
Update to v097r06 release. byuu says: Man, the 80186 is taking a lot longer to implement than I thought it would. So far I'm 18 hours into this emulator. Whereas I had Super Mario Bros fully playable (no sound) in 12 hours for the NES >_> I refactored all the byte/word variant functions to single functions that take a size parameter. Cuts the amount of code in half. Also implemented repz/repnz + movsb/movsw, so Riviera now gets 299 instructions in before dying. Nobody really bothers to explain how the CPU actually implements these instructions, but I think I have it right: ignore non-string opcodes that follow rep, invoke the string operations inside the rep opcodes to prevent interrupts from triggering between the two (which will be even more fun for segment selector overrides ...) The next opcode needed is 0xC7, which ... throws ModRM on its head. In this mode, ModRM is only used to determine the target operand (and it doesn't use the middle bits for that at all), and the source is an immediate that follows it. Gonna have to waste a few more hours thinking about how best to handle that. Also, disabled HiDPI for higan as well on OS X.
2016-01-31 07:59:44 +00:00
case 0xe4: return opIn(Byte);
case 0xe5: return opIn(Word);
case 0xe6: return opOut(Byte);
case 0xe7: return opOut(Word);
Update to v097r05 release. byuu says: More V30MZ implemented, a lot more to go. icarus now supports importing WS and WSC games. It expects them to have the correct file extension, same for GB and GBC. > Ugh, apparently HiDPI icarus doesn't let you press the check boxes. I set the flag value in the plist to false for now. Forgot to do it for higan, but hopefully I won't forget before release.
2016-01-30 06:40:35 +00:00
case 0xe8: return opCallNear();
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
case 0xe9: return opJumpNear();
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
case 0xea: return opJumpFar();
Update to v097r07 release. byuu says: 26 hours in, 173 instructions implemented. Although the four segment prefix opcodes don't actually do anything yet. There's less than 256 actual instructions on the 80186, not sure of the exact count. Gunpey gets around ~8,200 instructions in before hitting an unsupported opcode (loop). Riviera goes off the rails on a retf and ends up executing an endless stream of bad opcodes in RAM =( Both games hammer the living shit out of the in/out ports pretty much immediately.
2016-02-02 10:51:17 +00:00
case 0xeb: return opJumpShort();
Update to v097r06 release. byuu says: Man, the 80186 is taking a lot longer to implement than I thought it would. So far I'm 18 hours into this emulator. Whereas I had Super Mario Bros fully playable (no sound) in 12 hours for the NES >_> I refactored all the byte/word variant functions to single functions that take a size parameter. Cuts the amount of code in half. Also implemented repz/repnz + movsb/movsw, so Riviera now gets 299 instructions in before dying. Nobody really bothers to explain how the CPU actually implements these instructions, but I think I have it right: ignore non-string opcodes that follow rep, invoke the string operations inside the rep opcodes to prevent interrupts from triggering between the two (which will be even more fun for segment selector overrides ...) The next opcode needed is 0xC7, which ... throws ModRM on its head. In this mode, ModRM is only used to determine the target operand (and it doesn't use the middle bits for that at all), and the source is an immediate that follows it. Gonna have to waste a few more hours thinking about how best to handle that. Also, disabled HiDPI for higan as well on OS X.
2016-01-31 07:59:44 +00:00
case 0xec: return opInDX(Byte);
case 0xed: return opInDX(Word);
case 0xee: return opOutDX(Byte);
case 0xef: return opOutDX(Word);
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0xf0: return opLock();
case 0xf1: return;
case 0xf2: return opRepeat(0); //repnz
case 0xf3: return opRepeat(1); //repz
Update to v097r09 release. 244 of 256 opcodes implemented now, although the interrupt triggering portions are missing from them still. Much better handling of prefixes now. I definitely have a newfound hatepreciation for x86 now >_>
2016-02-03 10:24:58 +00:00
case 0xf4: return opHalt();
case 0xf5: return opComplementCarry();
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0xf6: return opGroup3MemImm(Byte);
case 0xf7: return opGroup3MemImm(Word);
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
case 0xf8: return opClearFlag(r.f.c);
case 0xf9: return opSetFlag(r.f.c);
case 0xfa: return opClearFlag(r.f.i);
case 0xfb: return opSetFlag(r.f.i);
case 0xfc: return opClearFlag(r.f.d);
case 0xfd: return opSetFlag(r.f.d);
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
case 0xfe: return opGroup4MemImm(Byte);
case 0xff: return opGroup4MemImm(Word);
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
}
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
}
auto V30MZ::interrupt(uint8 vector) -> void {
state.halt = false;
Update to v097r11 release. byuu says: Alright, well interrupts are in. At least Vblank is. I also fixed a bug in vector() indexing, MoDRM mod!=3&&reg==6 using SS instead of DS, opcodes a0-a3 allowing segment override, and added the "irq_disable" stuff to the relevant opcodes to suppress IRQs after certain instructions. But unfortunately ... still no go on Riviera. It's not reading any unmapped ports, and although it enables Vblank IRQs and they set port $b4's status bit, the game never sets the IE flag, so no interrupts ever actually fire. The game does indeed appear to be sitting in a rather huge loop, which is probably dependent upon some RAM variable being set from the Vblank IRQ, but I don't know how I'm supposed to be triggering it. ... I'm really quite stumped here >_>
2016-02-04 21:18:06 +00:00
auto ip = read(Word, 0x0000, vector * 4 + 0);
auto cs = read(Word, 0x0000, vector * 4 + 2);
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
push(r.f);
push(r.cs);
push(r.ip);
r.f.m = true;
r.f.i = false;
r.f.b = false;
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
r.ip = ip;
r.cs = cs;
Update to v097r03 release. byuu says: So, this WIP starts work on something new for higan. Obviously, I can't keep it a secret until it's ready, because I want to continue daily WIP releases, and of course, solicit feedback as I go along.
2016-01-27 11:31:39 +00:00
}
auto V30MZ::power() -> void {
Update to v097r11 release. byuu says: Alright, well interrupts are in. At least Vblank is. I also fixed a bug in vector() indexing, MoDRM mod!=3&&reg==6 using SS instead of DS, opcodes a0-a3 allowing segment override, and added the "irq_disable" stuff to the relevant opcodes to suppress IRQs after certain instructions. But unfortunately ... still no go on Riviera. It's not reading any unmapped ports, and although it enables Vblank IRQs and they set port $b4's status bit, the game never sets the IE flag, so no interrupts ever actually fire. The game does indeed appear to be sitting in a rather huge loop, which is probably dependent upon some RAM variable being set from the Vblank IRQ, but I don't know how I'm supposed to be triggering it. ... I'm really quite stumped here >_>
2016-02-04 21:18:06 +00:00
state.halt = false;
state.poll = true;
Update to v097r10 release. byuu says: All 256 instructions implemented fully. Fixed a major bug with instructions that both read and write to ModRM with displacement. Riviera now runs into an infinite loop ... possibly crashed, possibly waiting on interrupts or in to return something. Added a bunch of PPU settings registers, but nothing's actually rendering with them yet.
2016-02-04 10:29:08 +00:00
state.prefix = false;
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
Update to v097r11 release. byuu says: Alright, well interrupts are in. At least Vblank is. I also fixed a bug in vector() indexing, MoDRM mod!=3&&reg==6 using SS instead of DS, opcodes a0-a3 allowing segment override, and added the "irq_disable" stuff to the relevant opcodes to suppress IRQs after certain instructions. But unfortunately ... still no go on Riviera. It's not reading any unmapped ports, and although it enables Vblank IRQs and they set port $b4's status bit, the game never sets the IE flag, so no interrupts ever actually fire. The game does indeed appear to be sitting in a rather huge loop, which is probably dependent upon some RAM variable being set from the Vblank IRQ, but I don't know how I'm supposed to be triggering it. ... I'm really quite stumped here >_>
2016-02-04 21:18:06 +00:00
prefix.repeat = nothing;
Update to v097r09 release. 244 of 256 opcodes implemented now, although the interrupt triggering portions are missing from them still. Much better handling of prefixes now. I definitely have a newfound hatepreciation for x86 now >_>
2016-02-03 10:24:58 +00:00
prefix.segment = nothing;
Update to v097r08 release. byuu says: Up to 211 opcodes implemented, with the caveat that the four opcodes that make up group 3 and group 4 don't do anything yet. Both groups seem to have some "illegal" instructions in them, so that'll be "fun". I have a new mechanic in place for opcode prefixes, but it could use some work still. I also only have it working to override ModRM mem addressing, but of course it does it in a lot of other places like the string operations. Making it about 5.5 million instructions into Gunpey now, but of course that doesn't mean much. Could be going off the rails at any point due to CPU bugs or unimplemented ports. Riviera's still crashing.
2016-02-03 10:07:50 +00:00
Update to v097r03 release. byuu says: So, this WIP starts work on something new for higan. Obviously, I can't keep it a secret until it's ready, because I want to continue daily WIP releases, and of course, solicit feedback as I go along.
2016-01-27 11:31:39 +00:00
r.ax = 0x0000;
r.cx = 0x0000;
r.dx = 0x0000;
Update to v097r11 release. byuu says: Alright, well interrupts are in. At least Vblank is. I also fixed a bug in vector() indexing, MoDRM mod!=3&&reg==6 using SS instead of DS, opcodes a0-a3 allowing segment override, and added the "irq_disable" stuff to the relevant opcodes to suppress IRQs after certain instructions. But unfortunately ... still no go on Riviera. It's not reading any unmapped ports, and although it enables Vblank IRQs and they set port $b4's status bit, the game never sets the IE flag, so no interrupts ever actually fire. The game does indeed appear to be sitting in a rather huge loop, which is probably dependent upon some RAM variable being set from the Vblank IRQ, but I don't know how I'm supposed to be triggering it. ... I'm really quite stumped here >_>
2016-02-04 21:18:06 +00:00
r.bx = 0x0000;
r.sp = 0x0000;
r.bp = 0x0000;
Update to v097r03 release. byuu says: So, this WIP starts work on something new for higan. Obviously, I can't keep it a secret until it's ready, because I want to continue daily WIP releases, and of course, solicit feedback as I go along.
2016-01-27 11:31:39 +00:00
r.si = 0x0000;
r.di = 0x0000;
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
r.es = 0x0000;
Update to v097r11 release. byuu says: Alright, well interrupts are in. At least Vblank is. I also fixed a bug in vector() indexing, MoDRM mod!=3&&reg==6 using SS instead of DS, opcodes a0-a3 allowing segment override, and added the "irq_disable" stuff to the relevant opcodes to suppress IRQs after certain instructions. But unfortunately ... still no go on Riviera. It's not reading any unmapped ports, and although it enables Vblank IRQs and they set port $b4's status bit, the game never sets the IE flag, so no interrupts ever actually fire. The game does indeed appear to be sitting in a rather huge loop, which is probably dependent upon some RAM variable being set from the Vblank IRQ, but I don't know how I'm supposed to be triggering it. ... I'm really quite stumped here >_>
2016-02-04 21:18:06 +00:00
r.cs = 0xffff;
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
r.ss = 0x0000;
Update to v097r11 release. byuu says: Alright, well interrupts are in. At least Vblank is. I also fixed a bug in vector() indexing, MoDRM mod!=3&&reg==6 using SS instead of DS, opcodes a0-a3 allowing segment override, and added the "irq_disable" stuff to the relevant opcodes to suppress IRQs after certain instructions. But unfortunately ... still no go on Riviera. It's not reading any unmapped ports, and although it enables Vblank IRQs and they set port $b4's status bit, the game never sets the IE flag, so no interrupts ever actually fire. The game does indeed appear to be sitting in a rather huge loop, which is probably dependent upon some RAM variable being set from the Vblank IRQ, but I don't know how I'm supposed to be triggering it. ... I'm really quite stumped here >_>
2016-02-04 21:18:06 +00:00
r.ds = 0x0000;
r.ip = 0x0000;
Update to v097r04 release. byuu says: Lots of improvements. We're now able to start executing some V30MZ instructions. 32 of 256 opcodes implemented so far. I hope this goes without saying, but there's absolutely no point in loading WS/WSC games right now. You won't see anything until I have the full CPU and partial PPU implemented. ROM bank 2 works properly now, the I/O map is 16-bit (address) x 16-bit (data) as it should be*, and I have a basic disassembler in place (adding to it as I emulate new opcodes.) (* I don't know what happens if you access an 8-bit port in 16-bit mode or vice versa, so for now I'm just treating the handlers as always being 16-bit, and discarding the upper 8-bits when not needed.)
2016-01-28 11:39:49 +00:00
r.f = 0x8000;
Update to v097r03 release. byuu says: So, this WIP starts work on something new for higan. Obviously, I can't keep it a secret until it's ready, because I want to continue daily WIP releases, and of course, solicit feedback as I go along.
2016-01-27 11:31:39 +00:00
}
}