2011-01-18 10:17:48 +00:00
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public:
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Update to higan and icarus v095r17 release.
byuu says:
higan supports Event mapping again.
Further, icarus can now detect Event ROMs and MSU1 games.
Event ROMs must be named "program.rom", "slot-(1,2,3).rom" MSU1 games
must contain "msu1.rom"; and tracks must be named "track-#.pcm"
When importing the CC'92, PF'94 ROMs, the program.rom and
slot-(1,2,3).rom files must be concatenated. The DSP firmware can
optionally be separate, but I'd recommend you go ahead and merge it all
to one file. Especially since that common "higan DSP pack" floating
around on the web left out the DSP1 ROMs (only has DSP1B) for god knows
what reason.
There is no support for loading "game.sfc+game.msu+game-*.pcm", because
I'm not going to support trying to pull in all of those files through
importing. Games will have to be distributed as game folders to use
MSU1. The MSU1 icarus support is simply so your game folders won't
require an unstable manifest.bml file to be played. So once they're in
there, they are good for life.
Note: the Event sizes in icarus' SFC heuristics are wrong for appended
firmware. Change from 0xXX8000 to 0xXX2000 and it works fine. Will be
fixed in r18.
Added Sintendo's flickering fixes. The window one's a big help for
regular controls, but the ListView double buffering does nothing for me
on Windows 7 :( Fairly sure I know why, but too lazy to try and fix that
now.
Also fixes the mMenu thing.
2015-12-20 02:53:40 +00:00
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auto mmio_read(uint addr, uint8 data) -> uint8;
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2015-12-06 21:11:41 +00:00
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auto mmio_write(uint addr, uint8 data) -> void;
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2011-01-18 10:17:48 +00:00
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private:
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2010-09-01 13:18:10 +00:00
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struct Regs {
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//internal
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uint8 ppu1_mdr;
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uint8 ppu2_mdr;
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uint16 vram_readbuffer;
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uint8 oam_latchdata;
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uint8 cgram_latchdata;
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2010-09-01 13:20:05 +00:00
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uint8 bgofs_latchdata;
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2010-09-01 13:18:10 +00:00
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uint8 mode7_latchdata;
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2010-09-01 13:20:05 +00:00
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bool counters_latched;
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bool latch_hcounter;
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bool latch_vcounter;
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2010-09-01 13:18:10 +00:00
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//$2100
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bool display_disable;
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2015-12-06 21:11:41 +00:00
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uint display_brightness;
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2010-09-01 13:18:10 +00:00
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//$2102-$2103
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uint16 oam_baseaddr;
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uint16 oam_addr;
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bool oam_priority;
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2010-09-01 13:20:05 +00:00
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//$2105
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bool bg3_priority;
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2015-12-06 21:11:41 +00:00
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uint bgmode;
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2010-09-01 13:20:05 +00:00
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//$210d
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uint16 mode7_hoffset;
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//$210e
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uint16 mode7_voffset;
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2010-09-01 13:18:10 +00:00
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//$2115
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bool vram_incmode;
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2015-12-06 21:11:41 +00:00
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uint vram_mapping;
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uint vram_incsize;
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2010-09-01 13:18:10 +00:00
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//$2116-$2117
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uint16 vram_addr;
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//$211a
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2015-12-06 21:11:41 +00:00
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uint mode7_repeat;
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2010-09-01 13:18:10 +00:00
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bool mode7_vflip;
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bool mode7_hflip;
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//$211b-$2120
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uint16 m7a;
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uint16 m7b;
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uint16 m7c;
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uint16 m7d;
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uint16 m7x;
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uint16 m7y;
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//$2121
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uint16 cgram_addr;
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2010-09-01 13:20:05 +00:00
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2010-09-01 13:22:05 +00:00
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//$2126-$212a
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2015-12-06 21:11:41 +00:00
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uint window_one_left;
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uint window_one_right;
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uint window_two_left;
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uint window_two_right;
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2010-09-01 13:22:05 +00:00
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2010-09-01 13:20:05 +00:00
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//$2133
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bool mode7_extbg;
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bool pseudo_hires;
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bool overscan;
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bool interlace;
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//$213c
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uint16 hcounter;
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//$213d
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uint16 vcounter;
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2010-09-01 13:18:10 +00:00
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} regs;
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2015-12-06 21:11:41 +00:00
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auto get_vram_addr() -> uint16;
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auto vram_read(uint addr) -> uint8;
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auto vram_write(uint addr, uint8 data) -> void;
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2010-09-01 13:18:10 +00:00
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2015-12-06 21:11:41 +00:00
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auto oam_read(uint addr) -> uint8;
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auto oam_write(uint addr, uint8 data) -> void;
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2010-09-01 13:18:10 +00:00
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2015-12-06 21:11:41 +00:00
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auto cgram_read(uint addr) -> uint8;
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auto cgram_write(uint addr, uint8 data) -> void;
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2010-09-01 13:18:10 +00:00
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2015-12-06 21:11:41 +00:00
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auto mmio_update_video_mode() -> void;
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auto mmio_reset() -> void;
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