2011-10-01 12:06:48 +00:00
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struct VRC6 : Chip {
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2015-12-05 05:44:49 +00:00
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VRC6(Board& board) : Chip(board) {
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}
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struct Pulse {
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auto clock() -> void {
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if(--divider == 0) {
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divider = frequency + 1;
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cycle++;
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output = (mode == 1 || cycle > duty) ? volume : (uint4)0;
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}
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2011-10-01 12:06:48 +00:00
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2015-12-05 05:44:49 +00:00
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if(enable == false) output = 0;
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2011-10-01 12:06:48 +00:00
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}
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2011-09-26 11:27:06 +00:00
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2015-12-05 05:44:49 +00:00
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auto serialize(serializer& s) -> void {
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s.integer(mode);
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s.integer(duty);
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s.integer(volume);
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s.integer(enable);
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s.integer(frequency);
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2011-09-26 11:27:06 +00:00
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2015-12-05 05:44:49 +00:00
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s.integer(divider);
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s.integer(cycle);
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s.integer(output);
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}
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2011-09-26 11:27:06 +00:00
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2015-12-05 05:44:49 +00:00
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bool mode;
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uint3 duty;
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uint4 volume;
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bool enable;
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uint12 frequency;
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uint12 divider;
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uint4 cycle;
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uint4 output;
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} pulse1, pulse2;
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struct Sawtooth {
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auto clock() -> void {
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if(--divider == 0) {
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divider = frequency + 1;
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if(++phase == 0) {
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accumulator += rate;
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if(++stage == 7) {
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stage = 0;
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accumulator = 0;
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}
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2011-10-01 12:06:48 +00:00
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}
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2011-09-26 11:38:57 +00:00
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}
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2015-12-05 05:44:49 +00:00
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output = accumulator >> 3;
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if(enable == false) output = 0;
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2011-09-26 11:27:06 +00:00
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}
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2011-10-01 12:06:48 +00:00
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2015-12-05 05:44:49 +00:00
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auto serialize(serializer& s) -> void {
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s.integer(rate);
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s.integer(enable);
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s.integer(frequency);
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2011-09-26 11:27:06 +00:00
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2015-12-05 05:44:49 +00:00
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s.integer(divider);
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s.integer(phase);
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s.integer(stage);
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s.integer(accumulator);
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s.integer(output);
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}
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2011-10-01 12:06:48 +00:00
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2015-12-05 05:44:49 +00:00
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uint6 rate;
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bool enable;
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uint12 frequency;
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uint12 divider;
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uint1 phase;
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uint3 stage;
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uint8 accumulator;
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uint5 output;
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} sawtooth;
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auto main() -> void {
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2016-06-27 13:07:57 +00:00
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if(irqEnable) {
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if(irqMode == 0) {
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irqScalar -= 3;
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if(irqScalar <= 0) {
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irqScalar += 341;
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if(irqCounter == 0xff) {
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irqCounter = irqLatch;
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irqLine = 1;
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2011-09-26 11:27:06 +00:00
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} else {
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2016-06-27 13:07:57 +00:00
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irqCounter++;
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2011-09-26 11:27:06 +00:00
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}
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}
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}
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2016-06-27 13:07:57 +00:00
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if(irqMode == 1) {
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if(irqCounter == 0xff) {
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irqCounter = irqLatch;
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irqLine = 1;
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2016-02-09 11:51:12 +00:00
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} else {
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2016-06-27 13:07:57 +00:00
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irqCounter++;
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2016-02-09 11:51:12 +00:00
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}
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}
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2011-09-26 11:27:06 +00:00
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}
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2016-06-27 13:07:57 +00:00
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cpu.irqLine(irqLine);
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2016-02-09 11:51:12 +00:00
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pulse1.clock();
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pulse2.clock();
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sawtooth.clock();
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int output = (pulse1.output + pulse2.output + sawtooth.output) << 7;
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2016-06-27 13:07:57 +00:00
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apu.setSample(-output);
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2016-02-09 11:51:12 +00:00
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tick();
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2015-12-05 05:44:49 +00:00
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}
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2011-09-26 11:27:06 +00:00
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2016-06-27 13:07:57 +00:00
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auto addrPRG(uint addr) const -> uint {
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if((addr & 0xc000) == 0x8000) return (prgBank[0] << 14) | (addr & 0x3fff);
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if((addr & 0xe000) == 0xc000) return (prgBank[1] << 13) | (addr & 0x1fff);
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if((addr & 0xe000) == 0xe000) return ( 0xff << 13) | (addr & 0x1fff);
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2015-12-05 05:44:49 +00:00
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}
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2011-09-26 11:27:06 +00:00
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2016-06-27 13:07:57 +00:00
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auto addrCHR(uint addr) const -> uint {
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uint bank = chrBank[(addr >> 10) & 7];
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2015-12-05 05:44:49 +00:00
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return (bank << 10) | (addr & 0x03ff);
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2011-09-26 11:27:06 +00:00
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}
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2015-12-05 05:44:49 +00:00
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2016-06-27 13:07:57 +00:00
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auto addrCIRAM(uint addr) const -> uint {
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2015-12-05 05:44:49 +00:00
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switch(mirror) {
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case 0: return ((addr & 0x0400) >> 0) | (addr & 0x03ff); //vertical mirroring
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case 1: return ((addr & 0x0800) >> 1) | (addr & 0x03ff); //horizontal mirroring
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case 2: return 0x0000 | (addr & 0x03ff); //one-screen mirroring (first)
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case 3: return 0x0400 | (addr & 0x03ff); //one-screen mirroring (second)
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}
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2011-09-26 11:27:06 +00:00
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}
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2015-12-05 05:44:49 +00:00
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2016-06-27 13:07:57 +00:00
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auto readRAM(uint addr) -> uint8 {
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2015-12-05 05:44:49 +00:00
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return board.prgram.data[addr & 0x1fff];
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}
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2016-06-27 13:07:57 +00:00
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auto writeRAM(uint addr, uint8 data) -> void {
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2015-12-05 05:44:49 +00:00
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board.prgram.data[addr & 0x1fff] = data;
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}
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2016-06-27 13:07:57 +00:00
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auto writeIO(uint addr, uint8 data) -> void {
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2015-12-05 05:44:49 +00:00
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switch(addr) {
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case 0x8000: case 0x8001: case 0x8002: case 0x8003:
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2016-06-27 13:07:57 +00:00
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prgBank[0] = data;
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2015-12-05 05:44:49 +00:00
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break;
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case 0x9000:
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pulse1.mode = data & 0x80;
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pulse1.duty = (data & 0x70) >> 4;
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pulse1.volume = data & 0x0f;
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break;
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case 0x9001:
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pulse1.frequency = (pulse1.frequency & 0x0f00) | ((data & 0xff) << 0);
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break;
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case 0x9002:
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pulse1.frequency = (pulse1.frequency & 0x00ff) | ((data & 0x0f) << 8);
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pulse1.enable = data & 0x80;
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break;
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case 0xa000:
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pulse2.mode = data & 0x80;
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pulse2.duty = (data & 0x70) >> 4;
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pulse2.volume = data & 0x0f;
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break;
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case 0xa001:
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pulse2.frequency = (pulse2.frequency & 0x0f00) | ((data & 0xff) << 0);
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break;
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case 0xa002:
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pulse2.frequency = (pulse2.frequency & 0x00ff) | ((data & 0x0f) << 8);
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pulse2.enable = data & 0x80;
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break;
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case 0xb000:
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sawtooth.rate = data & 0x3f;
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break;
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case 0xb001:
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sawtooth.frequency = (sawtooth.frequency & 0x0f00) | ((data & 0xff) << 0);
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break;
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case 0xb002:
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sawtooth.frequency = (sawtooth.frequency & 0x00ff) | ((data & 0x0f) << 8);
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sawtooth.enable = data & 0x80;
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break;
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case 0xb003:
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mirror = (data >> 2) & 3;
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break;
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case 0xc000: case 0xc001: case 0xc002: case 0xc003:
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2016-06-27 13:07:57 +00:00
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prgBank[1] = data;
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2015-12-05 05:44:49 +00:00
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break;
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case 0xd000: case 0xd001: case 0xd002: case 0xd003:
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2016-06-27 13:07:57 +00:00
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chrBank[0 + (addr & 3)] = data;
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2015-12-05 05:44:49 +00:00
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break;
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case 0xe000: case 0xe001: case 0xe002: case 0xe003:
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2016-06-27 13:07:57 +00:00
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chrBank[4 + (addr & 3)] = data;
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2015-12-05 05:44:49 +00:00
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break;
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case 0xf000:
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2016-06-27 13:07:57 +00:00
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irqLatch = data;
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2015-12-05 05:44:49 +00:00
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break;
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case 0xf001:
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2016-06-27 13:07:57 +00:00
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irqMode = data & 0x04;
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irqEnable = data & 0x02;
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irqAcknowledge = data & 0x01;
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if(irqEnable) {
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irqCounter = irqLatch;
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irqScalar = 341;
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2015-12-05 05:44:49 +00:00
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}
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2016-06-27 13:07:57 +00:00
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irqLine = 0;
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2015-12-05 05:44:49 +00:00
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break;
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case 0xf002:
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2016-06-27 13:07:57 +00:00
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irqEnable = irqAcknowledge;
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irqLine = 0;
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2015-12-05 05:44:49 +00:00
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break;
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2011-09-26 11:27:06 +00:00
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}
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2015-12-05 05:44:49 +00:00
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}
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2011-09-26 11:27:06 +00:00
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2015-12-05 05:44:49 +00:00
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auto power() -> void {
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2016-06-27 13:07:57 +00:00
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prgBank[0] = 0;
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prgBank[1] = 0;
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chrBank[0] = 0;
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chrBank[1] = 0;
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chrBank[2] = 0;
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chrBank[3] = 0;
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chrBank[4] = 0;
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chrBank[5] = 0;
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chrBank[6] = 0;
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chrBank[7] = 0;
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2015-12-05 05:44:49 +00:00
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mirror = 0;
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2016-06-27 13:07:57 +00:00
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irqLatch = 0;
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irqMode = 0;
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irqEnable = 0;
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irqAcknowledge = 0;
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2015-12-05 05:44:49 +00:00
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2016-06-27 13:07:57 +00:00
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irqCounter = 0;
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irqScalar = 0;
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irqLine = 0;
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2015-12-05 05:44:49 +00:00
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pulse1.mode = 0;
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pulse1.duty = 0;
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pulse1.volume = 0;
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pulse1.enable = 0;
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pulse1.frequency = 0;
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pulse1.divider = 1;
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pulse1.cycle = 0;
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pulse1.output = 0;
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pulse2.mode = 0;
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pulse2.duty = 0;
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pulse2.volume = 0;
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pulse2.enable = 0;
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pulse2.frequency = 0;
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pulse2.divider = 1;
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pulse2.cycle = 0;
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pulse2.output = 0;
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sawtooth.rate = 0;
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sawtooth.enable = 0;
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sawtooth.frequency = 0;
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sawtooth.divider = 1;
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sawtooth.phase = 0;
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sawtooth.stage = 0;
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sawtooth.accumulator = 0;
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sawtooth.output = 0;
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}
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auto serialize(serializer& s) -> void {
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pulse1.serialize(s);
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pulse2.serialize(s);
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sawtooth.serialize(s);
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2016-06-27 13:07:57 +00:00
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s.array(prgBank);
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s.array(chrBank);
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2015-12-05 05:44:49 +00:00
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s.integer(mirror);
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2016-06-27 13:07:57 +00:00
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s.integer(irqLatch);
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s.integer(irqMode);
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s.integer(irqEnable);
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s.integer(irqAcknowledge);
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s.integer(irqCounter);
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s.integer(irqScalar);
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s.integer(irqLine);
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2011-09-26 11:27:06 +00:00
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}
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2011-09-26 11:38:57 +00:00
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2016-06-27 13:07:57 +00:00
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uint8 prgBank[2];
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uint8 chrBank[8];
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2015-12-05 05:44:49 +00:00
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uint2 mirror;
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2016-06-27 13:07:57 +00:00
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uint8 irqLatch;
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bool irqMode;
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bool irqEnable;
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bool irqAcknowledge;
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uint8 irqCounter;
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int irqScalar;
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bool irqLine;
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2011-10-01 12:06:48 +00:00
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};
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