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bsnes/higan/processor/r65816/opcode_write.cpp

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Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_write_addr_b(reg16_t& reg) {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
aa.l = op_readpc();
aa.h = op_readpc();
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
L op_writedbr(aa.w, reg);
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_write_addr_w(reg16_t& reg) {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
aa.l = op_readpc();
aa.h = op_readpc();
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
op_writedbr(aa.w + 0, reg >> 0);
L op_writedbr(aa.w + 1, reg >> 8);
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_write_addrr_b(reg16_t& reg, reg16_t& idx) {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
L op_writedbr(aa.w + idx, reg);
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_write_addrr_w(reg16_t& reg, reg16_t& idx) {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
aa.l = op_readpc();
aa.h = op_readpc();
op_io();
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
op_writedbr(aa.w + idx + 0, reg >> 0);
L op_writedbr(aa.w + idx + 1, reg >> 8);
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_write_longr_b(reg16_t& idx) {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
aa.l = op_readpc();
aa.h = op_readpc();
aa.b = op_readpc();
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
L op_writelong(aa.d + idx, regs.a.l);
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_write_longr_w(reg16_t& idx) {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
aa.l = op_readpc();
aa.h = op_readpc();
aa.b = op_readpc();
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
op_writelong(aa.d + idx + 0, regs.a.l);
L op_writelong(aa.d + idx + 1, regs.a.h);
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_write_dp_b(reg16_t& reg) {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
L op_writedp(dp, reg);
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_write_dp_w(reg16_t& reg) {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
op_writedp(dp + 0, reg >> 0);
L op_writedp(dp + 1, reg >> 8);
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_write_dpr_b(reg16_t& reg, reg16_t& idx) {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
op_io();
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
L op_writedp(dp + idx, reg);
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_write_dpr_w(reg16_t& reg, reg16_t& idx) {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
op_io();
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
op_writedp(dp + idx + 0, reg >> 0);
L op_writedp(dp + idx + 1, reg >> 8);
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_idp_b() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
aa.l = op_readdp(dp + 0);
aa.h = op_readdp(dp + 1);
L op_writedbr(aa.w, regs.a.l);
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_idp_w() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
aa.l = op_readdp(dp + 0);
aa.h = op_readdp(dp + 1);
op_writedbr(aa.w + 0, regs.a.l);
L op_writedbr(aa.w + 1, regs.a.h);
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_ildp_b() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
aa.l = op_readdp(dp + 0);
aa.h = op_readdp(dp + 1);
aa.b = op_readdp(dp + 2);
L op_writelong(aa.d, regs.a.l);
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_ildp_w() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
aa.l = op_readdp(dp + 0);
aa.h = op_readdp(dp + 1);
aa.b = op_readdp(dp + 2);
op_writelong(aa.d + 0, regs.a.l);
L op_writelong(aa.d + 1, regs.a.h);
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_idpx_b() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
op_io();
aa.l = op_readdp(dp + regs.x.w + 0);
aa.h = op_readdp(dp + regs.x.w + 1);
L op_writedbr(aa.w, regs.a.l);
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_idpx_w() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
op_io();
aa.l = op_readdp(dp + regs.x.w + 0);
aa.h = op_readdp(dp + regs.x.w + 1);
op_writedbr(aa.w + 0, regs.a.l);
L op_writedbr(aa.w + 1, regs.a.h);
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_idpy_b() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
aa.l = op_readdp(dp + 0);
aa.h = op_readdp(dp + 1);
op_io();
L op_writedbr(aa.w + regs.y.w, regs.a.l);
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_idpy_w() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
aa.l = op_readdp(dp + 0);
aa.h = op_readdp(dp + 1);
op_io();
op_writedbr(aa.w + regs.y.w + 0, regs.a.l);
L op_writedbr(aa.w + regs.y.w + 1, regs.a.h);
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_ildpy_b() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
aa.l = op_readdp(dp + 0);
aa.h = op_readdp(dp + 1);
aa.b = op_readdp(dp + 2);
L op_writelong(aa.d + regs.y.w, regs.a.l);
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_ildpy_w() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
dp = op_readpc();
op_io_cond2();
aa.l = op_readdp(dp + 0);
aa.h = op_readdp(dp + 1);
aa.b = op_readdp(dp + 2);
op_writelong(aa.d + regs.y.w + 0, regs.a.l);
L op_writelong(aa.d + regs.y.w + 1, regs.a.h);
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_sr_b() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
sp = op_readpc();
op_io();
L op_writesp(sp, regs.a.l);
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_sr_w() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
sp = op_readpc();
op_io();
op_writesp(sp + 0, regs.a.l);
L op_writesp(sp + 1, regs.a.h);
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_isry_b() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
sp = op_readpc();
op_io();
aa.l = op_readsp(sp + 0);
aa.h = op_readsp(sp + 1);
op_io();
L op_writedbr(aa.w + regs.y.w, regs.a.l);
}
Update to v094r29 release. byuu says: Note: for Windows users, please go to nall/intrinsics.hpp line 60 and correct the typo from "DISPLAY_WINDOW" to "DISPLAY_WINDOWS" before compiling, otherwise things won't work at all. This will be a really major WIP for the core SNES emulation, so please test as thoroughly as possible. I rewrote the 65816 CPU core's dispatcher from a jump table to a switch table. This was so that I could pass class variables as parameters to opcodes without crazy theatrics. With that, I killed the regs.r[N] stuff, the flag_t operator|=, &=, ^= stuff, and all of the template versions of opcodes. I also removed some stupid pointless flag tests in xcn and pflag that would always be true. I sure hope that AWJ is happy with this; because this change was so that my flag assignments and branch tests won't need to build regs.P into a full 8-bit variable anymore. It does of course incur a slight performance hit when you pass in variables by-value to functions, but it should help with binary size (and thus cache) by reducing a lot of extra functions. (I know I could have used template parameters for some things even with a switch table, but chose not to for the aforementioned reasons.) Overall, it's about a ~1% speedup from the previous build. The CPU core instructions were never a bottleneck, but I did want to fix the P flag building stuff because that really was a dumb mistake v_v'
2015-06-22 13:31:49 +00:00
auto R65816::op_sta_isry_w() {
First version split into asnes and bsnes.
2010-08-09 13:28:56 +00:00
sp = op_readpc();
op_io();
aa.l = op_readsp(sp + 0);
aa.h = op_readsp(sp + 1);
op_io();
op_writedbr(aa.w + regs.y.w + 0, regs.a.l);
L op_writedbr(aa.w + regs.y.w + 1, regs.a.h);
}