2011-10-01 12:06:48 +00:00
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struct MMC1 : Chip {
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2015-12-05 05:44:49 +00:00
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MMC1(Board& board) : Chip(board) {
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revision = Revision::MMC1B2;
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}
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auto main() -> void {
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2016-02-09 11:51:12 +00:00
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if(writedelay) writedelay--;
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tick();
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2015-12-05 05:44:49 +00:00
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}
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2016-06-27 13:07:57 +00:00
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auto addrPRG(uint addr) -> uint {
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2015-12-05 05:44:49 +00:00
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bool region = addr & 0x4000;
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2016-06-27 13:07:57 +00:00
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uint bank = (prgBank & ~1) + region;
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2011-10-01 12:06:48 +00:00
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2016-06-27 13:07:57 +00:00
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if(prgSize) {
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2015-12-05 05:44:49 +00:00
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bank = (region == 0 ? 0x0 : 0xf);
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2016-06-27 13:07:57 +00:00
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if(region != prgMode) bank = prgBank;
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Update to v082r32 release.
byuu says:
Added delay to MMC1 register writes, to fix Bill & Ted's Godawful
Adventure.
Fixed up MMC5 RAM+fill mode, and added EXRAM mode support (8x8
tiles/attributes.)
Just Breed is fully playable now.
MMC5 is a total pain in the ass, the documentation on it is just
terrible. I basically just tried seven hundred variations until
something worked.
I still need to add MMC5 vertical split screen (for one single game's
attract screen, ugh), and the extra sound channels.
Would like to rework the NES APU first. Since the pulse channels are
identical sans sweep, it'd be nice to just inherit those and mask out
the sweep register bit writes.
So that probably won't make it into the first release, at least.
Still, overall I think it'll be an impressive showing of complex mappers
for a first release: MMC3, MMC5, VRC6 and 5B. The latter two with full
audio. The only other really, really hard bit is the VRC7 audio,
supposedly.
2011-10-08 07:34:16 +00:00
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}
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2015-12-05 05:44:49 +00:00
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return (bank << 14) | (addr & 0x3fff);
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Update to v082r32 release.
byuu says:
Added delay to MMC1 register writes, to fix Bill & Ted's Godawful
Adventure.
Fixed up MMC5 RAM+fill mode, and added EXRAM mode support (8x8
tiles/attributes.)
Just Breed is fully playable now.
MMC5 is a total pain in the ass, the documentation on it is just
terrible. I basically just tried seven hundred variations until
something worked.
I still need to add MMC5 vertical split screen (for one single game's
attract screen, ugh), and the extra sound channels.
Would like to rework the NES APU first. Since the pulse channels are
identical sans sweep, it'd be nice to just inherit those and mask out
the sweep register bit writes.
So that probably won't make it into the first release, at least.
Still, overall I think it'll be an impressive showing of complex mappers
for a first release: MMC3, MMC5, VRC6 and 5B. The latter two with full
audio. The only other really, really hard bit is the VRC7 audio,
supposedly.
2011-10-08 07:34:16 +00:00
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}
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2016-06-27 13:07:57 +00:00
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auto addrCHR(uint addr) -> uint {
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2015-12-05 05:44:49 +00:00
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bool region = addr & 0x1000;
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2016-06-27 13:07:57 +00:00
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uint bank = chrBank[region];
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if(chrMode == 0) bank = (chrBank[0] & ~1) | region;
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2015-12-05 05:44:49 +00:00
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return (bank << 12) | (addr & 0x0fff);
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}
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2011-10-01 12:06:48 +00:00
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2016-06-27 13:07:57 +00:00
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auto addrCIRAM(uint addr) -> uint {
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2015-12-05 05:44:49 +00:00
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switch(mirror) {
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case 0: return 0x0000 | (addr & 0x03ff);
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case 1: return 0x0400 | (addr & 0x03ff);
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case 2: return ((addr & 0x0400) >> 0) | (addr & 0x03ff);
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case 3: return ((addr & 0x0800) >> 1) | (addr & 0x03ff);
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}
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2011-10-01 12:06:48 +00:00
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}
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2016-06-27 13:07:57 +00:00
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auto writeIO(uint addr, uint8 data) -> void {
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2015-12-05 05:44:49 +00:00
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if(writedelay) return;
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writedelay = 2;
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if(data & 0x80) {
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shiftaddr = 0;
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2016-06-27 13:07:57 +00:00
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prgSize = 1;
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prgMode = 1;
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2015-12-05 05:44:49 +00:00
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} else {
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shiftdata = ((data & 1) << 4) | (shiftdata >> 1);
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if(++shiftaddr == 5) {
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shiftaddr = 0;
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switch((addr >> 13) & 3) {
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case 0:
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2016-06-27 13:07:57 +00:00
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chrMode = (shiftdata & 0x10);
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prgSize = (shiftdata & 0x08);
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prgMode = (shiftdata & 0x04);
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2015-12-05 05:44:49 +00:00
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mirror = (shiftdata & 0x03);
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break;
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case 1:
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2016-06-27 13:07:57 +00:00
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chrBank[0] = (shiftdata & 0x1f);
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2015-12-05 05:44:49 +00:00
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break;
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case 2:
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2016-06-27 13:07:57 +00:00
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chrBank[1] = (shiftdata & 0x1f);
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2015-12-05 05:44:49 +00:00
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break;
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case 3:
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2016-06-27 13:07:57 +00:00
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ramDisable = (shiftdata & 0x10);
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prgBank = (shiftdata & 0x0f);
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2015-12-05 05:44:49 +00:00
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break;
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}
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}
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}
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2011-10-01 12:06:48 +00:00
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}
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2015-12-05 05:44:49 +00:00
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auto power() -> void {
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}
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Update to v082r32 release.
byuu says:
Added delay to MMC1 register writes, to fix Bill & Ted's Godawful
Adventure.
Fixed up MMC5 RAM+fill mode, and added EXRAM mode support (8x8
tiles/attributes.)
Just Breed is fully playable now.
MMC5 is a total pain in the ass, the documentation on it is just
terrible. I basically just tried seven hundred variations until
something worked.
I still need to add MMC5 vertical split screen (for one single game's
attract screen, ugh), and the extra sound channels.
Would like to rework the NES APU first. Since the pulse channels are
identical sans sweep, it'd be nice to just inherit those and mask out
the sweep register bit writes.
So that probably won't make it into the first release, at least.
Still, overall I think it'll be an impressive showing of complex mappers
for a first release: MMC3, MMC5, VRC6 and 5B. The latter two with full
audio. The only other really, really hard bit is the VRC7 audio,
supposedly.
2011-10-08 07:34:16 +00:00
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2015-12-05 05:44:49 +00:00
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auto reset() -> void {
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writedelay = 0;
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Update to v082r31 release.
byuu says:
Enable Overscan->Mask Overscan [best I'm doing]
Video settings -> Overscan mask: (horizontal, vertical: 0-16 on each
side) [only works on NES+SNES]
BPS patching works for NES+SNES+GB; note that long-term I want BPS to
only patch headerless PRG+CHR files, but we'll need a database
/ completed board mapping system first.
MMC1 splits the board/chip markups a bit better. My attempts to emulate
the extra CHR bits per hardware fail repeatedly. Docs do not explain how
it works at all.
Emulated enough of the MMC5 to play Castlevania 3.
The MMC5 is easily the most complicated mapper the NES has to offer, and
of course, has the most pitifully vague and difficult documentation of
any mapper around.
It seems the only way anyone is able to emulate this chip is
empirically.
Everyone else apparently hooks the MMC5 right into the PPU core, which
I of course cannot do. So I had to come up with my own (probably wrong)
way to synchronize the PPU simply by observing CHR bus accesses.
I must say, I over-estimated how well fleshed out the NES hardware
documentation was. Shit hits the fan right after MMC3.
It's miles beyond the GB scene, but I find myself wanting for someone
with the technical writing ability of anomie.
I can't find anything at all on how we're supposed to support the $2007
port reads/writes without it extra-clocking the PPU's bus, which could
throw off mapper timing.
Absolutely nothing at all on the subject anywhere, something everybody
is required to do for all cycle-based emulators and ... nada.
Anyway, I'd like to refine the MMC5 a bit, getting Just Breed playable
even without sound would be really nice (it's a fun game.)
Then we need to get libsnes building again (ugh, getting worn out in
backporting changes to it.)
Once v083 is public, we can start discussing a new API for multiple
emulators.
2011-10-06 09:53:16 +00:00
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shiftaddr = 0;
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2015-12-05 05:44:49 +00:00
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shiftdata = 0;
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2016-06-27 13:07:57 +00:00
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chrMode = 0;
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prgSize = 1;
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prgMode = 1;
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2015-12-05 05:44:49 +00:00
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mirror = 0;
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2016-06-27 13:07:57 +00:00
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chrBank[0] = 0;
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chrBank[1] = 1;
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ramDisable = 0;
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prgBank = 0;
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2015-12-05 05:44:49 +00:00
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}
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auto serialize(serializer& s) -> void {
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s.integer(writedelay);
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s.integer(shiftaddr);
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s.integer(shiftdata);
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2016-06-27 13:07:57 +00:00
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s.integer(chrMode);
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s.integer(prgSize);
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s.integer(prgMode);
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2015-12-05 05:44:49 +00:00
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s.integer(mirror);
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2016-06-27 13:07:57 +00:00
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s.array(chrBank);
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s.integer(ramDisable);
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s.integer(prgBank);
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Update to v082r31 release.
byuu says:
Enable Overscan->Mask Overscan [best I'm doing]
Video settings -> Overscan mask: (horizontal, vertical: 0-16 on each
side) [only works on NES+SNES]
BPS patching works for NES+SNES+GB; note that long-term I want BPS to
only patch headerless PRG+CHR files, but we'll need a database
/ completed board mapping system first.
MMC1 splits the board/chip markups a bit better. My attempts to emulate
the extra CHR bits per hardware fail repeatedly. Docs do not explain how
it works at all.
Emulated enough of the MMC5 to play Castlevania 3.
The MMC5 is easily the most complicated mapper the NES has to offer, and
of course, has the most pitifully vague and difficult documentation of
any mapper around.
It seems the only way anyone is able to emulate this chip is
empirically.
Everyone else apparently hooks the MMC5 right into the PPU core, which
I of course cannot do. So I had to come up with my own (probably wrong)
way to synchronize the PPU simply by observing CHR bus accesses.
I must say, I over-estimated how well fleshed out the NES hardware
documentation was. Shit hits the fan right after MMC3.
It's miles beyond the GB scene, but I find myself wanting for someone
with the technical writing ability of anomie.
I can't find anything at all on how we're supposed to support the $2007
port reads/writes without it extra-clocking the PPU's bus, which could
throw off mapper timing.
Absolutely nothing at all on the subject anywhere, something everybody
is required to do for all cycle-based emulators and ... nada.
Anyway, I'd like to refine the MMC5 a bit, getting Just Breed playable
even without sound would be really nice (it's a fun game.)
Then we need to get libsnes building again (ugh, getting worn out in
backporting changes to it.)
Once v083 is public, we can start discussing a new API for multiple
emulators.
2011-10-06 09:53:16 +00:00
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}
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2011-10-01 12:06:48 +00:00
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2015-12-05 05:44:49 +00:00
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enum class Revision : uint {
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MMC1,
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MMC1A,
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MMC1B1,
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MMC1B2,
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MMC1B3,
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MMC1C,
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} revision;
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uint writedelay;
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uint shiftaddr;
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uint shiftdata;
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2016-06-27 13:07:57 +00:00
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bool chrMode;
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bool prgSize; //0 = 32K, 1 = 16K
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bool prgMode;
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2015-12-05 05:44:49 +00:00
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uint2 mirror; //0 = first, 1 = second, 2 = vertical, 3 = horizontal
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2016-06-27 13:07:57 +00:00
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uint5 chrBank[2];
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bool ramDisable;
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uint4 prgBank;
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2011-10-01 12:06:48 +00:00
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};
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