Constant replacements

This commit is contained in:
Lior Halphon 2022-09-10 14:55:19 +03:00
parent 4f78e4b109
commit c580c44ad3
1 changed files with 5 additions and 5 deletions

View File

@ -207,11 +207,11 @@ static void cycle_write(GB_gameboy_t *gb, uint16_t addr, uint8_t value)
uint8_t old_value = GB_read_memory(gb, addr);
GB_advance_cycles(gb, gb->pending_cycles - 2);
GB_display_sync(gb);
if (gb->model != GB_MODEL_MGB && gb->position_in_line == 0 && (old_value & 2) && !(value & 2)) {
old_value &= ~2;
if (gb->model != GB_MODEL_MGB && gb->position_in_line == 0 && (old_value & GB_LCDC_OBJ_EN) && !(value & GB_LCDC_OBJ_EN)) {
old_value &= ~GB_LCDC_OBJ_EN;
}
GB_write_memory(gb, addr, old_value | (value & 1));
GB_write_memory(gb, addr, old_value | (value & GB_LCDC_BG_EN));
GB_advance_cycles(gb, 1);
GB_write_memory(gb, addr, value);
gb->pending_cycles = 5;
@ -246,7 +246,7 @@ static void cycle_write(GB_gameboy_t *gb, uint16_t addr, uint8_t value)
// Todo: This is difference is because my timing is off in one of the models
if (gb->model > GB_MODEL_CGB_C) {
GB_advance_cycles(gb, gb->pending_cycles);
GB_write_memory(gb, addr, value ^ 0x10); // Write with the old TILE_SET first
GB_write_memory(gb, addr, value ^ GB_LCDC_TILE_SEL); // Write with the old TILE_SET first
gb->tile_sel_glitch = true;
GB_advance_cycles(gb, 1);
gb->tile_sel_glitch = false;
@ -255,7 +255,7 @@ static void cycle_write(GB_gameboy_t *gb, uint16_t addr, uint8_t value)
}
else {
GB_advance_cycles(gb, gb->pending_cycles - 1);
GB_write_memory(gb, addr, value ^ 0x10); // Write with the old TILE_SET first
GB_write_memory(gb, addr, value ^ GB_LCDC_TILE_SEL); // Write with the old TILE_SET first
gb->tile_sel_glitch = true;
GB_advance_cycles(gb, 1);
gb->tile_sel_glitch = false;